Re: [PATCH 05/10] target/tricore: Implement ftohp insn

On Sat, Aug 26, 2023 at 09:55:05PM -0700, Richard Henderson wrote: > On 8/26/23 09:02, Bastian Koppelmann wrote: > > +uint32_t helper_ftohp(CPUTriCoreState *env, uint32_t arg) > > +{ > > +float32 f_arg = make_float32(arg); > > +uint32_t result = 0; > > +int32_t flags = 0; > > + > > +

Re: [PATCH 08/10] target/tricore: Swap src and dst reg for RCRR_INSERT

On Sat, Aug 26, 2023 at 10:06:22PM -0700, Richard Henderson wrote: > On 8/26/23 09:02, Bastian Koppelmann wrote: > > Signed-off-by: Bastian Koppelmann > > --- > > target/tricore/translate.c | 8 > > tests/tcg/tricore/asm/macros.h | 9 + > > tests/tcg/tricore/asm/

Re: [PATCH 1/3] softmmu: Assert data in bounds in iotlb_to_section

Richard Henderson writes: > Suggested-by: Alex Bennée > Signed-off-by: Richard Henderson > --- > softmmu/physmem.c | 10 -- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/softmmu/physmem.c b/softmmu/physmem.c > index 3df73542e1..7597dc1c39 100644 > --- a/softmmu/p

Re: [PATCH 3/3] softmmu: Remove cpu_reloading_memory_map as unused

Richard Henderson writes: > Signed-off-by: Richard Henderson This is just cleanup, I think it should be merged with 2/3 > --- > include/exec/cpu-common.h | 1 - > accel/tcg/cpu-exec-common.c | 30 -- > 2 files changed, 31 deletions(-) > > diff --git a/include/

Re: [PATCH 2/3] softmmu: Use async_run_on_cpu in tcg_commit

Richard Henderson writes: > After system startup, run the update to memory_dispatch > and the tlb_flush on the cpu. This eliminates a race, > wherein a running cpu sees the memory_dispatch change > but has not yet seen the tlb_flush. > > Since the update now happens on the cpu, we need not use

Re: [PATCH] hw/net/rocker: avoid NULL pointer dereference in of_dpa_cmd_add_l2_flood

On Sat, Aug 26, 2023 at 4:31 PM Mauro Matteo Cascella wrote: > > On Fri, Jun 24, 2022 at 4:40 PM Mauro Matteo Cascella > wrote: > > > > rocker_tlv_parse_nested could return early because of no group ids in > > the group_tlvs. In such case tlvs is NULL; tlvs[i + 1] in the next > > for-loop will de

Re: [PATCH 04/10] target/tricore: Implement FTOU insn

On Sat, Aug 26, 2023 at 09:50:51PM -0700, Richard Henderson wrote: > On 8/26/23 09:02, Bastian Koppelmann wrote: > > +uint32_t helper_ftou(CPUTriCoreState *env, uint32_t arg) > > +{ > > +float32 f_arg = make_float32(arg); > > +uint32_t result; > > +int32_t flags = 0; > > + > > +if (

Re: hw/display/xlinx-dp: fixing comment

Hi, Yes that comment makes sense thanks. Best Regards,Fred Le samedi 26 août 2023 à 12:20:35 UTC+2, Michael Tokarev a écrit : Hi! Hopefully this address still works. If not, let's just commit Peter's comment. Back in 2016, this commit introduced xlinx-dp.c: commit 58ac482a66de09a75

Re: [PATCH 04/10] target/tricore: Implement FTOU insn

On 8/27/23 04:07, Bastian Koppelmann wrote: On Sat, Aug 26, 2023 at 09:50:51PM -0700, Richard Henderson wrote: On 8/26/23 09:02, Bastian Koppelmann wrote: +uint32_t helper_ftou(CPUTriCoreState *env, uint32_t arg) +{ +float32 f_arg = make_float32(arg); +uint32_t result; +int32_t flag

Re: [PATCH 05/10] target/tricore: Implement ftohp insn

On 8/27/23 00:09, Bastian Koppelmann wrote: On Sat, Aug 26, 2023 at 09:55:05PM -0700, Richard Henderson wrote: On 8/26/23 09:02, Bastian Koppelmann wrote: +uint32_t helper_ftohp(CPUTriCoreState *env, uint32_t arg) +{ +float32 f_arg = make_float32(arg); +uint32_t result = 0; +int32_t

Re: [PATCH 2/3] softmmu: Use async_run_on_cpu in tcg_commit

On 8/26/23 16:24, Richard Henderson wrote: +static void tcg_commit_cpu(CPUState *cpu, run_on_cpu_data data) +{ +CPUAddressSpace *cpuas = data.host_ptr; + +cpuas->memory_dispatch = address_space_to_dispatch(cpuas->as); +tlb_flush(cpu); +} Question: do I need to take the iothread lock

[PULL 4/5] target/hppa: Use privilege helper in hppa_get_physical_address()

From: Helge Deller Convert hppa_get_physical_address() to use the privilege helper macro. Signed-off-by: Helge Deller Reviewed-by: Philippe Mathieu-Daudé --- target/hppa/mem_helper.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target/hppa/mem_helper.c b/target

[PULL 2/5] target/hppa: Add privilege to MMU index conversion helpers

From: Helge Deller Add two macros which convert privilege level to/from MMU index: - PRIV_TO_MMU_IDX(priv) returns the MMU index for the given privilege level - MMU_IDX_TO_PRIV(mmu_idx) returns the corresponding privilege level for this MMU index The introduction of those macros make t

[PULL 0/5] Devel hppa priv cleanup2 patches

From: Helge Deller The following changes since commit 7e5a8bb22368b3555644cb2debd3df24592f3a21: Update version for v8.1.0 release (2023-08-22 07:13:44 -0700) are available in the Git repository at: https://github.com/hdeller/qemu-hppa.git tags/devel-hppa-priv-cleanup2-pull-request for yo

[PULL 5/5] target/hppa: Switch to use MMU indices 11-15

From: Helge Deller The MMU indices 9-15 will use shorter assembler instructions when run on a x86-64 host. So, switch over to those to get smaller code and maybe minimally faster emulation. Signed-off-by: Helge Deller --- target/hppa/cpu.h | 16 1 file changed, 8 insertions(+)

[PULL 1/5] target/hppa: Add missing PL1 and PL2 privilege levels

From: Helge Deller The hppa CPU has 4 privilege levels (0-3). Mention the missing PL1 and PL2 levels, although the Linux kernel uses only 0 (KERNEL) and 3 (USER). Not sure about HP-UX. Signed-off-by: Helge Deller Reviewed-by: Philippe Mathieu-Daudé --- target/hppa/cpu.h | 3 +++ 1 file change

[PULL 3/5] target/hppa: Do not use hardcoded value for tlb_flush_*()

From: Helge Deller Avoid using hardcoded values when calling the tlb_flush*() functions. Instead, define and use HPPA_MMU_FLUSH_MASK (keeping the current behavior, which doesn't flush the physical address MMU). Signed-off-by: Helge Deller Reviewed-by: Philippe Mathieu-Daudé --- target/hppa/cp

Re: [PATCH 04/10] target/tricore: Implement FTOU insn

On Sun, Aug 27, 2023 at 07:49:52AM -0700, Richard Henderson wrote: > On 8/27/23 04:07, Bastian Koppelmann wrote: > > On Sat, Aug 26, 2023 at 09:50:51PM -0700, Richard Henderson wrote: > > > On 8/26/23 09:02, Bastian Koppelmann wrote: > > > > +uint32_t helper_ftou(CPUTriCoreState *env, uint32_t arg)

[PATCH 0/7] vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously

The last patch in the series states and fixes the problem; prior patches only refactor the code. Cc: "Michael S. Tsirkin" (supporter:vhost) Cc: Eugenio Perez Martin Cc: German Maglione Cc: Liu Jiang Cc: Sergio Lopez Pascual Cc: Stefano Garzarella Thanks, Laszlo Laszlo Ersek (7): vhost-us

[PATCH 1/7] vhost-user: strip superfluous whitespace

Cc: "Michael S. Tsirkin" (supporter:vhost) Cc: Eugenio Perez Martin Cc: German Maglione Cc: Liu Jiang Cc: Sergio Lopez Pascual Cc: Stefano Garzarella Signed-off-by: Laszlo Ersek --- hw/virtio/vhost-user.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/virtio/vhost-us

[PATCH 2/7] vhost-user: tighten "reply_supported" scope in "set_vring_addr"

In the vhost_user_set_vring_addr() function, we calculate "reply_supported" unconditionally, even though we'll only need it if "wait_for_reply" is also true. Restrict the scope of "reply_supported" to the minimum. This is purely refactoring -- no observable change. Cc: "Michael S. Tsirkin" (sup

[PATCH 6/7] vhost-user: allow "vhost_set_vring" to wait for a reply

The "vhost_set_vring" function already centralizes the common parts of "vhost_user_set_vring_num", "vhost_user_set_vring_base" and "vhost_user_set_vring_enable". We'll want to allow some of those callers to wait for a reply. Therefore, rebase "vhost_set_vring" from just "vhost_user_write" to "vhos

[PATCH 7/7] vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously

(1) The virtio-1.0 specification writes: > 3 General Initialization And Device Operation > 3.1 Device Initialization > 3.1.1 Driver Requirements: Device Initialization > > [...] > > 7. Perform device-specific setup, including d

[PATCH 4/7] vhost-user: flatten "enforce_reply" into "vhost_user_write_msg"

At this point, only "vhost_user_write_msg" calls "enforce_reply"; embed the latter into the former. This is purely refactoring -- no observable change. Cc: "Michael S. Tsirkin" (supporter:vhost) Cc: Eugenio Perez Martin Cc: German Maglione Cc: Liu Jiang Cc: Sergio Lopez Pascual Cc: Stefano G

[PATCH 3/7] vhost-user: factor out "vhost_user_write_msg"

The tails of the "vhost_user_set_vring_addr" and "vhost_user_set_u64" functions are now byte-for-byte identical. Factor the common tail out to a new function called "vhost_user_write_msg". This is purely refactoring -- no observable change. Cc: "Michael S. Tsirkin" (supporter:vhost) Cc: Eugenio

[PATCH 5/7] vhost-user: hoist "write_msg", "get_features", "get_u64"

In order to avoid a forward-declaration for "vhost_user_write_msg" in a subsequent patch, hoist "vhost_user_write_msg" -> "vhost_user_get_features" -> "vhost_user_get_u64" just above "vhost_set_vring". This is purely code movement -- no observable change. Cc: "Michael S. Tsirkin" (supporter:vhos

Re: [PATCH 04/10] target/tricore: Implement FTOU insn

On 8/27/23 09:36, Bastian Koppelmann wrote: On Sun, Aug 27, 2023 at 07:49:52AM -0700, Richard Henderson wrote: On 8/27/23 04:07, Bastian Koppelmann wrote: On Sat, Aug 26, 2023 at 09:50:51PM -0700, Richard Henderson wrote: On 8/26/23 09:02, Bastian Koppelmann wrote: +uint32_t helper_ftou(CPUTr

Re: [PATCH 04/10] target/tricore: Implement FTOU insn

On Sun, Aug 27, 2023 at 11:32:03AM -0700, Richard Henderson wrote: > On 8/27/23 09:36, Bastian Koppelmann wrote: > > On Sun, Aug 27, 2023 at 07:49:52AM -0700, Richard Henderson wrote: > > > On 8/27/23 04:07, Bastian Koppelmann wrote: > > > > On Sat, Aug 26, 2023 at 09:50:51PM -0700, Richard Henders

Re: [PATCH 2/3] softmmu: Use async_run_on_cpu in tcg_commit

Richard Henderson writes: > On 8/26/23 16:24, Richard Henderson wrote: >> +static void tcg_commit_cpu(CPUState *cpu, run_on_cpu_data data) >> +{ >> +CPUAddressSpace *cpuas = data.host_ptr; >> + >> +cpuas->memory_dispatch = address_space_to_dispatch(cpuas->as); >> +tlb_flush(cpu); >>

Re: [PATCH 2/3] softmmu: Use async_run_on_cpu in tcg_commit

On 8/27/23 13:17, Alex Bennée wrote: Richard Henderson writes: On 8/26/23 16:24, Richard Henderson wrote: +static void tcg_commit_cpu(CPUState *cpu, run_on_cpu_data data) +{ +CPUAddressSpace *cpuas = data.host_ptr; + +cpuas->memory_dispatch = address_space_to_dispatch(cpuas->as); +

Re: [PATCH v2] arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE

Hi Shameer, On 8/15/23 19:27, Shameer Kolothum wrote: Now that we have Eager Page Split support added for ARM in the kernel, enable it in Qemu. This adds, -eager-split-size to -accel sub-options to set the eager page split chunk size. -enable KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE. The chunk s

Re: [PATCH v2] arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE

Hi Shameer, On 8/15/23 19:27, Shameer Kolothum wrote: Now that we have Eager Page Split support added for ARM in the kernel, enable it in Qemu. This adds, -eager-split-size to -accel sub-options to set the eager page split chunk size. -enable KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE. The chunk

Re: [RFC PATCH 3/3] softmmu/vl: Add qemu_cpu_opts QemuOptsList

Hi Drew On 2023/8/25 23:58, Andrew Jones wrote: On Fri, Aug 25, 2023 at 08:16:51PM +0800, LIU Zhiwei wrote: This make the cpu works the similar way like the -device option. For device option, """ ./qemu-system-riscv64 -device e1000,help e1000 options: acpi-index=- (default: 0) addr=

Re: [PATCH 10/24] riscv: spelling fixes

On Wed, Aug 23, 2023 at 3:54 PM Michael Tokarev wrote: > > Signed-off-by: Michael Tokarev Acked-by: Alistair Francis Alistair > --- > hw/riscv/microchip_pfsoc.c| 2 +- > hw/riscv/virt.c | 4 ++-- > include/hw/riscv/riscv_hart.h | 2 +-

Re: [PATCH v1 2/7] hw/fsi: Introduce IBM's scratchpad

On 25/08/2023 22.30, Ninad Palsule wrote: This is a part of patchset where IBM's Flexible Service Interface is introduced. The LBUS device is embeded inside the scratchpad. The scratchpad provides a non-functional registers. There is a 1-1 relation between scratchpad and LBUS devices. Each LBUS

Re: [PATCH v1 3/7] hw/fsi: Introduce IBM's cfam,fsi-slave

On 25/08/2023 22.30, Ninad Palsule wrote: This is a part of patchset where IBM's Flexible Service Interface is introduced. The Common FRU Access Macro (CFAM), an address space containing various "engines" that drive accesses on busses internal and external to the POWER chip. Examples include the

Re: [PATCH v3 0/5] Enable vdpa net migration with features depending on CVQ

QE tested this series with MAC and MQ changes, and the guest migrated successfully with "x-svq=off" or without this parameter. Tested-by: Lei Yang On Tue, Aug 22, 2023 at 4:53 PM Eugenio Pérez wrote: > > At this moment the migration of net features that depends on CVQ is not > possible, as the

Re: [PATCH v2] migration/calc-dirty-rate: millisecond-granularity period

On Sat, Aug 26, 2023 at 04:32:01PM +0800, Yong Huang wrote: > Hi, Andrei. I'm preparing a patchset for a pull request. > > For this patch, would you mind if I? > 1. Generate a single patch from the optimization partition. > 2. In the patch above, include my comment and my "Reviewed-by". > 3. Add i

Re: Help with QEMU DBUS display

Hi On Mon, Aug 28, 2023 at 7:58 AM Elijah R wrote: > > Hi! > > I'm currently attempting to use qemu's DBUS display from within a go > application, using the godbus library. However, I'm hitting some roadblocks, > and this is probably because I'm a bit confused about how qemu's peer-to-peer > d