Re: [PATCH] pc-bios/s390-ccw: Get rid of the the __u* types

On Tue, 27 Jun 2023 13:41:01 +0200 Thomas Huth wrote: > Using types starting with double underscores should be avoided since these > names are marked as reserved by the C standard. The corresponding Linux > kernel header file has also been changed accordingly a long time ago: > > > https://git

Re: [PATCH v20 14/21] tests/avocado: s390x cpu topology core

On 5/22/23 21:38, Nina Schoetterl-Glausch wrote: On Tue, 2023-04-25 at 18:14 +0200, Pierre Morel wrote: Introduction of the s390x cpu topology core functions and basic tests. We test the corelation between the command line and the QMP results in query-cpus-fast for various CPU topology. Sign

Re: [RESEND PATCH v5 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

On Tue, 27 Jun 2023 15:23:04 +0530 Ani Sinha wrote: > > On 27-Jun-2023, at 2:32 PM, Igor Mammedov wrote: > > > > On Mon, 26 Jun 2023 21:42:44 +0530 > > Ani Sinha wrote: > > > >> PCI Express ports only have one slot, so PCI Express devices can only be > >> plugged into slot 0 on a PCIE port.

Re: [RESEND PATCH v5 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

> On 27-Jun-2023, at 5:25 PM, Michael S. Tsirkin wrote: > > On Tue, Jun 27, 2023 at 03:23:04PM +0530, Ani Sinha wrote: >> >> >>> On 27-Jun-2023, at 2:32 PM, Igor Mammedov wrote: >>> >>> On Mon, 26 Jun 2023 21:42:44 +0530 >>> Ani Sinha wrote: >>> PCI Express ports only have one slot,

Re: [PATCH] target/ppc: Only generate decodetree files when TCG is enabled

On Mon, 26 Jun 2023 16:01:00 +0200 Philippe Mathieu-Daudé wrote: > No need to generate TCG-specific decodetree files > when TCG is disabled. > > Signed-off-by: Philippe Mathieu-Daudé > --- Reviewed-by: Greg Kurz > target/ppc/meson.build | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-

Re: [PATCH] pc-bios/s390-ccw: Get rid of the the __u* types

On Tue, 2023-06-27 at 13:41 +0200, Thomas Huth wrote: > Using types starting with double underscores should be avoided since > these > names are marked as reserved by the C standard. The corresponding > Linux > kernel header file has also been changed accordingly a long time ago: > >   > https://g

Re: [PATCH 0/4] target/ppc: Catch invalid real address accesses

Mac OS 9.2 fails to boot with a popup saying : Sorry, a system error occured. "Sound Manager"    address error To temporarily turn off extensions, restart and hold down the shift key Darwin and Mac OSX look OK. My guess would be that MacOS 9.2 is try

Re: [PATCH] pc-bios/s390-ccw: Get rid of the the __u* types

Thomas Huth wrote: > Using types starting with double underscores should be avoided since these > names are marked as reserved by the C standard. The corresponding Linux > kernel header file has also been changed accordingly a long time ago: > > > https://git.kernel.org/pub/scm/linux/kernel/git/

Re: [PATCH 0/4] target/ppc: Catch invalid real address accesses

On Tue, Jun 27, 2023 at 1:24 PM Mark Cave-Ayland < mark.cave-ayl...@ilande.co.uk> wrote: > On 27/06/2023 11:28, Howard Spoelstra wrote: > > > On Tue, Jun 27, 2023 at 10:15 AM Mark Cave-Ayland < > mark.cave-ayl...@ilande.co.uk > > > wrote: > > > > On 26/06/

Re: [RESEND PATCH v5 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

On Tue, Jun 27, 2023 at 05:31:37PM +0530, Ani Sinha wrote: > > > > On 27-Jun-2023, at 5:25 PM, Michael S. Tsirkin wrote: > > > > On Tue, Jun 27, 2023 at 03:23:04PM +0530, Ani Sinha wrote: > >> > >> > >>> On 27-Jun-2023, at 2:32 PM, Igor Mammedov wrote: > >>> > >>> On Mon, 26 Jun 2023 21:42:

Re: [PATCH v2] piix: fix regression during unplug in Xen HVM domUs

Tue, 27 Jun 2023 10:12:50 + Bernhard Beschow : > The BAR is a 32 bit register whose default value is 0x0001. I think > what's supposed to happen here is a pci_set_long() rather than a > pci_set_byte(). Indeed, the u32 at that address changes from c121 to c101 with the current code. Ola

Re: [PULL 3/3] xen-block: Use specific blockdev driver

On Fri, 2 Jun 2023 at 18:04, Peter Maydell wrote: > > On Mon, 10 May 2021 at 13:53, Anthony PERARD > wrote: > > > > ... when a xen-block backend instance is created via xenstore. > > > > Following 8d17adf34f50 ("block: remove support for using "file" driver > > with block/char devices"), using t

Re: [PATCH 1/1] hw/arm/sbsa-ref: add PCIe node into DT

On Mon, 26 Jun 2023 at 08:52, Marcin Juszkiewicz wrote: > > Add PCI Express information into DeviceTree as part of SBSA-REF > versioning. > > Trusted Firmware will read it and provide to next firmware level. > > Signed-off-by: Marcin Juszkiewicz > --- > hw/arm/sbsa-ref.c | 20 +++

Re: Request for Assistance: Adding I2C Support in QEMU for Raspberry Pi (BCM2835 Peripherals)

On Wed, 21 Jun 2023 at 06:01, Shivam wrote: > I hope this email finds you well. I am reaching out to seek guidance and > assistance regarding a project I am working on involving the addition of I2C > support in QEMU for the Raspberry Pi, specifically targeting the BCM2835 > peripherals. Hi! Th

Re: [PATCH] pc-bios/s390-ccw: Get rid of the the __u* types

Am 27.06.23 um 13:41 schrieb Thomas Huth: Using types starting with double underscores should be avoided since these names are marked as reserved by the C standard. The corresponding Linux In general I think this change is fine, but this is kind of interesting, as /usr/include/linux/types.h

Re: [PATCH 3/3] vfio/migration: Make VFIO migration non-experimental

[ Cc: Shameer ] I see ON_OFF_AUTO_ON as a way to abort the machine startup while ON_OFF_AUTO_AUTO would let it run but block migration. Agreed.  There's a little bit of redundancy between the device-level "enable-migration=on" option and the global "-only-migratable" option relative to preven

Re: [PATCH v3] target/arm: Add raw_writes ops for register whose write induce TLB maintenance

On Fri, 23 Jun 2023 at 17:43, Eric Auger wrote: > > Hi Peter, > > On 2/28/23 10:36, Eric Auger wrote: > > Some registers whose 'cooked' writefns induce TLB maintenance do > > not have raw_writefn ops defined. If only the writefn ops is set > > (ie. no raw_writefn is provided), it is assumed the co

Re: [RESEND PATCH v5 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

On Tue, Jun 27, 2023 at 01:58:49PM +0200, Igor Mammedov wrote: > On Tue, 27 Jun 2023 15:23:04 +0530 > Ani Sinha wrote: > > > > On 27-Jun-2023, at 2:32 PM, Igor Mammedov wrote: > > > > > > On Mon, 26 Jun 2023 21:42:44 +0530 > > > Ani Sinha wrote: > > > > > >> PCI Express ports only have one

Re: [PATCH v3] target/arm: Add raw_writes ops for register whose write induce TLB maintenance

Hi Peter, On 6/27/23 14:23, Peter Maydell wrote: > On Fri, 23 Jun 2023 at 17:43, Eric Auger wrote: >> Hi Peter, >> >> On 2/28/23 10:36, Eric Auger wrote: >>> Some registers whose 'cooked' writefns induce TLB maintenance do >>> not have raw_writefn ops defined. If only the writefn ops is set >>> (

Re: [PATCH v4 00/10] memory-device: Some cleanups

On 23.06.23 14:45, David Hildenbrand wrote: Essentially a resend with ACKs/RBs. If I don't get any more comments I'll queue this to my mem-next tree next week. Queued to https://github.com/davidhildenbrand/qemu.git mem-next Will probably send a PR later this week. -- Cheers, David / dhilden

Re: [RESEND PATCH v5 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

> On 27-Jun-2023, at 5:53 PM, Michael S. Tsirkin wrote: > > On Tue, Jun 27, 2023 at 01:58:49PM +0200, Igor Mammedov wrote: >> On Tue, 27 Jun 2023 15:23:04 +0530 >> Ani Sinha wrote: >> On 27-Jun-2023, at 2:32 PM, Igor Mammedov wrote: On Mon, 26 Jun 2023 21:42:44 +0530 An

Re: [PATCH 3/3] vfio/migration: Make VFIO migration non-experimental

On Tue, Jun 27, 2023 at 02:21:55PM +0200, Cédric Le Goater wrote: > We have a way to run and migrate a machine with a device not supporting > dirty tracking. Only Hisilicon is in that case today. May be there are > plans to add dirty tracking support ? Hisilicon will eventually use Joao's work fo

Re: [PATCH v5 0/1] hw/arm/sbsa-ref: use XHCI to replace EHCI

On Wed, 21 Jun 2023 at 11:39, Yuquan Wang wrote: > > Please review the change. > - sbsa-ref: Replace EHCI with XHCI on sysbus. > > This work bumps the platform version directly to 0.3 because > the addition of ITS will take sbsa-ref to 0.2 version. > > Yuquan Wang (1): > hw/arm/sbsa-ref: use XH

Re: [PATCH] linux-user/riscv: Add syscall riscv_hwprobe

On Fri, 2023-06-23 at 12:24 +1000, Alistair Francis wrote: > On Mon, Jun 19, 2023 at 6:25 PM Robbin Ehn wrote: > > > > This patch adds the new syscall for the > > "RISC-V Hardware Probing Interface" > > (https://docs.kernel.org/riscv/hwprobe.html). > > > > Reviewed-by: Palmer Dabbelt > > Signed

Re: [PATCH 1/6] migration: Set migration status early in incoming side

Juan Quintela writes: > Fabiano Rosas wrote: >> We are sending a migration event of MIGRATION_STATUS_SETUP at >> qemu_start_incoming_migration but never actually setting the state. >> >> This creates a window between qmp_migrate_incoming and >> process_incoming_migration_co where the migration s

Re: [RESEND PATCH v5 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

On Tue, 27 Jun 2023 08:23:25 -0400 "Michael S. Tsirkin" wrote: > On Tue, Jun 27, 2023 at 01:58:49PM +0200, Igor Mammedov wrote: > > On Tue, 27 Jun 2023 15:23:04 +0530 > > Ani Sinha wrote: > > > > > > On 27-Jun-2023, at 2:32 PM, Igor Mammedov wrote: > > > > > > > > On Mon, 26 Jun 2023 21:42:

Re: [PATCH 0/4] target/ppc: Catch invalid real address accesses

On 6/27/23 14:05, Howard Spoelstra wrote: On Tue, Jun 27, 2023 at 1:24 PM Mark Cave-Ayland mailto:mark.cave-ayl...@ilande.co.uk>> wrote: On 27/06/2023 11:28, Howard Spoelstra wrote: > On Tue, Jun 27, 2023 at 10:15 AM Mark Cave-Ayland mailto:mark.cave-ayl...@ilande.co.uk> >

Re: [PATCH v3 16/16] accel: Rename HVF 'struct hvf_vcpu_state' -> AccelCPUState

On 24/6/23 19:41, Philippe Mathieu-Daudé wrote: We want all accelerators to share the same opaque pointer in CPUState. Rename the 'hvf_vcpu_state' structure as 'AccelCPUState'. Use the generic 'accel' field of CPUState instead of 'hvf'. Replace g_malloc0() by g_new0() for readability. Signed-

Re: [PATCH v3 15/16] accel: Rename 'cpu_state' -> 'cs'

On 24/6/23 19:41, Philippe Mathieu-Daudé wrote: Most of the codebase uses 'CPUState *cpu' or 'CPUState *cs'. While 'cpu_state' is kind of explicit, it makes the code harder to review. Simply rename as 'cs'. Acked-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/i386/hvf

Re: [PATCH 1/4] target/arm: Avoid splitting Zregs across lines in dump

On Thu, 22 Jun 2023 at 16:12, Richard Henderson wrote: > > Allow the line length to extend to 548 columns. While annoyingly wide, > it's still less confusing than the continuations we print. Also, the > default VL used by Linux (and max for A64FX) uses only 140 columns. > > Signed-off-by: Richar

Re: [PATCH 2/4] target/arm: Dump ZA[] when active

On Thu, 22 Jun 2023 at 16:12, Richard Henderson wrote: > > Always print each matrix row whole, one per line, so that we > get the entire matrix in the proper shape. > > Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell thanks -- PMM

Re: [PATCH 1/1] hw/arm/sbsa-ref: add PCIe node into DT

On 2023-06-27 13:12, Peter Maydell wrote: On Mon, 26 Jun 2023 at 08:52, Marcin Juszkiewicz wrote: Add PCI Express information into DeviceTree as part of SBSA-REF versioning. Trusted Firmware will read it and provide to next firmware level. Signed-off-by: Marcin Juszkiewicz --- hw/arm/sbsa

Re: [PATCH 6/6] tests/qtest: migration-test: Add tests for file-based migration

Daniel P. Berrangé writes: > On Mon, Jun 26, 2023 at 03:22:10PM -0300, Fabiano Rosas wrote: >> From: Nikolay Borisov >> >> Add basic tests for file-based migration. >> >> Signed-off-by: Nikolay Borisov >> Signed-off-by: Fabiano Rosas >> --- >> tests/qtest/migration-test.c | 66 +

[PULL 01/33] ui: return NULL when getting cursor without a console

From: Marc-André Lureau VNC may try to get the current cursor even when there are no consoles and crashes. Simple reproducer is qemu with -nodefaults. Fixes: (again) https://gitlab.com/qemu-project/qemu/-/issues/1548 Fixes: commit 385ac97f8 ("ui: keep current cursor with QemuConsole") Signed-of

[PULL 00/33] UI patches

From: Marc-André Lureau The following changes since commit 4329d049d5b8d4af71c6b399d64a6d1b98856318: Merge tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu into staging (2023-06-26 17:40:38 +0200) are available in the Git repository at: https://gitlab.com/marcandre.lureau/qemu.g

[PULL 08/33] virtio-gpu: Make non-gl display updates work again when blob=true

From: Vivek Kasireddy In the case where the console does not have gl capability, and if blob is set to true, make sure that the display updates still work. Commit e86a93f55463 accidentally broke this by misplacing the return statement (in resource_flush) causing the updates to be silently ignored

[PULL 15/33] ui/dbus: compile without gio/gunixfdlist.h

From: Marc-André Lureau D-Bus on windows doesn't support fd-passing. Let's isolate the fdlist-related code as a first step, before adding Windows support, using another mechanism. Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.677673-4-marcandre.lur...@redhat.com> --- audio/dbusa

[PULL 27/33] ui/dbus: add GL support on win32

From: Marc-André Lureau Enable usage of dbus,gl= on win32. At this point, the scanout texture is read on the DisplaySurface memory, and the client is then updated with the "2D" API (with shared memory if possible). Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.677673-16-marcandre

[PULL 30/33] ui/egl: query ANGLE d3d device

From: Marc-André Lureau Check if ANGLE is being used with D3D backend. Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.677673-19-marcandre.lur...@redhat.com> --- include/ui/egl-helpers.h | 1 + ui/egl-helpers.c | 32 +++- ui/trace-events

[PULL 10/33] ui/gtk: set the area of the scanout texture correctly

From: Dongwon Kim x and y offsets and width and height of the scanout texture is not correctly configured in case guest scanout frame is dmabuf. Cc: Gerd Hoffmann Cc: Marc-André Lureau Cc: Vivek Kasireddy Signed-off-by: Dongwon Kim Message-ID: <20230621213150.29573-1-dongwon@intel.com> -

[PULL 20/33] ui/dbus: introduce "Interfaces" properties

From: Marc-André Lureau This property is similar to ``org.freedesktop.DBus.Interfaces`` property on the bus interface: it's an array of strings listing the extra interfaces and capabilities available, in a convenient way. Most interfaces are implicit, as they are required. For ``org/qemu/Display

[PULL 05/33] chardev/char-win-stdio: Support VT sequences on Windows 11 host

From: Zhang Huasen If the monitor or the serial port use STDIO as backend on Windows 11 host, e.g. -nographic options is used, the monitor or the guest Linux do not response to arrow keys. When Windows creates a console, ENABLE_VIRTUAL_PROCESS_INPUT is disabled by default. Arrow keys cannot be r

[PULL 04/33] virtio-gpu: Optimize 2D resource data transfer

From: Keqian Zhu via The following points sometimes can reduce much data to copy: 1. When width matches, we can transfer data with one call of iov_to_buf(). 2. Only the required height need to transfer, not whole image. Signed-off-by: Keqian Zhu Reviewed-by: Marc-André Lureau Message-Id: <2023

[PULL 02/33] egl: no need to lookup EGL functions manually

From: Marc-André Lureau libepoxy handles loading the function pointer and dispatching the call, so you don't have to worry about it. Signed-off-by: Marc-André Lureau Message-Id: <20230515132455.1025608-1-marcandre.lur...@redhat.com> --- ui/egl-helpers.c | 6 ++ 1 file changed, 2 insertions

[PULL 32/33] virtio-gpu-virgl: use D3D11_SHARE_TEXTURE when available

From: Marc-André Lureau Enable D3D texture sharing when possible, and pass it to the texture display callbacks. Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.677673-21-marcandre.lur...@redhat.com> --- meson.build | 6 ++ hw/display/virtio-gpu-virgl.c | 24

[PULL 07/33] ui/dbus: Expose a touch device interface

From: Bilal Elmoussaoui So that clients making use of the DBus backend could send touch events through the new org.qemu.Display1.Touch interface Signed-off-by: Bilal Elmoussaoui Reviewed-by: Marc-André Lureau Message-Id: <20230619095337.9899-3-belmo...@redhat.com> --- ui/dbus-console.c| 5

[PULL 29/33] virtio-gpu-virgl: teach it to get the QEMU EGL display

From: Marc-André Lureau virgl offers a few features that require to have access to the underlying EGLDisplay. This is the case for the D3D texture sharing support. The API callback is merged for virgl 1.0: https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/1113 Signed-off-by: M

[PULL 09/33] virtio-gpu-udmabuf: create udmabuf for blob even when iov_cnt == 1

From: Dongwon Kim There were often cases where a scanout blob sometimes has just 1 entry that is linked to many pages in it. So just checking whether iov_cnt is 1 is not enough for screening small, non-scanout blobs. Therefore adding iov_len check as well to make sure it creates an udmabuf only f

[PULL 18/33] qtest: add qtest_pid()

From: Marc-André Lureau Used in the following test on win32, to share sockets with the QEMU process. Signed-off-by: Marc-André Lureau Reviewed-by: Thomas Huth Message-Id: <20230606115658.677673-7-marcandre.lur...@redhat.com> --- tests/qtest/libqtest.h | 9 + tests/qtest/libqtest.c | 5

[PULL 26/33] ui: add egl_fb_read_rect()

From: Marc-André Lureau Similar to egl_fb_read(), same limitations, but with extra arguments to read a subset of the framebuffer. Used in following commits. Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.677673-15-marcandre.lur...@redhat.com> --- include/ui/egl-helpers.h | 1 +

[PULL 03/33] ui/sdl2: OpenGL window context

From: Antonio Caggiano When OpenGL is enabled, create only the OpenGL context, ignoring the SDL renderer as it is unused anyway. Signed-off-by: Antonio Caggiano Reviewed-by: Marc-André Lureau Message-Id: <20230612091959.2983-1-quic_acagg...@quicinc.com> --- ui/sdl2.c | 18 +++---

[PULL 14/33] ui/egl: fix make_context_current() callback return value

From: Marc-André Lureau eglMakeCurrent() returns 1/EGL_TRUE on success. This is not what the callback expects, where 0 indicates success. While at it, print the EGL error to ease debugging. As with virgl_renderer_callbacks, the return value is now checked since version >= 4: https://gitlab.free

[PULL 31/33] ui: add optional d3d texture pointer to scanout texture

From: Marc-André Lureau The following patch will get the underlying D3D11 Texture2D from the virgl renderer scanout. Pass it along to the texture scanout callbacks as a priliminary step, to simplify review. Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.677673-20-marcandre.lur...@

[PULL 23/33] ui/dbus: use shared memory when possible on win32

From: Marc-André Lureau When the display surface has an associated HANDLE, we can duplicate it to the client process and let it map the memory to avoid expensive copies. Introduce two new win32-specific methods ScanoutMap and UpdateMap. The first is used to inform the listener about the a shared

Re: [PATCH 3/4] target/arm: Support reading ZA[] from gdbstub

On Thu, 22 Jun 2023 at 16:12, Richard Henderson wrote: > > Mirror the existing support for SVE. > > Signed-off-by: Richard Henderson > @@ -247,6 +247,61 @@ int aarch64_gdb_set_pauth_reg(CPUARMState *env, uint8_t > *buf, int reg) > return 0; > } > > +static int max_svq(ARMCPU *cpu) > +{ >

[PULL 21/33] console/win32: allocate shareable display surface

From: Marc-André Lureau Introduce qemu_win32_map_alloc() and qemu_win32_map_free() to allocate shared memory mapping. The handle can be used to share the mapping with another process. Teach qemu_create_displaysurface() to allocate shared memory. Following patches will introduce other places for

[PULL 24/33] ui: add egl-headless support on win32

From: Marc-André Lureau Make GBM optional for EGL code, and enable the build for win32. Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.677673-13-marcandre.lur...@redhat.com> --- qapi/ui.json | 5 ++--- include/ui/egl-helpers.h | 7 ++- ui/egl-headless.c|

[PULL 25/33] ui/egl: default to GLES on windows

From: Marc-André Lureau Windows GL drivers are notoriously not very good. Otoh, ANGLE provides rock solid GLES implementation on top of direct3d. We should recommend it and default to ES when using EGL (users can easily override this if necessary) Signed-off-by: Marc-André Lureau Message-Id: <2

[PULL 19/33] tests: make dbus-display-test work on win32

From: Marc-André Lureau Signed-off-by: Marc-André Lureau Acked-by: Thomas Huth Message-Id: <20230606115658.677673-8-marcandre.lur...@redhat.com> --- tests/qtest/dbus-display-test.c | 43 ++--- tests/qtest/meson.build | 2 +- 2 files changed, 41 insertions(+

[PULL 13/33] ui/egl: export qemu_egl_get_error_string()

From: Marc-André Lureau It will be used from other units. Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.677673-2-marcandre.lur...@redhat.com> --- include/ui/egl-helpers.h | 2 ++ ui/egl-helpers.c | 12 +--- 2 files changed, 7 insertions(+), 7 deletions(-) diff

[PULL 06/33] ui/touch: Move event handling to a common helper

From: Bilal Elmoussaoui To share code between the GTK and DBus UI bakcends see the next commit for details Signed-off-by: Bilal Elmoussaoui Reviewed-by: Marc-André Lureau Message-Id: <20230619095337.9899-2-belmo...@redhat.com> --- include/ui/console.h | 15 ++ ui/console.c | 6

[PULL 12/33] ui/gtk: making dmabuf NULL when it's released.

From: Dongwon Kim Set vc->gfx.guest_fb.dmabuf to NULL to prevent any further access to it after the dmabuf is released. v2: move declaration of vc inside ifdef Cc: Gerd Hoffmann Cc: Marc-André Lureau Cc: Vivek Kasireddy Signed-off-by: Dongwon Kim Reviewed-by: Marc-André Lureau Message-ID:

[PULL 28/33] ui/dbus: add some GL traces

From: Marc-André Lureau Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.677673-17-marcandre.lur...@redhat.com> --- ui/dbus-listener.c | 6 ++ ui/trace-events| 3 +++ 2 files changed, 9 insertions(+) diff --git a/ui/dbus-listener.c b/ui/dbus-listener.c index e92eff66e3..860

[PULL 17/33] ui/dbus: win32 support

From: Marc-André Lureau D-Bus doesn't support fd-passing on Windows (AF_UNIX doesn't have SCM_RIGHTS yet, but there are other means to share objects. I have proposed various solutions upstream, but none seem fitting enough atm). To make the "-display dbus" work on Windows, implement an alternati

[PULL 11/33] virtio-gpu: OUT_OF_MEMORY if failing to create udmabuf

From: Dongwon Kim Respond with VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY if it fails to create an udmabuf for the blob resource. v2: consolidated return statments and removed an unnecessary style change Cc: Gerd Hoffmann Cc: Marc-André Lureau Cc: Vivek Kasireddy Signed-off-by: Dongwon Kim Reviewed-

[PULL 22/33] virtio-gpu/win32: allocate shareable 2d resources/images

From: Marc-André Lureau Allocate pixman bits for scanouts with qemu_win32_map_alloc() so we can set a shareable handle on the associated display surface. Note: when bits are provided to pixman_image_create_bits(), you must also give the rowstride (the argument is ignored when bits is NULL) Sign

[PULL 33/33] ui/dbus: use shared D3D11 Texture2D when possible

From: Marc-André Lureau When the client implements "org.qemu.Display1.Listener.Win32.D3d11" and we are running on ANGLE/win32, share the scanout texture with the peer process, and draw with ScanoutTexture2d/UpdateTexture2d methods. Signed-off-by: Marc-André Lureau Message-Id: <20230606115658.67

Re: [PATCH v20 15/21] tests/avocado: s390x cpu topology polarisation

On 5/22/23 21:45, Nina Schoetterl-Glausch wrote: Try to be consistent in the spelling of polarization. You use an s in the title and in the test name below. On Tue, 2023-04-25 at 18:14 +0200, Pierre Morel wrote: Polarization is changed on a request from the guest. Let's verify the polarizatio

Re: [PATCH v20 16/21] tests/avocado: s390x cpu topology entitlement tests

On 5/22/23 21:47, Nina Schoetterl-Glausch wrote: On Tue, 2023-04-25 at 18:14 +0200, Pierre Morel wrote: This test takes care to check the changes on different entitlements when the guest requests a polarization change. Signed-off-by: Pierre Morel --- tests/avocado/s390_topology.py | 56 +++

Re: [PATCH v4 16/24] nbd/server: Support 64-bit block status

On 08.06.23 16:56, Eric Blake wrote: The NBD spec states that if the client negotiates extended headers, the server must avoid NBD_REPLY_TYPE_BLOCK_STATUS and instead use NBD_REPLY_TYPE_BLOCK_STATUS_EXT which supports 64-bit lengths, even if the reply does not need more than 32 bits. As of this

Re: Is it possible to boot a riscv32 guest on riscv64 host using KVM?

On Mon, Jun 26, 2023 at 4:57 PM Philippe Mathieu-Daudé wrote: > > Hi, > > I'm working on a tree-wide accelerator refactor and want > to run various configs to be sure I didn't broke anything. > > QEMU theoretically supports running a riscv32 guest using > KVM on a riscv64 host, however the documen

Re: [PATCH 4/4] target/arm: Fix SME full tile indexing

On Thu, 22 Jun 2023 at 16:12, Richard Henderson wrote: > > For the outer product set of insns, which take an entire matrix > tile as output, the argument is not a combined tile+column. > Therefore using get_tile_rowcol was incorrect, as we extracted > the tile number from itself. > > The test case

Re: [PATCH v4 17/24] nbd/server: Enable initial support for extended headers

On 08.06.23 16:56, Eric Blake wrote: Time to start supporting clients that request extended headers. Now we can finally reach the code added across several previous patches. Even though the NBD spec has been altered to allow us to accept NBD_CMD_READ larger than the max payload size (provided o

Re: [PATCH 1/1] hw/arm/sbsa-ref: add PCIe node into DT

On Tue, 27 Jun 2023 at 13:52, Leif Lindholm wrote: > > On 2023-06-27 13:12, Peter Maydell wrote: > > On Mon, 26 Jun 2023 at 08:52, Marcin Juszkiewicz > > wrote: > >> > >> Add PCI Express information into DeviceTree as part of SBSA-REF > >> versioning. > >> > >> Trusted Firmware will read it and p

Re: [PATCH v4 18/24] nbd/client: Plumb errp through nbd_receive_replies

On 08.06.23 16:56, Eric Blake wrote: Instead of ignoring the low-level error just to refabricate our own message to pass to the caller, we can just plump the caller's errp down to the low level. Signed-off-by: Eric Blake --- v4: new patch [Vladimir] --- block/nbd.c | 16 ++-- 1

[PATCH] target/riscv: Set the correct exception for implict G-stage translation fail

The privileged spec states: For a memory access made to support VS-stage address translation (such as to read/write a VS-level page table), permissions are checked as though for a load or store, not for the original access type. However, any exception is always reported for the original access type

[RFC PATCH] target/riscv: Add Zihintntl extension ISA string to DTS

RVA23 Profiles states: The RVA23 profiles are intended to be used for 64-bit application processors that will run rich OS stacks from standard binary OS distributions and with a substantial number of third-party binary user applications that will be supported over a considerable length of time in t

Re: [PATCH 3/4] target/arm: Support reading ZA[] from gdbstub

On 6/27/23 14:07, Peter Maydell wrote: > On Thu, 22 Jun 2023 at 16:12, Richard Henderson > wrote: >> >> Mirror the existing support for SVE. >> >> Signed-off-by: Richard Henderson > > >> @@ -247,6 +247,61 @@ int aarch64_gdb_set_pauth_reg(CPUARMState *env, uint8_t >> *buf, int reg) >> return

Re: [PATCH 0/4] target/arm: Fix SME full tile indexing

On Thu, 22 Jun 2023 at 16:12, Richard Henderson wrote: > > Fix #1620 and add its test case. > Several cleanups to aid debugging ZA[]. :-) I'm going to apply patches 1,2 and 4 to target-arm.next. I've tagged 4 as cc: qemu-stable (but will remove that if you disagree). thanks -- PMM

[PATCH v2 4/4] target/ppc: Implement attn instruction on BookS 64-bit processors

attn is an implementation-specific instruction that on POWER (and G5/ 970) can be enabled with a HID bit (disabled = illegal), and executing it causes the host processor to stop and the service processor to be notified. Generally used for debugging. Implement attn and make it checkstop the system,

[PATCH v2 2/4] target/ppc: Move common check in machine check handlers to a function

From: BALATON Zoltan All powerpc exception handlers share some code when handling machine check exceptions. Move this to a common function. Reviewed-by: Nicholas Piggin Signed-off-by: BALATON Zoltan [np: adapted to make checkstop generally usable] Signed-off-by-by: Nicholas Piggin --- Since v

[PATCH v2 1/4] target/ppc: Machine check on invalid real address access on POWER9/10

ppc currently silently accepts invalid real address access. Catch these and turn them into machine checks on POWER9/10 machines. Signed-off-by: Nicholas Piggin --- Since v1: - Only implement this for POWER9/10. Seems like previous IBM processors may not catch this after all, trying to get info.

[PATCH v2 0/4] target/ppc: Catch invalid real address accesses

Since v1 I squashed a patch (and wrapper function) out, removed 970 to POWER8 invalid real address checkstop, added attn implementation to demonstrate sharing of checkstop, and made some fixes to checkstop mechanism so it stops on the instruction causing it. Thanks, Nick BALATON Zoltan (1): ta

[PATCH v2 3/4] target/ppc: Make checkstop actually stop the system

checkstop state does not halt the system, interrupts continue to be serviced, and other CPUs run. Stop the machine with vm_stop(), and print a register dump too. Signed-off-by: Nicholas Piggin --- Since v1: - Fix loop exit so it stops on the attn instruction, rather than after it. target/ppc

Re: [PATCH 1/1] hw/arm/sbsa-ref: add PCIe node into DT

On 2023-06-27 14:27, Peter Maydell wrote: On Tue, 27 Jun 2023 at 13:52, Leif Lindholm wrote: On 2023-06-27 13:12, Peter Maydell wrote: On Mon, 26 Jun 2023 at 08:52, Marcin Juszkiewicz wrote: Add PCI Express information into DeviceTree as part of SBSA-REF versioning. Trusted Firmware will

[PATCH v6 0/3] Implement the watchdog timer of HiFive 1 rev b.

The HiFive 1 rev b includes a watchdog module based on a 32-bit counter. The watchdog timer is in the always-on domain device of HiFive 1 rev b, so this patch added the AON device to the sifive_e machine. This patch only implemented the functionality of the watchdog timer, not all the functionality

[PATCH v6 1/3] hw/misc: sifive_e_aon: Support the watchdog timer of HiFive 1 rev b.

The watchdog timer is in the always-on domain device of HiFive 1 rev b, so this patch added the AON device to the sifive_e machine. This patch only implemented the functionality of the watchdog timer. Signed-off-by: Tommy Wu Reviewed-by: Frank Chang Acked-by: Alistair Francis --- hw/misc/Kconf

[PATCH v6 3/3] tests/qtest: sifive-e-aon-watchdog-test.c: Add QTest of watchdog of sifive_e

Add some simple tests of the watchdog timer in the always-on domain device of HiFive 1 rev b. Signed-off-by: Tommy Wu Reviewed-by: Frank Chang Acked-by: Thomas Huth Acked-by: Alistair Francis --- tests/qtest/meson.build | 3 + tests/qtest/sifive-e-aon-watchdog-test.c | 450

[PATCH v6 2/3] hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b.

Create the AON device when we realize the sifive_e machine. This patch only implemented the functionality of the watchdog timer, not all the functionality of the AON device. Signed-off-by: Tommy Wu Reviewed-by: Frank Chang Reviewed-by: Alistair Francis --- hw/riscv/Kconfig| 1 + h

Re: [PATCH v5 0/3] Implement the watchdog timer of HiFive 1 rev b.

Hi Alistair, Thanks for the suggestion! I've rebased and sent patch v6. Best Regards, Tommy On Thu, Jun 22, 2023 at 10:10 AM Alistair Francis wrote: > On Fri, Jun 9, 2023 at 2:46 AM Tommy Wu wrote: > > > > The HiFive 1 rev b includes a watchdog module based on a 32-bit > > counter. The watchdo

Re: [PATCH 3/3] vfio/migration: Make VFIO migration non-experimental

On Tue, 27 Jun 2023 11:00:46 +0300 Avihai Horon wrote: > On 26/06/2023 20:27, Alex Williamson wrote: > > External email: Use caution opening links or attachments > > > > > > On Mon, 26 Jun 2023 17:26:42 +0200 > > Cédric Le Goater wrote: > > > >> On 6/26/23 15:40, Joao Martins wrote: > >>> On

Re: [PATCH v4 19/24] nbd/client: Initial support for extended headers

On 08.06.23 16:56, Eric Blake wrote: Update the client code to be able to send an extended request, and parse an extended header from the server. Note that since we reject any structured reply with a too-large payload, we can always normalize a valid header back into the compact form, so that th

Re: [RESEND PATCH v5 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

On Tue, Jun 27, 2023 at 05:59:02PM +0530, Ani Sinha wrote: > > > > On 27-Jun-2023, at 5:53 PM, Michael S. Tsirkin wrote: > > > > On Tue, Jun 27, 2023 at 01:58:49PM +0200, Igor Mammedov wrote: > >> On Tue, 27 Jun 2023 15:23:04 +0530 > >> Ani Sinha wrote: > >> > On 27-Jun-2023, at 2:32 PM,

Re: [PATCH 1/1] hw/arm/sbsa-ref: add PCIe node into DT

On Tue, 27 Jun 2023 at 15:09, Leif Lindholm wrote: > On 2023-06-27 14:27, Peter Maydell wrote: > > OK. This is the kind of rationale that needs to be described > > in the commit message and comments, though, so it's clear > > why the PCI controller is special in this way. > > I mean, ultimately it

Re: [RESEND PATCH v5 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port

On Tue, Jun 27, 2023 at 02:38:44PM +0200, Igor Mammedov wrote: > On Tue, 27 Jun 2023 08:23:25 -0400 > "Michael S. Tsirkin" wrote: > > > On Tue, Jun 27, 2023 at 01:58:49PM +0200, Igor Mammedov wrote: > > > On Tue, 27 Jun 2023 15:23:04 +0530 > > > Ani Sinha wrote: > > > > > > > > On 27-Jun-2023

Re: Is it possible to boot a riscv32 guest on riscv64 host using KVM?

On 27/6/23 15:24, Anup Patel wrote: On Mon, Jun 26, 2023 at 4:57 PM Philippe Mathieu-Daudé wrote: Hi, I'm working on a tree-wide accelerator refactor and want to run various configs to be sure I didn't broke anything. QEMU theoretically supports running a riscv32 guest using KVM on a riscv64

[PATCH 0/2] target/riscv: Only build qemu-system-riscv$$ on rv$$ host

Per Anup Patel in [*]: > Currently, we only support running rv64 guest on rv64 host > and rv32 guest on rv32 host. > > In the future, we might support running rv32 guest on rv64 > host but as of now we don't see a strong push for it. Therefore, when only using the KVM accelerator it is point

[PATCH 1/2] target/riscv: Only unify 'riscv32/64' -> 'riscv' for host cpu in meson

We want to keep the ability to distinct between 32/64-bit host. Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 11 --- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/meson.build b/meson.build index fc3c14a810..649de244c6 100644 --- a/meson.build +++ b/meson.build

[PATCH 2/2] target/riscv: Only build KVM guest with same wordsize as host

Per Anup Patel in [*]: > Currently, we only support running rv64 guest on rv64 host > and rv32 guest on rv32 host. > > In the future, we might support running rv32 guest on rv64 > host but as of now we don't see a strong push for it. Therefore, when only using the KVM accelerator it is point

[PATCH v2] vdpa: Return -EINVAL if device ack is VIRTIO_NET_ERR

According to VirtIO standard, "The class, command and command-specific-data are set by the driver, and the device sets the ack byte. There is little it can do except issue a diagnostic if ack is not VIRTIO_NET_OK." Therefore, QEMU should stop sending the queued SVQ commands and cancel the device s

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