The following patches are queued for QEMU stable v8.0.3:
https://gitlab.com/qemu-project/qemu/-/commits/staging-8.0
Patch freeze is 2023-07-06, and the release is planned for 2023-07-08:
https://wiki.qemu.org/Planning/8.0
Please respond here or CC qemu-sta...@nongnu.org on any additional pa
From: Prasad Pandit
vhost_dev_start function does not release memory_listener object
in case of an error. This may crash the guest when vhost is unable
to set memory table:
stack trace of thread 125653:
Program terminated with signal SIGSEGV, Segmentation fault
#0 memory_listener_register
From: Cédric Le Goater
As mentioned in docs/devel/style.rst "Automatic memory deallocation":
* Variables declared with g_auto* MUST always be initialized,
otherwise the cleanup function will use uninitialized stack memory
This avoids QEMU to coredump when running the "hash test" command
under
From: Nicholas Piggin
ppc hypervisors turn HEAI interrupts into program interrupts injected
into the guest that executed the illegal instruction, if the hypervisor
doesn't handle it some other way.
The nested-hv implementation failed to account for this HEAI->program
conversion. The virtual hype
From: Ilya Leoshkevich
In qemu-user-s390x, /proc/cpuinfo contains:
processor 0: version = 00, identification = 00, machine = 8561
processor 1: version = 00, identification = 40, machine = 8561
The highest nibble is supposed to contain the CPU address, but it's off
by
From: Cédric Le Goater
As mentioned in docs/devel/style.rst "Automatic memory deallocation":
* Variables declared with g_auto* MUST always be initialized,
otherwise the cleanup function will use uninitialized stack memory
This avoids QEMU to coredump when running the "hash test" command
under
From: Nicholas Piggin
Some of the PMU hflags bits can go out of synch, for example a store to
MMCR0 with PMCjCE=1 fails to update hflags correctly and results in
hflags mismatch:
qemu: fatal: TCG hflags mismatch (current:0x2408003d rebuilt:0x240a003d)
This can be reproduced by running perf on
From: David Woodhouse
Coverity points out that if (!s && !s->impl) isn't really what we intended
to do here. CID 1508131.
Fixes: 032475127225 ("hw/xen: Add emulated implementation of XenStore
operations")
Signed-off-by: David Woodhouse
Reviewed-by: Paul Durrant
Reviewed-by: Peter Maydell
Mes
From: Helge Deller
Update SeaBIOS-hppa to version 8.
Fixes:
- boot of HP-UX with SMP, and
- reboot of Linux and HP-UX with SMP
Enhancements:
- show qemu version in boot menu
- adds exit menu entry in boot menu to quit emulation
- allow to trace PCD_CHASSIS codes & machine run status
Signed-off
From: Ilya Leoshkevich
LOCFHR should write top-to-top, but QEMU erroneously writes
bottom-to-top.
Fixes: 45aa9aa3b773 ("target/s390x: Implement load-on-condition-2 insns")
Cc: qemu-sta...@nongnu.org
Reported-by: Mikhail Mitskevich
Closes: https://gitlab.com/qemu-project/qemu/-/issues/1668
Signe
From: Ilya Leoshkevich
LCBB is supposed to overwrite only the bottom 32 bits, but QEMU
erroneously overwrites the entire register.
Fixes: 6d9303322ed9 ("s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARY")
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230526181240.142
From: Anastasia Belova
job may be NULL if queue->exit is true. Check
it before dereference job.
Fixes: f31f9c1080 ("vnc: add magic cookie to VncState")
Signed-off-by: Anastasia Belova
Reviewed-by: Michael Tokarev
Signed-off-by: Michael Tokarev
(cherry picked from commit bdfca8a22f41e7ad47fd2d
From: Peter Maydell
The nrf51_timer has a free-running counter which we implement using
the pattern of using two fields (update_counter_ns, counter) to track
the last point at which we calculated the counter value, and the
counter value at that time. Then we can find the current counter
value by
From: Marc-André Lureau
Before sdl2_gl_update() is called, sdl2_gl_switch() may decide to
destroy the console window and its associated shaders.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1644
Fixes: c84ab0a500a8 ("ui/console: optionally update after gfx switch")
Signed-off-by: Mar
From: Ilya Leoshkevich
Add a small test to prevent regressions.
Signed-off-by: Ilya Leoshkevich
Acked-by: Alex Bennée
Message-Id: <20230510230213.330134-3-...@linux.ibm.com>
Signed-off-by: Thomas Huth
(cherry picked from commit be4a4cb429617a8b6893733b37b6203e4b7bf35b)
Signed-off-by: Michael
From: Ani Sinha
When a peer nic is still attached to the vdpa backend, it is too early to free
up the vhost-net and vdpa structures. If these structures are freed here, then
QEMU crashes when the guest is being shut down. The following call chain
would result in an assertion failure since the poi
From: Nicholas Piggin
lqarx does not set cpu_reserve, which causes stqcx. to never succeed.
Cc: qemu-sta...@nongnu.org
Fixes: 94bf2658676 ("target/ppc: Use atomic load for LQ and LQARX")
Fixes: 57b38ffd0c6 ("target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ,
STQ")
Signed-off-by: Nicholas
From: Christian Schoenebeck
The 9p protocol does not specifically define how server shall behave when
client tries to open a special file, however from security POV it does
make sense for 9p server to prohibit opening any special file on host side
in general. A sane Linux 9p client for instance w
From: Mark Somerville
Allow the Linux guest agent to attempt each of the suspend methods
(systemctl, pm-* and writing to /sys) in turn.
Prior to this guests without systemd failed to suspend due to
`guest_suspend` returning early regardless of the return value of
`systemd_supports_mode`.
Signed
The following patches are queued for QEMU stable v7.2.4:
https://gitlab.com/qemu-project/qemu/-/commits/staging-7.2
Patch freeze is 2023-07-06, and the release is planned for 2023-07-08:
https://wiki.qemu.org/Planning/7.2
Please respond here or CC qemu-sta...@nongnu.org on any additional pa
From: Ilya Leoshkevich
Currently single-stepping SVC executes two instructions. The reason is
that EXCP_DEBUG for the SVC instruction itself is masked by EXCP_SVC.
Fix by re-raising EXCP_DEBUG.
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230510230213.330134-2-...@linux.ibm.com>
Signed-off-by
From: Ilya Leoshkevich
Add a small test to prevent regressions.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230526181240.1425579-5-...@linux.ibm.com>
Reviewed-by: Richard Henderson
Reviewed-by: David Hildenbrand
Signed-off-by: Thomas Huth
(cherry picked from com
On Mon, Jun 26, 2023 at 02:27:32PM -0400, Peter Xu wrote:
> On Fri, Jun 23, 2023 at 02:25:05PM -0400, Steven Sistare wrote:
> > On 6/21/2023 4:28 PM, Peter Xu wrote:
> > > On Wed, Jun 21, 2023 at 03:15:42PM -0400, Steven Sistare wrote:
> > >> On 6/20/2023 5:46 PM, Peter Xu wrote:
> > >>> On Thu, Ju
From: Helge Deller
When the OS triggers a reboot, the reset helper function sends a
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET) together with an
EXCP_HLT exception to halt the CPUs.
So, at reboot when initializing the CPUs again, make sure to set all
instruction pointers to the firmwar
From: Helge Deller
Update SeaBIOS-hppa to version 7 which fixes a boot problem
with Debian-12 install CD images.
The problem with Debian-12 is, that the ramdisc got bigger
than what the firmware could load in one call to the LSI
scsi driver.
Signed-off-by: Helge Deller
(cherry picked from comm
From: Mattias Nissler
The printed offset value is prefixed with 0x, but was actually printed
in decimal. To spare others the confusion, adjust the format specifier
to hexadecimal.
Signed-off-by: Mattias Nissler
Reviewed-by: Jagannathan Raman
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by:
From: Peter Maydell
We use __builtin_subcll() to do a 64-bit subtract with borrow-in and
borrow-out when the host compiler supports it. Unfortunately some
versions of Apple Clang have a bug in their implementation of this
intrinsic which means it returns the wrong value. The effect is that
a QE
From: Christian Schoenebeck
The 9p protocol does not specifically define how server shall behave when
client tries to open a special file, however from security POV it does
make sense for 9p server to prohibit opening any special file on host side
in general. A sane Linux 9p client for instance w
From: Peter Maydell
In commit 2c5fa0778c3b430 we fixed an endianness bug in the Allwinner
A10 PIC model; however in the process we introduced a regression.
This is because the old code was robust against the incoming 'level'
argument being something other than 0 or 1, whereas the new code was
not
Hi Marc-André Lureau,
On 6/26/2023 4:56 AM, Marc-André Lureau wrote:
Hi
On Wed, Jun 21, 2023 at 11:53 PM Dongwon Kim
wrote:
x and y offsets and width and height of the scanout texture
is not correctly configured in case guest scanout frame is
dmabuf.
Cc: Gerd Hoffmann
Peter Maydell writes:
> On Fri, 23 Jun 2023 at 13:21, Alex Bennée wrote:
>>
>> We can return XKB_MOD_INVALID which rightly gets flagged by sanitisers
>> as an overly wide shift attempt.
>>
>> Signed-off-by: Alex Bennée
>
> Same comments as on the first version of this patch:
> looks OK code-w
We recently missed a regression that should have been picked up by
check-tcg. This was because the libmem plugin is effectively a NOP if
the user doesn't specify the type to use.
Rather than changing the default behaviour add an additional expansion
so we can take this into account in future.
Mes
From: Daniel P. Berrangé
The coverage job wants to publish a coverage report on success, but the
tests might fail and in that case we need the meson logs for debugging.
Signed-off-by: Daniel P. Berrangé
Reviewed-by: Richard Henderson
Message-Id: <20230623122100.1640995-3-alex.ben...@linaro.org
From: Daniel P. Berrangé
If not set explicitly, gitlab assumes 'when: on_success" as the
publishing criteria for artifacts. This is reasonable if the
artifact is an output deliverable of the job. This is useless
if the artifact is a log file to be used for debugging job
failures.
This change mak
From: Ani Sinha
When new dependencies and packages are added to containers, its important to
run CI container generation pipelines on gitlab to make sure that there are no
obvious conflicts between packages that are being added and those that are
already present. Running CI container pipelines wi
We can return XKB_MOD_INVALID which rightly gets flagged by sanitisers
as an overly wide shift attempt.
Signed-off-by: Alex Bennée
---
qemu-keymap.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/qemu-keymap.c b/qemu-keymap.c
index 229866e004..8c80f
This keeps timing out on gitlab due to some qtests taking a long time.
As this is just ensuring the gcov machinery is working and not
attempting to be comprehensive lets skip qtest in this run.
Message-Id: <20230623122100.1640995-4-alex.ben...@linaro.org>
Reviewed-by: Richard Henderson
Signed-off
As softfreeze is fast approaching I thought it would be work combining
my various trees into an omnibus series to ease the review and
merging.
The testing updates exposed a number of latent leaks that confused the
oss-fuzz jobs (hence the test-fuzz addition to help debug that). This
also includes
I need advice on how to debug this.
One thing that stands out is uhci_irq().
It reads a u16 from the USBSTS register.
On the qemu side, this read is served from bmdma_read. Since the read
size is 2, the result is ~0, and uhci_irq() turns the controller off.
In other words, memory_region_ops_read
On Sun 25 Jun 2023 04:56:27 PM +08, zhenwei pi wrote:
> Use enum ThrottleTimerType instead of number index.
> +typedef enum {
> +THROTTLE_TIMER_READ = 0,
> +THROTTLE_TIMER_WRITE,
> +THROTTLE_TIMER_MAX
> +} ThrottleTimerType;
If you're doing this I suppose you could also change 'bool i
On Sun 25 Jun 2023 04:56:28 PM +08, zhenwei pi wrote:
> Use enum ThrottleTimerType instead in the throttle test codes.
>
> Signed-off-by: zhenwei pi
Reviewed-by: Alberto Garcia
Berto
On Sun 25 Jun 2023 04:56:31 PM +08, zhenwei pi wrote:
> Operations on a crytpodev are considered as *write* only, the callback
> of read direction is never invoked. Use NULL instead of an unreachable
> path(cryptodev_backend_throttle_timer_cb on read direction).
>
> Signed-off-by: zhenwei pi
Revi
On Sun 25 Jun 2023 04:56:30 PM +08, zhenwei pi wrote:
> Signed-off-by: zhenwei pi
Reviewed-by: Alberto Garcia
Berto
On Sun 25 Jun 2023 04:56:29 PM +08, zhenwei pi wrote:
> void throttle_timers_attach_aio_context(ThrottleTimers *tt,
> AioContext *new_context)
> {
> -tt->timers[THROTTLE_TIMER_READ] =
> -aio_timer_new(new_context, tt->clock_type, SCALE_NS,
> -
On 6/26/23 14:26, Michael Tokarev wrote:
26.06.2023 08:56, Cédric Le Goater wrote:
From: Nicholas Piggin
Fix missing env->ca restore when going from L2 back to the host.
Fixes: 120f738a467 ("spapr: implement nested-hv capability for the virtual
hypervisor")
Reviewed-by: Harsh Prateek Bora
S
From: Daniel P. Berrangé
If not set explicitly, gitlab assumes 'when: on_success" as the
publishing criteria for artifacts. This is reasonable if the
artifact is an output deliverable of the job. This is useless
if the artifact is a log file to be used for debugging job
failures.
This change mak
As softfreeze is fast approaching I thought it would be work combining
my various trees into an omnibus series to ease the review and
merging.
The testing updates exposed a number of latent leaks that confused the
oss-fuzz jobs (hence the test-fuzz addition to help debug that). This
also includes
From: Daniel P. Berrangé
The coverage job wants to publish a coverage report on success, but the
tests might fail and in that case we need the meson logs for debugging.
Signed-off-by: Daniel P. Berrangé
Reviewed-by: Richard Henderson
Message-Id: <20230623122100.1640995-3-alex.ben...@linaro.org
We need a native compiler to build the hexagon codegen tools. In our
current images we already have a gcc as a side effect of a broken
dependency between gcovr and lcov but this will be fixed when we move
to bookworm. See
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=987818 for details.
Update
Running the fuzzer requires some hoop jumping and some problems only
show up in containers. This basically replicates the build-oss-fuzz
job from our CI so we can run in the same containers we use in CI.
Signed-off-by: Alex Bennée
---
tests/docker/test-fuzz | 28
1 f
This is yet another make target you usually run in the top level of
the source directory.
Message-Id: <20230623122100.1640995-12-alex.ben...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
We recently missed a regression that should have been picked up by
check-tcg. This was because the libmem plugin is effectively a NOP if
the user doesn't specify the type to use.
Rather than changing the default behaviour add an additional expansion
so we can take this into account in future.
Mes
From: Marcin Juszkiewicz
Update prebuilt firmware images to have TF-A with FEAT_FGT support
enabled. This allowed us to enable test for "max" cpu in sbsa-ref
machine.
Signed-off-by: Marcin Juszkiewicz
Message-Id: <20230530152240.79160-1-marcin.juszkiew...@linaro.org>
Signed-off-by: Alex Bennée
From: Erik Skultety
Fedora 37 -> 38
Signed-off-by: Erik Skultety
Acked-by: Richard Henderson
Message-Id: <20230623122100.1640995-14-alex.ben...@linaro.org>
Message-Id:
[AJB: Dropped alpine (in prev commit), reflow commit msg]
Signed-off-by: Alex Bennée
---
tests/docker/dockerfiles/fedora-w
From: Ani Sinha
When new dependencies and packages are added to containers, its important to
run CI container generation pipelines on gitlab to make sure that there are no
obvious conflicts between packages that are being added and those that are
already present. Running CI container pipelines wi
When updating to the latest fedora the santizer found more leaks
inside xkbmap:
FAILED: pc-bios/keymaps/ar
/builds/stsquad/qemu/build-oss-fuzz/qemu-keymap -f pc-bios/keymaps/ar -l ara
=
==3604==ERROR: LeakSanitizer: detected m
We still need to base this on Debian Sid until riscv64 is promoted to
a release architecture (or another distro provides a full cross
compile target). We use the new qemu-minimal project description to
avoid bringing in all the extra dependencies because every extra
package is another chance for si
We can return XKB_MOD_INVALID which rightly gets flagged by sanitisers
as an overly wide shift attempt.
Signed-off-by: Alex Bennée
---
qemu-keymap.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/qemu-keymap.c b/qemu-keymap.c
index 229866e004..8c80f
This keeps timing out on gitlab due to some qtests taking a long time.
As this is just ensuring the gcov machinery is working and not
attempting to be comprehensive lets skip qtest in this run.
Message-Id: <20230623122100.1640995-4-alex.ben...@linaro.org>
Reviewed-by: Richard Henderson
Signed-off
We need this for the riscv64 and gcc-native mappings. As the older
alpine release has been dropped from the mappings we also need to bump
the version of alpine we use.
Message-Id: <20230623122100.1640995-13-alex.ben...@linaro.org>
Acked-by: Richard Henderson
Signed-off-by: Alex Bennée
---
tests
We're now ready to update the multi-letter extensions status for KVM.
kvm_riscv_update_cpu_cfg_isa_ext() is called called during vcpu creation
time to verify which user options changes host defaults (via the 'user_set'
flag) and tries to write them back to KVM.
Failure to commit a change to KVM i
Let's add KVM user properties for the multi-letter extensions that KVM
currently supports: zicbom, zicboz, zihintpause, zbb, ssaia, sstc,
svinval and svpbmt.
As with MISA extensions, we're using the KVMCPUConfig type to hold
information about the state of each extension. However, multi-letter
exte
This is a very bare bones set of dependencies for a minimal build of
QEMU. This will be useful for minimal cross-compile sanity check based
on things like Debian Sid where stuff isn't always in sync.
Message-Id: <20230623122100.1640995-16-alex.ben...@linaro.org>
Signed-off-by: Alex Bennée
---
v2
An update to the clang tooling detects more issues with the code
including a memory leak from the g_string_new() allocation. Clean up
the code with g_autoptr and use ARRAY_SIZE while we are at it.
Signed-off-by: Alex Bennée
---
tests/qtest/fuzz/generic_fuzz.c | 11 ---
1 file changed, 4
Following the same logic used with 'mvendorid' let's also restrict
'mimpid' for named CPUs. Generic CPUs keep setting the value freely.
Note that we're getting rid of the default RISCV_CPU_MARCHID value. The
reason is that this is not a good default since it's dynamic, changing
with with every QEM
Using all TCG user properties in KVM is tricky. First because KVM
supports only a small subset of what TCG provides, so most of the
cpu->cfg flags do nothing for KVM.
Second, and more important, we don't have a way of telling if any given
value is an user input or not. For TCG this has a small imp
Hi,
This version has a change requested by Andrew in patch 16.
All patches aside from patch 16 are acked/reviewed.
Changes from v3:
- patch 16:
- error out with a "extension is not available with KVM"
- v3 link: https://lists.gnu.org/archive/html/qemu-devel/2023-06/msg04575.html
Daniel Henri
We're going to change the handling of mvendorid/marchid/mimpid by the
KVM driver. Since these are always present in all CPUs let's put the
same validation for everyone.
It doesn't make sense to allow 'mvendorid' to be different than it
is already set in named (vendor) CPUs. Generic (dynamic) CPUs
'marchid' shouldn't be set to a different value as previously set for
named CPUs.
For all other CPUs it shouldn't be freely set either - the spec requires
that 'marchid' can't have the MSB (most significant bit) set and every
other bit set to zero, i.e. 0x8000 is an invalid 'marchid' value for
Our design philosophy with KVM properties can be resumed in two main
decisions based on KVM interface availability and what the user wants to
do:
- if the user disables an extension that the host KVM module doesn't
know about (i.e. it doesn't implement the kvm_get_one_reg() interface),
keep bootin
Lets try and keep the overview of the sub-system digestible by
splitting the core API stuff into a separate file. As QOM and QDEV
work together we should also try and enumerate the qdev_ functions.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Message-Id: <20230619171437.357374-
The old g_memdup is deprecated, use the replacement.
Message-Id: <20230623122100.1640995-21-alex.ben...@linaro.org>
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/contrib/plugins/lockst
Mention that QOM-ified devices already have support for registering
the description.
Reviewed-by: Juan Quintela
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Acked-by: Peter Xu
Signed-off-by: Alex Bennée
Message-Id: <20230619171437.357374-3-alex.ben...@linaro.org>
---
in
riscv_isa_string_ext() is being used by riscv_isa_string(), which is
then used by boards to retrieve the 'riscv,isa' string to be written in
the FDT. All this happens after riscv_cpu_realize(), meaning that we're
already past riscv_cpu_validate_set_extensions() and, more important,
riscv_cpu_disabl
If we don't set a proper cbom_blocksize|cboz_blocksize in the FDT the
Linux Kernel will fail to detect the availability of the CBOM/CBOZ
extensions, regardless of the contents of the 'riscv,isa' DT prop.
The FDT is being written using the cpu->cfg.cbom|z_blocksize attributes,
so let's expose them
Allow 'marchid' and 'mimpid' to also be initialized in
kvm_riscv_init_machine_ids().
After this change, the handling of mvendorid/marchid/mimpid for the
'host' CPU type will be equal to what we already have for TCG named
CPUs, i.e. the user is not able to set these values to a different val
than t
There are 2 places in which we need to get a pointer to a certain
property of the cpu->cfg struct based on property offset. Next patch
will add a couple more.
Create a helper to avoid repeating this code over and over.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
---
target
Give an overview of the most useful bits of the devel documentation to
read depending on what the developer wants to do.
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-Id: <20230619171437.357374-2-alex.ben...@linaro.org>
---
v2
- removed excessiv
Fix up the kerneldoc markup and start documenting the various fields
in QDEV related structures. This involved:
- moving overall description to a DOC: comment at top
- fixing various markup issues for types and structures
- adding missing Return: statements
- adding some typedefs to hide QLIST
At this moment we're retrieving env->misa_ext during
kvm_arch_init_cpu(), leaving env->misa_ext_mask behind.
We want to set env->misa_ext_mask, and we want to set it as early as
possible. The reason is that we're going to use it in the validation
process of the KVM MISA properties we're going to a
From: Philippe Mathieu-Daudé
Per commit 067109a11c ("docs/devel: mention the spacing requirement
for QOM"):
For a storage structure the first declaration should always be
called “parent_obj” and for a class structure the first member
should always be called “parent_class”
Adapt the QOM rS
Next patch will add KVM specific user properties for both MISA and
multi-letter extensions. For MISA extensions we want to make use of what
is already available in misa_ext_cfgs[] to avoid code repetition.
misa_ext_info_arr[] array will hold name and description for each MISA
extension that misa_e
Update to commit ac9a78681b92 ("Linux 6.4-rc1").
Signed-off-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
---
include/standard-headers/linux/const.h| 2 +-
include/standard-headers/linux/virtio_blk.h | 18 +++
.../standard-headers/linux/virtio_config.h| 6 +++
inclu
Certain validations, such as the validations done for the machine IDs
(mvendorid/marchid/mimpid), are done before starting the CPU.
Non-dynamic (named) CPUs tries to match user input with a preset
default. As it is today we can't prefetch a KVM default for these cases
because we're only able to rea
It was hard to track down this leak as it was an internal allocation
by glib and the backtraces did not give much away. The autofree was
freeing the allocation with g_free() but not taking care of the
individual strings. They should have been freed with g_strfreev()
instead.
Searching the glib sou
After changing user validation for mvendorid/marchid/mimpid to guarantee
that the value is validated on user input time, coupled with the work in
fetching KVM default values for them by using a scratch CPU, we're
certain that the values in cpu->cfg.(mvendorid|marchid|mimpid) are
already good to be
KVM-specific properties are being created inside target/riscv/kvm.c. But
at this moment we're gathering all the remaining properties from TCG and
adding them as is when running KVM. This creates a situation where
non-KVM properties are setting flags to 'true' due to its default
settings (e.g. Zawr
Using QOM correctly is increasingly important to maintaining a modern
code base. However the current documentation skips some important
concepts before launching into a simple example. Lets:
- at least mention properties
- mention TYPE_OBJECT and TYPE_DEVICE
- talk about why we have realize/
The absence of a satp mode in riscv_host_cpu_init() is causing the
following error:
$ sudo ./qemu/build/qemu-system-riscv64 -machine virt,accel=kvm \
-m 2G -smp 1 -nographic -snapshot \
-kernel ./guest_imgs/Image \
-initrd ./guest_imgs/rootfs_kvm_riscv64.img \
-append "earlycon=s
From: Richard Henderson
This is a perfectly natural occurrence for x86 "rep movb",
where the "rep" prefix forms a counted loop of the one insn.
During the tests/tcg/multiarch/memory test, this logging is
triggered over 35 times. Within the context of cross-i386-tci
build, which is already s
As it is today it's not possible to use '-cpu host' if the RISC-V host
has RVH enabled. This is the resulting error:
$ sudo ./qemu/build/qemu-system-riscv64 \
-machine virt,accel=kvm -m 2G -smp 1 \
-nographic -snapshot -kernel ./guest_imgs/Image \
-initrd ./guest_imgs/rootfs_kvm_riscv
The lack of SVE memory instrumentation has been an omission in plugin
handling since it was introduced. Fortunately we can utilise the
probe_* functions to force all all memory access to follow the slow
path. We do this by checking the access type and presence of plugin
memory callbacks and if set
On Tue Jun 27, 2023 at 7:45 AM AEST, Cédric Le Goater wrote:
> On 6/26/23 14:26, Michael Tokarev wrote:
> > 26.06.2023 08:56, Cédric Le Goater wrote:
> >> From: Nicholas Piggin
> >>
> >> Fix missing env->ca restore when going from L2 back to the host.
> >>
> >> Fixes: 120f738a467 ("spapr: implemen
We only build for 32/64-bit hosts, so TCG is required for
128-bit targets.
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/cpu.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 175dbc9826..7f281cdcf6 100644
---
riscv_cpu_do_interrupt() is not reachable on user emulation.
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/cpu.h| 5 +++--
target/riscv/cpu_helper.c | 7 ++-
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 83a9a965
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/cpu.c| 8 +---
target/riscv/cpu_helper.c | 2 ++
target/riscv/csr.c| 2 ++
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 4035fe0e62..175dbc9826 100644
--- a/ta
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/cpu_helper.c| 83 --
target/riscv/tcg/cpu.c | 97
target/riscv/tcg/meson.build | 1 +
3 files changed, 98 insertions(+), 83 deletions(-)
create mode 100644 target/ri
We want to extract TCG/sysemu-specific code from cpu_helper.c,
but some functions call riscv_cpu_pending_to_irq(). Expose the
prototype in "internals.h".
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/internals.h | 4
target/riscv/cpu_helper.c | 6 +++---
2 files changed, 7 inserti
Extract TCG-specific code from debug.c to tcg/sysemu/debug.c,
restrict the prototypes to TCG, adapt meson rules.
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/debug.h| 2 +
target/riscv/debug.c| 148 -
target/riscv/tcg/sysemu/deb
Move TCG-specific files to the a new 'tcg' sub-directory. Add
stubs for riscv_cpu_[get/set]_fflags and riscv_raise_exception().
Adapt meson rules.
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/{ => tcg}/XVentanaCondOps.decode | 0
target/riscv/{ => tcg}/insn16.decode | 0
tar
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