On Fri, Jun 23, 2023 at 5:58 AM Ilya Maximets wrote:
>
> AF_XDP is a network socket family that allows communication directly
> with the network device driver in the kernel, bypassing most or all
> of the kernel networking stack. In the essence, the technology is
> pretty similar to netmap. But,
On 6/24/23 13:50, Helge Deller wrote:
The following changes since commit b455ce4c2f300c8ba47cba7232dd03261368a4cb:
Merge tag 'q800-for-8.1-pull-request' ofhttps://github.com/vivier/qemu-m68k
into staging (2023-06-22 10:18:32 +0200)
are available in the Git repository at:
https://github
On 6/23/23 14:31, Peter Maydell wrote:
Hi; here's a target-arm pullreq. Mostly this is RTH's FEAT_RME
series; there are also a handful of bug fixes including some
which aren't arm-specific but which it's convenient to include
here.
thanks
-- PMM
The following changes since commit b455ce4c2f300c
With icount shift=auto, the QEMU_CLOCK_VIRTUAL can be adjusted backwards
after a warp, resulting in the machine observing time going backwards.
Linux on powerpc can't handle this, and it results in lockup due to a
time delta underflowing.
This patch seems to solve it, no more backwards time observ
Hi,
v1:
- introduce enum ThrottleTimerType instead of timers[0], timer[1]...
- support read-only and write-only for throttle
- adapt related test codes
- cryptodev uses a write-only throttle timer
Zhenwei Pi (5):
throttle: introduce enum ThrottleTimerType
test-throttle: use enum ThrottleTimer
Only one direction is necessary in several scenarios:
- a read-only disk
- operations on a device are considered as *write* only. For example,
encrypt/decrypt/sign/verify operations on a cryptodev use a single
*write* timer(read timer callback is defined, but never invoked).
Allow a single dir
Signed-off-by: zhenwei pi
---
tests/unit/test-throttle.c | 66 ++
1 file changed, 66 insertions(+)
diff --git a/tests/unit/test-throttle.c b/tests/unit/test-throttle.c
index 5fc2de4d47..d7973980d1 100644
--- a/tests/unit/test-throttle.c
+++ b/tests/unit/test-t
24.06.2023 14:50, Helge Deller пишет:
When the OS triggers a reboot, the reset helper function sends a
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET) together with an
EXCP_HLT exception to halt the CPUs.
So, at reboot when initializing the CPUs again, make sure to set all
instruction poin
Use enum ThrottleTimerType instead of number index.
Signed-off-by: zhenwei pi
---
include/qemu/throttle.h | 12 +---
util/throttle.c | 16 +---
2 files changed, 18 insertions(+), 10 deletions(-)
diff --git a/include/qemu/throttle.h b/include/qemu/throttle.h
index 05f
Operations on a crytpodev are considered as *write* only, the callback
of read direction is never invoked. Use NULL instead of an unreachable
path(cryptodev_backend_throttle_timer_cb on read direction).
Signed-off-by: zhenwei pi
---
backends/cryptodev.c | 3 +--
1 file changed, 1 insertion(+), 2
Use enum ThrottleTimerType instead in the throttle test codes.
Signed-off-by: zhenwei pi
---
tests/unit/test-throttle.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/unit/test-throttle.c b/tests/unit/test-throttle.c
index 7adb5e6652..5fc2de4d47 100644
--- a/test
On Fri, Jun 23, 2023 at 3:06 PM Peter Maydell wrote:
>
> On Fri, 26 May 2023 at 16:32, Eugenio Pérez wrote:
> >
> > QEMU v8.0 is able to switch dynamically between vhost-vdpa passthrough
> > and SVQ mode as long as the net device does not have CVQ. The net device
> > state followed (and migrated
On Fri Jun 23, 2023 at 9:51 PM AEST, BALATON Zoltan wrote:
> On Fri, 23 Jun 2023, Nicholas Piggin wrote:
> > checkstop state does not halt the system, interrupts continue to be
> > serviced, and other CPUs run.
> >
> > Stop the machine with vm_stop(), and print a register dump too.
> >
> > Signed-o
On Fri Jun 23, 2023 at 7:10 PM AEST, Peter Maydell wrote:
> On Fri, 23 Jun 2023 at 09:21, Nicholas Piggin wrote:
> >
> > ppc has always silently ignored access to real (physical) addresses
> > with nothing behind it, which can make debugging difficult at times.
> >
> > It looks like the way to han
On Fri Jun 23, 2023 at 11:20 PM AEST, Fabiano Rosas wrote:
> Nicholas Piggin writes:
>
> > From: BALATON Zoltan
> >
> > All powerpc exception handlers share some code when handling machine
> > check exceptions. Move this to a common function.
> >
>
> Maybe Machine Check is simple enough, but this
From: Zhipeng Lu
Signed-off-by: Zhipeng Lu
---
contrib/gitdm/domain-map | 1 +
1 file changed, 1 insertion(+)
diff --git a/contrib/gitdm/domain-map b/contrib/gitdm/domain-map
index 3727918641..2f9dd66ef8 100644
--- a/contrib/gitdm/domain-map
+++ b/contrib/gitdm/domain-map
@@ -43,3 +43,4 @@ win
On 6/25/23 10:57, Michael Tokarev wrote:
24.06.2023 14:50, Helge Deller пишет:
When the OS triggers a reboot, the reset helper function sends a
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET) together with an
EXCP_HLT exception to halt the CPUs.
So, at reboot when initializing the CPUs ag
On Thu, Jun 22, 2023 at 5:02 AM Hawkins Jiawei wrote:
>
> This patch refactors vhost_vdpa_net_load_mac() to
> restore the MAC address filtering state at device's startup.
>
> Signed-off-by: Hawkins Jiawei
> ---
> net/vhost-vdpa.c | 39 ++-
> 1 file changed, 38
Several instructions and register access require icount reads and are
missing translator_io_start().
Signed-off-by: Nicholas Piggin
---
target/ppc/translate.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index eb278c2683..c1c3cd8767 1
The powernv machine can boot Linux to VFS mount with icount enabled.
Add a test case for it.
Signed-off-by: Nicholas Piggin
---
tests/avocado/replay_kernel.py | 16
1 file changed, 16 insertions(+)
diff --git a/tests/avocado/replay_kernel.py b/tests/avocado/replay_kernel.py
ind
On Thu, Jun 22, 2023 at 3:07 AM Hawkins Jiawei wrote:
>
> According to the VirtIO standard, "Since there are no guarantees,
> it can use a hash filter or silently switch to
> allmulti or promiscuous mode if it is given too many addresses."
> To achive this, QEMU ignores MAC addresses and marks `ma
On Thu, Jun 22, 2023 at 5:02 AM Hawkins Jiawei wrote:
>
> Enable SVQ with VIRTIO_NET_F_CTRL_RX feature.
>
> Signed-off-by: Hawkins Jiawei
Acked-by: Eugenio Pérez
> ---
> net/vhost-vdpa.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
> index 355a6
On 25/6/23 11:41, luzhipeng wrote:
From: Zhipeng Lu
Signed-off-by: Zhipeng Lu
---
contrib/gitdm/domain-map | 1 +
1 file changed, 1 insertion(+)
diff --git a/contrib/gitdm/domain-map b/contrib/gitdm/domain-map
index 3727918641..2f9dd66ef8 100644
--- a/contrib/gitdm/domain-map
+++ b/contrib
On Fri, Jun 23, 2023 at 3:26 PM Hawkins Jiawei wrote:
>
> This patch refactors vhost_vdpa_net_load_rx() to
> restore the packet receive filtering state in relation to
> VIRTIO_NET_F_CTRL_RX_EXTRA feature at device's startup.
>
> Signed-off-by: Hawkins Jiawei
> ---
> net/vhost-vdpa.c | 30 +++
On Fri, Jun 23, 2023 at 3:26 PM Hawkins Jiawei wrote:
>
> Enable SVQ with VIRTIO_NET_F_CTRL_RX_EXTRA feature.
>
> Signed-off-by: Hawkins Jiawei
Acked-by: Eugenio Pérez
> ---
> net/vhost-vdpa.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
> index
On Thu, Jun 22, 2023 at 5:02 AM Hawkins Jiawei wrote:
>
> This patch introduces vhost_vdpa_net_load_rx_mode()
> and vhost_vdpa_net_load_rx() to restore the packet
> receive filtering state in relation to
> VIRTIO_NET_F_CTRL_RX feature at device's startup.
>
> Signed-off-by: Hawkins Jiawei
> ---
>
From: Zhipeng Lu
Signed-off-by: Zhipeng Lu
---
contrib/gitdm/domain-map | 1 +
meson| 2 +-
qapi/block-core.json | 3 ++-
roms/SLOF| 2 +-
roms/opensbi | 2 +-
roms/qboot | 2 +-
roms/seabios | 2 +-
roms/seabios-hppa
On 6/25/23 12:07, Helge Deller wrote:
On 6/25/23 10:57, Michael Tokarev wrote:
24.06.2023 14:50, Helge Deller пишет:
When the OS triggers a reboot, the reset helper function sends a
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET) together with an
EXCP_HLT exception to halt the CPUs.
So,
POWER book4 (implementation-specific) SPRs are sometimes in their own
functions, but in other cases are mixed with architected SPRs. Do some
spring cleaning on these.
Reviewed-by: Cédric Le Goater
Signed-off-by: Nicholas Piggin
---
target/ppc/cpu_init.c | 82 +---
TFMR is the Time Facility Management Register which is specific to
POWER CPUs, and used for the purpose of timebase management (generally
by firmware, not the OS).
Add helpers for the TFMR register, which will form part of the core
timebase facility model in future but for now behaviour is unchang
Cedric kindly reviewed these already so I think they should be
good to go now. This is just a rebase and slight rewording the
changelog. Still haven't completed the main chiptod device yet.
Thanks,
Nick
Nicholas Piggin (2):
target/ppc: Tidy POWER book4 SPR registration
target/ppc: Add TFMR SP
HDEC interrupts are edge-triggered on HDECR underflow (notably different
from DEC which is level-triggered).
HDEC interrupts already clear the irq on delivery so that does not need
to be changed.
Signed-off-by: Nicholas Piggin
---
hw/ppc/ppc.c | 16 +---
1 file changed, 9 insertions
The clock update logic reads the clock twice to compute the new clock
value, with a value derived from the later time subtracted from a value
derived from the earlier time. This can lead to an underflow in
subtractions in bits that are intended to cancel exactly. This might
not cause any real probl
On 2023/6/19 17:18:23, "Claudio Imbrenda" wrote:
On Sat, 17 Jun 2023 13:36:18 +0800
Bin Meng wrote:
When opening /proc/self/fd fails, current codes just return directly,
but we can fall back to close fds one by one.
Signed-off-by: Bin Meng
---
(no changes since v2)
Changes in v2:
Apple sungem devices are expected to have WOL MMIO registers.
Add a region to prevent transaction failures, and implement the
WOL-disable CSR write because the Linux driver reset writes
this.
Signed-off-by: Nicholas Piggin
---
This fixes the failed MMIO error in the Linux sungem driver reset
when
On Fri, Jun 23, 2023 at 02:51:11PM +0200, David Hildenbrand wrote:
> On 23.05.23 20:30, David Hildenbrand wrote:
> > Let's separate plug and unplug handling to prepare for future changes
> > and make the code a bit easier to read -- working on block states
> > (plugged/unplugged) instead of on a bi
On Fri, Jun 23, 2023 at 04:57:20PM +0200, Julia Suvorova wrote:
> On Thu, Jun 22, 2023 at 7:48 PM Michael S. Tsirkin wrote:
> >
> > On Thu, Jun 22, 2023 at 05:46:40PM +0200, Julia Suvorova wrote:
> > > On Thu, Jun 22, 2023 at 12:34 PM Ani Sinha wrote:
> > > >
> > > > PCI Express ports only have o
This commit implements a shared library, where native functions are
rewritten as specialized instructions. At runtime, user programs load
the shared library, and specialized instructions are executed when
native functions are called.
Signed-off-by: Yeqi Fu
---
Makefile
Signed-off-by: Yeqi Fu
---
include/qemu/envlist.h | 1 +
util/envlist.c | 61 ++
2 files changed, 62 insertions(+)
diff --git a/include/qemu/envlist.h b/include/qemu/envlist.h
index 6006dfae44..865eb18e17 100644
--- a/include/qemu/envlist.h
+++ b/
Upon encountering specialized instructions reserved for native calls,
store the function id and argument types, then invoke helper.
Signed-off-by: Yeqi Fu
---
target/arm/tcg/translate-a64.c | 27 ++-
target/arm/tcg/translate.c | 25 +++--
target/ar
This patch introduces a set of specialized instructions for native calls
and provides helpers to translate these instructions to corresponding
native functions. A shared library is also implemented, where native
functions are rewritten as specialized instructions. At runtime, user
programs load the
Upon encountering specialized instructions reserved for native calls,
store the function id and argument types, then invoke helper.
Signed-off-by: Yeqi Fu
---
target/i386/tcg/translate.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/target/i386/tcg/transl
Add CONFIG_NATIVE_CALL to architectures supporting native calls.
Signed-off-by: Yeqi Fu
---
configs/targets/aarch64-linux-user.mak | 1 +
configs/targets/arm-linux-user.mak | 1 +
configs/targets/i386-linux-user.mak| 1 +
configs/targets/mips-linux-user.mak| 1 +
configs/targets/mips
This commit implements several helpers for extracting function id and
argument types, and then using this information to invoke native functions.
Signed-off-by: Yeqi Fu
---
accel/tcg/tcg-runtime.c | 37 +
accel/tcg/tcg-runtime.h | 4 ++
include/native/native-calls.h
This commit implements the -native-bypass support in linux-user. The
native_calls_enabled() function can be true only when the
'-native-bypass' option is given.
Signed-off-by: Yeqi Fu
---
linux-user/main.c | 36
1 file changed, 36 insertions(+)
diff --git a/
Signed-off-by: Yeqi Fu
---
docs/native_calls.txt | 70 +++
1 file changed, 70 insertions(+)
create mode 100644 docs/native_calls.txt
diff --git a/docs/native_calls.txt b/docs/native_calls.txt
new file mode 100644
index 00..8906566b13
--- /dev/null
Upon encountering specialized instructions reserved for native calls,
store the function id and argument types, then invoke helper.
Signed-off-by: Yeqi Fu
---
target/mips/tcg/translate.c | 26 ++
target/mips/tcg/translate.h | 2 ++
2 files changed, 28 insertions(+)
diff
Add a test for native calls to verify the functionality of native
functions. This requires cross-compiling test cases and building them
as dynamically linked binaries. Also, introduce necessary system
libraries in QEMU.
Signed-off-by: Yeqi Fu
---
tests/tcg/multiarch/Makefile.target | 9 +-
On 25/6/23 23:27, Yeqi Fu wrote:
This commit implements a shared library, where native functions are
rewritten as specialized instructions. At runtime, user programs load
the shared library, and specialized instructions are executed when
native functions are called.
Signed-off-by: Yeqi Fu
---
On 25/6/23 23:27, Yeqi Fu wrote:
Upon encountering specialized instructions reserved for native calls,
store the function id and argument types, then invoke helper.
Signed-off-by: Yeqi Fu
---
target/mips/tcg/translate.c | 26 ++
target/mips/tcg/translate.h | 2 ++
2
Richard Henderson wrote:
> On 6/22/23 18:54, Juan Quintela wrote:
>> The following changes since commit b455ce4c2f300c8ba47cba7232dd03261368a4cb:
>>Merge tag 'q800-for-8.1-pull-request'
>> ofhttps://github.com/vivier/qemu-m68k into staging (2023-06-22
>> 10:18:32 +0200)
>> are available in th
Hi Remember that this week we have the call that we postponed for KVM
Forum. In it Oracle wants to discuss how to move to integrate their Live
Update series. Please, remember to join. Later, Juan.
QEMU developers fortnightly conference call
Tuesday 2023-06-27 ⋅ 15:00 – 16:00
Central European
On 22/06/2023 11:07, Philippe Mathieu-Daudé wrote:
On 21/6/23 16:06, Mark Cave-Ayland wrote:
On 21/06/2023 10:42, Philippe Mathieu-Daudé wrote:
On 21/6/23 10:53, Mark Cave-Ayland wrote:
[MCA: the original series has now been split into 2 separate parts based upon
Phil's comments re: QOM pare
On 6/24/23 04:32, Andrew Jones wrote:
On Fri, Jun 23, 2023 at 11:14:45AM -0300, Daniel Henrique Barboza wrote:
On 6/23/23 06:38, Andrew Jones wrote:
On Thu, Jun 22, 2023 at 10:56:53AM -0300, Daniel Henrique Barboza wrote:
...
+#define KVM_MISA_CFG(_bit, _reg_id) \
+{.offset = _bit, .k
On 6/24/23 16:29, Philippe Mathieu-Daudé wrote:
These fields shouldn't be accessed when KVM is not available.
Restrict the KVM timer migration state. Rename the KVM timer
post_load() handler accordingly, because cpu_post_load() is
too generic.
Signed-off-by: Philippe Mathieu-Daudé
---
Rev
On Sun Jun 25, 2023 at 5:26 AM AEST, Philippe Mathieu-Daudé wrote:
> The 'kvm_sw_tlb' and 'tlb_dirty' fields introduced in commit
> 93dd5e852c ("kvm: ppc: booke206: use MMU API") are specific
> to KVM and shouldn't be accessed when it is not available.
Reviewed-by: Nicholas Piggin
>
> Signed-off
On 6/23/23 19:16, Cédric Le Goater wrote:
Hello Anushree,
On 6/23/23 13:09, Anushree Mathur wrote:
Hi everyone,
I was trying to boot rhel9.3 image with upstream qemu-system-ppc64
-smp 2 option and observed a segfault (qemu crash).
qemu command line used:
qemu-system-ppc64 -name Rhel9.3.p
Fred and Nick have been hacking baremetal POWER systems (OPAL) for
many years. They use and modify the QEMU models regularly. Add them as
PowerNV reviewers.
Cc: Frédéric Barrat
Cc: Nicholas Piggin
Signed-off-by: Cédric Le Goater
Acked-by: Frederic Barrat
Reviewed-by: Richard Henderson
Reviewe
Fred discusses frequently with the IBM HW designers, he is fluent in
XIVE logic, add him as a reviewer.
Cc: Frédéric Barrat
Signed-off-by: Cédric Le Goater
Acked-by: Frederic Barrat
Reviewed-by: Richard Henderson
Signed-off-by: Cédric Le Goater
---
MAINTAINERS | 1 +
1 file changed, 1 insert
From: Joel Stanley
The phb error macros add a newline for you, so remove the second one to
avoid double whitespace.
Signed-off-by: Joel Stanley
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Cédric Le Goater
Signed-off-by: Cédric Le Goater
---
hw/pci-host/pnv_phb4.c | 14 +++---
1
From: Nicholas Piggin
powerpc ifetch endianness depends on MSR[LE] so it has to byteswap
after cpu_ldl_code(). This corrects DSISR bits in alignment
interrupts when running in little endian mode.
Reviewed-by: Fabiano Rosas
Signed-off-by: Nicholas Piggin
Signed-off-by: Cédric Le Goater
---
ta
Nick has great knowledge of the PowerPC CPUs, software and hardware.
Add him as a reviewer on CPU TCG modeling.
Cc: Nicholas Piggin
Signed-off-by: Cédric Le Goater
Reviewed-by: Richard Henderson
Reviewed-by: Nicholas Piggin
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
From: Nicholas Piggin
Doorbells in SMT need to coordinate msgsnd/msgclr and DPDES access from
multiple threads that affect the same state.
Signed-off-by: Nicholas Piggin
Reviewed-by: Cédric Le Goater
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/ppc.h | 1 +
hw/ppc/ppc.c
From: Nicholas Piggin
The CTRL register is able to write the bit in the RUN field, which gets
reflected into the TS field which is read-only and contains the state of
the RUN field for all threads in the core.
TCG does not implement SMT, so the correct implementation just requires
mirroring the
From: Frederic Barrat
The presenters for xive on P9 and P10 are mostly similar but the
behavior can be tuned through a few CQ registers. This patch adds a
"get_config" method, which will allow to access that config from the
presenter in a later patch.
For now, just define the config for the TIMA
Signed-off-by: Cédric Le Goater
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
hw/ppc/pnv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 590fc64b32e9..fc083173f346 100644
--- a/hw
From: Nicholas Piggin
A relatively simple case to begin with, CTRL is a SMT shared register
where reads and writes need to synchronise against state changes by
other threads in the core.
Atomic serialisation operations are used to achieve this.
Signed-off-by: Nicholas Piggin
Reviewed-by: Cédri
From: Nicholas Piggin
Rather than use a copy of CPUPPCState to store the host state while
the environment has been switched to the L2, use a new struct for
this purpose.
Have helper functions to save and load this host state.
Reviewed-by: Harsh Prateek Bora
Signed-off-by: Nicholas Piggin
Sign
From: Nicholas Piggin
Add mult-thread/core/socket Linux boot tests that ensure the right
topology comes up. Of particular note is a SMT test, which is a new
capability for TCG.
Signed-off-by: Nicholas Piggin
Reviewed-by: Cédric Le Goater
Signed-off-by: Cédric Le Goater
---
tests/avocado/ppc_
From: Nicholas Piggin
Fix missing env->ca restore when going from L2 back to the host.
Fixes: 120f738a467 ("spapr: implement nested-hv capability for the virtual
hypervisor")
Reviewed-by: Harsh Prateek Bora
Signed-off-by: Nicholas Piggin
Signed-off-by: Cédric Le Goater
---
hw/ppc/spapr_hcal
Hi all,
TL,DR: I am working on QEMU ipv6 guestfwd feature and finished coding, and
would like to learn the best practice to test it.
Context: in slirp side this task is tracking by [1].
Currently, I have done following:
i. made char parse + guestfwd functions happy with ipv6 address.
ii. enabled d
The 'bamboo' machine was used as a KVM platform in the early days (~2008).
It clearly doesn't support it anymore.
Signed-off-by: Cédric Le Goater
Reviewed-by: Richard Henderson
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc440_bamboo.c | 17 ++---
1 file changed, 6 insertions(+), 1
From: Nicholas Piggin
ISA v3.1 introduced prefix instructions. Among the changes, various
synchronous interrupts report whether they were caused by a prefix
instruction in (H)SRR1.
The case of instruction fetch that causes an HDSI due to access of a
process-scoped table faulting on the partition
From: Nicholas Piggin
Arguably this is just shuffling around register accesses, but one nice
thing it does is allow the exit to save away the L2 state then switch
the environment to the L1 before copying L2 data back to the L1, which
logically flows more naturally and simplifies the error paths.
From: Nicholas Piggin
System call interrupts in ISA v3.1 CPUs add a LEV indication in SRR1
that corresponds with the LEV field of the instruction that caused the
interrupt.
Signed-off-by: Nicholas Piggin
Reviewed-by: Harsh Prateek Bora
Signed-off-by: Cédric Le Goater
---
target/ppc/excp_help
From: Nicholas Piggin
This machine can boot Linux to VFS mount, so don't stop in early boot.
Signed-off-by: Nicholas Piggin
Reviewed-by: Cédric Le Goater
Signed-off-by: Cédric Le Goater
---
tests/avocado/ppc_pseries.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests
From: Nicholas Piggin
The hypervisor emulation assistance interrupt modifies HEIR to
contain the value of the instruction which caused the exception.
Only TCG raises HEAI interrupts so this can be made TCG-only.
Signed-off-by: Nicholas Piggin
Signed-off-by: Cédric Le Goater
---
target/ppc/cp
From: Nicholas Piggin
The top bits of the LEV field of the sc instruction are to be treated as
as a reserved field rather than a reserved value, meaning LEV is
effectively the bottom bit. LEV=0xF should be treated as LEV=1 and be
a hypercall, for example.
This changes the instruction execution t
The following changes since commit 79dbd910c9ea6ca38f8e1b2616b1e5e885b85bd3:
Merge tag 'hppa-boot-reboot-fixes-pull-request' of
https://github.com/hdeller/qemu-hppa into staging (2023-06-25 08:58:49 +0200)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-p
From: Nicholas Piggin
PPC TCG supports SMT CPU configurations for non-hypervisor state, so
permit POWER8-10 pseries machines to enable SMT.
This requires PIR and TIR be set, because that's how sibling thread
matching is done by TCG.
spapr's nested-HV capability does not currently coexist with S
When the Timer Control and Timer Status registers are modified, avoid
calling the KVM backend when not available
Signed-off-by: Cédric Le Goater
---
target/ppc/kvm.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index a7f2de9d1018..a8a935e2
From: Nicholas Piggin
TGC SMT emulation needs to know whether it is running with SMT siblings,
to be able to iterate over siblings in a core, and to serialise
threads to access per-core shared SPRs. Add infrastructure to do these
things.
For now the sibling iteration and serialisation are implem
From: Nicholas Piggin
VOF is the new lightweight fast pseries bios. Add a Linux boot test
using VOF.
More tests could be moved to use VOF becasue it's much faster, but
just dip one toe in the water first here. SLOF should continue to be
tested too.
Signed-off-by: Nicholas Piggin
Reviewed-by: P
The 'prep' machine never supported KVM. This piece of code was
probably inherited from another model.
Cc: Hervé Poussineau
Signed-off-by: Cédric Le Goater
Reviewed-by: Richard Henderson
Signed-off-by: Cédric Le Goater
---
hw/ppc/prep.c | 20 +++-
1 file changed, 7 insertions(+
From: Nicholas Piggin
Make sure each CPU gets its state set up for gdb, not just the ones
before PowerPCCPUClass has had its gdb state set up.
Signed-off-by: Nicholas Piggin
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
target/ppc/gdbstub.c | 30 +++-
From: Nicholas Piggin
Rather than always performing partition scope page table translation
with access type of 0 (MMU_DATA_LOAD), pass through the processor
access type which first initiated the translation sequence. Process-
scoped page table loads are then set to MMU_DATA_LOAD access type in
th
From: Philippe Mathieu-Daudé
Although the PPC target only supports the TCG and KVM
accelerators, QEMU supports more. We can not assume that
'!kvm == tcg', so test for the correct accelerator. This
also eases code review, because here we don't care about
KVM, we really want to test for TCG.
Revie
From: Frederic Barrat
Accessing the TIMA from some specific ring/offset combination can
trigger a special operation, with or without side effects. It is
implemented in qemu with an array of special operations to compare
accesses against. Since the presenter on P10 is pretty similar to P9,
we had
From: Nicholas Piggin
Create spapr_nested.c for most of the nested HV implementation.
Signed-off-by: Nicholas Piggin
Reviewed-by: Harsh Prateek Bora
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/spapr.h| 62 -
include/hw/ppc/spapr_nested.h | 102 +
hw/ppc/spapr.c
Hello Anushree
Hello Cedric,
As per your mail, I have created the gitlab issue
https://gitlab.com/qemu-project/qemu/-/issues/1726.
Alex had a request for the bug report. If you have to time to provide
the data, it should help analyzing the issue.
Thanks,
C.
On 6/25/23 22:16, Nicholas Piggin wrote:
Apple sungem devices are expected to have WOL MMIO registers.
Add a region to prevent transaction failures, and implement the
WOL-disable CSR write because the Linux driver reset writes
this.
Signed-off-by: Nicholas Piggin
Reviewed-by: Cédric Le Goater
On 6/25/23 03:53, Bin Meng wrote:
Now that we have implemented unified short frames padding in the
QEMU networking codes, the small packet check logic in the receive
path is no longer needed.
Suggested-by: Cédric Le Goater
Signed-off-by: Bin Meng
Reviewed-by: Cédric Le Goater
Thanks Bin,
On 6/20/23 00:18, Lucas Villa Real wrote:
This patch adds support for the emulation of different density lines
(low, medium, and high). A new class property stm32f100-soc.density=
has been introduced to allow users to state the desired configuration.
That property is recognized by a new machine,
On Thu, Jun 22, 2023 at 10:56:53AM -0300, Daniel Henrique Barboza wrote:
> Using all TCG user properties in KVM is tricky. First because KVM
> supports only a small subset of what TCG provides, so most of the
> cpu->cfg flags do nothing for KVM.
>
> Second, and more important, we don't have a way
On Sun, Jun 25, 2023 at 3:06 PM Jason Wang wrote:
>
> On Fri, Jun 23, 2023 at 5:58 AM Ilya Maximets wrote:
> >
> > AF_XDP is a network socket family that allows communication directly
> > with the network device driver in the kernel, bypassing most or all
> > of the kernel networking stack. In t
On 6/26/23 00:01, Juan Quintela wrote:
Richard Henderson wrote:
On 6/22/23 18:54, Juan Quintela wrote:
The following changes since commit b455ce4c2f300c8ba47cba7232dd03261368a4cb:
Merge tag 'q800-for-8.1-pull-request'
ofhttps://github.com/vivier/qemu-m68k into staging (2023-06-22
10:18:32
The userspace SMCCC call filtering[1] provides the ability to forward the SMCCC
calls to the userspace. The vCPU hotplug[2] would be the first legitimate use
case to handle the psci calls in userspace, thus the vCPU hotplug can deny the
PSCI_ON call if the vCPU is not present now.
This series try
Am 13. Juni 2023 09:52:50 UTC schrieb Igor Mammedov :
>On Mon, 12 Jun 2023 17:49:10 +
>Bernhard Beschow wrote:
>
>> Am 12. Juni 2023 15:21:19 UTC schrieb Igor Mammedov :
>> >On Mon, 12 Jun 2023 16:51:55 +0200
>> >Igor Mammedov wrote:
>> >
>> >> On Sun, 11 Jun 2023 12:34:12 +0200
>> >> Be
The SMCCC call filtering provide the ability to forward the SMCCC call
to userspace, so we provide a new option `user-smccc` to enable handling
SMCCC call in userspace, the default value is off.
And add the skeleton implementation for userspace SMCCC call
initialization and handling.
Signed-off-b
Update to commit 45a3e24f65e9 ("Linux 6.4-rc7").
Signed-off-by: Shaoqin Huang
---
include/standard-headers/linux/const.h| 2 +-
include/standard-headers/linux/virtio_blk.h | 18 +++
.../standard-headers/linux/virtio_config.h| 6 +++
include/standard-headers/linux/virtio_net.h
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