The following changes since commit 79dbd910c9ea6ca38f8e1b2616b1e5e885b85bd3:
Merge tag 'hppa-boot-reboot-fixes-pull-request' of https://github.com/hdeller/qemu-hppa into staging (2023-06-25 08:58:49 +0200) are available in the Git repository at: https://github.com/legoater/qemu/ tags/pull-ppc-20230626 for you to fetch changes up to 5eb63b88d0ac259c2f49e62b6dcc6527a5caf255: tests/avocado: ppc test VOF bios Linux boot (2023-06-25 22:41:31 +0200) ---------------------------------------------------------------- ppc queue: * New maintainers * Nested implementation cleanups * Various cleanups of the CPU implementation * SMT support for pseries * Improvements of the XIVE2 TIMA modeling * Extra avocado tests for pseries ---------------------------------------------------------------- Cédric Le Goater (7): MAINTAINERS: Add reviewers for PowerNV baremetal emulation MAINTAINERS: Add reviewer for PowerPC TCG CPUs MAINTAINERS: Add reviewer for XIVE ppc/prep: Report an error when run with KVM ppc/bamboo: Report an error when run with KVM ppc/pnv: Rephrase error when run with KVM target/ppc: Fix timer register accessors when !KVM Frederic Barrat (2): pnv/xive2: Add a get_config() method on the presenter class pnv/xive2: Check TIMA special ops against a dedicated array for P10 Joel Stanley (1): ppc/pnv/pci: Clean up error messages Nicholas Piggin (19): target/ppc: gdbstub init spr gdb_id for all CPUs ppc/spapr: H_ENTER_NESTED should restore host XER ca field ppc/spapr: Add a nested state struct ppc/spapr: load and store l2 state with helper functions ppc/spapr: Move spapr nested HV to a new file target/ppc: Fix instruction loading endianness in alignment interrupt target/ppc: Change partition-scope translate interface target/ppc: Add SRR1 prefix indication to interrupt handlers target/ppc: Implement HEIR SPR target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call interrupts target/ppc: Better CTRL SPR implementation target/ppc: Fix sc instruction handling of LEV field target/ppc: Add initial flags and helpers for SMT support target/ppc: Add support for SMT CTRL register target/ppc: Add msgsnd/p and DPDES SMT support spapr: TCG allow up to 8-thread SMT on POWER8 and newer CPUs tests/avocado: boot ppc64 pseries to Linux VFS mount tests/avocado: Add ppc64 pseries multiprocessor boot tests tests/avocado: ppc test VOF bios Linux boot Philippe Mathieu-Daudé (1): hw/ppc/spapr: Test whether TCG is enabled with tcg_enabled() MAINTAINERS | 4 + include/hw/ppc/ppc.h | 1 + include/hw/ppc/spapr.h | 62 ------- include/hw/ppc/spapr_cpu_core.h | 5 +- include/hw/ppc/spapr_nested.h | 102 +++++++++++ include/hw/ppc/xive.h | 3 + target/ppc/cpu.h | 10 + target/ppc/helper.h | 2 + hw/intc/pnv_xive.c | 11 ++ hw/intc/pnv_xive2.c | 44 ++--- hw/intc/spapr_xive.c | 16 ++ hw/intc/xive.c | 57 +++++- hw/pci-host/pnv_phb4.c | 14 +- hw/ppc/pnv.c | 3 +- hw/ppc/ppc.c | 6 + hw/ppc/ppc440_bamboo.c | 17 +- hw/ppc/prep.c | 20 +- hw/ppc/spapr.c | 18 +- hw/ppc/spapr_caps.c | 14 ++ hw/ppc/spapr_cpu_core.c | 7 +- hw/ppc/spapr_hcall.c | 335 +--------------------------------- hw/ppc/spapr_nested.c | 395 ++++++++++++++++++++++++++++++++++++++++ target/ppc/cpu_init.c | 28 +++ target/ppc/excp_helper.c | 144 ++++++++++++++- target/ppc/gdbstub.c | 30 +-- target/ppc/kvm.c | 12 ++ target/ppc/misc_helper.c | 69 ++++++- target/ppc/mmu-radix64.c | 38 ++-- target/ppc/translate.c | 62 ++++++- hw/ppc/meson.build | 1 + tests/avocado/ppc_pseries.py | 73 +++++++- 31 files changed, 1085 insertions(+), 518 deletions(-) create mode 100644 include/hw/ppc/spapr_nested.h create mode 100644 hw/ppc/spapr_nested.c
