On Wed, May 31, 2023 at 5:49 AM Daniel Henrique Barboza
wrote:
>
> As it is today it's not possible to use '-cpu host' if the RISC-V host
> has RVH enabled. This is the resulting error:
>
> $ sudo ./qemu/build/qemu-system-riscv64 \
> -machine virt,accel=kvm -m 2G -smp 1 \
> -nographic -sna
Each vcpu creates a corresponding timer task. The watchdog
is driven by a timer according to a certain period. Each time
the timer expires, the counter is decremented. When the counter
is "0", the watchdog considers the vcpu to be stalling and resets
the VM. To avoid watchdog expiration, the guest
A new virtio pci device named virtio-vcpu-stall-watchdog-pci has been
added to handle vcpu stalling
hw/virtio/Kconfig | 5 +
hw/virtio/meson.build | 2 +
hw/virtio/virtio-vcpu-stall-watchdog-pci.c| 89 +++
hw/virtio/virtio-vcpu-stal
On 2023/6/1 22:37, Eugenio Perez Martin wrote:
> On Thu, Jun 1, 2023 at 3:49 PM Hawkins Jiawei wrote:
>>
>> To support restoring offloads state in vdpa, need to expose
>> the function virtio_net_supported_guest_offloads().
>> QEMU uses this function to get the guest supported offloads
>> and no ne
Hi
On Wed, May 31, 2023 at 8:08 PM Erico Nunes wrote:
> VHOST_USER_GPU_GET_EDID is defined as a message from the backend to the
> frontend to retrieve the EDID data for a given scanout.
>
> The VHOST_USER_GPU_PROTOCOL_F_EDID protocol feature is defined as a way
> to check whether this new messag
Sorry for being late to the party...
Eric Blake writes:
> It's already confusing that we have two very similar functions for
> wrapping the parse of a 64-bit unsigned value, differing mainly on
> whether they permit leading '-'. Adjust the signature of parse_uint()
> and parse_uint_full() to be
On Thu, 2023-06-01 at 08:15 -0700, Richard Henderson wrote:
> On 6/1/23 05:27, Robbin Ehn wrote:
> > This patch adds the new syscall for the
> > "RISC-V Hardware Probing Interface"
> > (https://docs.kernel.org/riscv/hwprobe.html).
> >
> > Signed-off-by: Robbin Ehn
> > ---
> > linux-headers/asm-
Hi
On Wed, May 31, 2023 at 8:07 PM Erico Nunes wrote:
> Implement the virtio-gpu feature in contrib/vhost-user-gpu, which was
> unsupported until now.
> In this implementation, the feature is enabled inconditionally to avoid
> creating another optional config argument.
> Similarly to get_display
Pattern:
First, one of us gets a bright idea on user-friendly interface (here:
fractional sizes like 1.5M). Objections, if any, get brushed aside.
Then the thing sprouts warts, tentacles, sores, and starts to give off
that sickly-sweet smell of bugs feasting on misguided ideas.
Until one of us
On 5/31/2023 8:00 PM, Yanan Wang wrote:
Currently, we only avoid emulating L3 cache properties for AMD CPU
when l3-cache is off, but failed to consider this case on CPUID 8000_001D.
This result in a fact that we will still have L3 caches in the VM
although we pass "host-cache-info=off,l3-cache=of
On Wed May 31, 2023 at 5:25 PM AEST, Cédric Le Goater wrote:
> On 5/31/23 03:23, Nicholas Piggin wrote:
> > SMT TCG emulation needs to be able to iterate over siblings in a core,
> > and needs to serialise core access to shared SPRs and state.
> >
> > Signed-off-by: Nicholas Piggin
> > ---
> >
On Thu Jun 1, 2023 at 5:13 PM AEST, Cédric Le Goater wrote:
> On 5/31/23 03:23, Nicholas Piggin wrote:
> > Doorbells in SMT need to coordinate msgsnd/msgclr and DPDES access from
> > multiple threads that affect the same state.
> >
> > Signed-off-by: Nicholas Piggin
> > ---
> > hw/ppc/ppc.c
On Thu Jun 1, 2023 at 5:20 PM AEST, Cédric Le Goater wrote:
> On 5/31/23 03:23, Nicholas Piggin wrote:
> > TCG now supports multi-threaded configuration at least enough for
> > pseries to be functional enough to boot Linux.
> >
> > This requires PIR and TIR be set, because that's how sibling threa
401 - 413 of 413 matches
Mail list logo
