On Thu, 2 Feb 2023 11:39:28 +
Peter Maydell wrote:
> On Thu, 2 Feb 2023 at 10:56, Richard Henderson
> wrote:
> >
> > On 2/1/23 23:39, Jonathan Cameron wrote:
> > > Not sure - if we can do the handling above then sure we could make that
> > > change.
> > > I can see there is a path to regi
Fiona Ebner wrote:
> upon errors. As the documentation in include/io/channel.h states, only
> -1 and QIO_CHANNEL_ERR_BLOCK should be returned upon error. Other
> values have the potential to confuse the call sites.
>
> error_setg is used rather than error_setg_errno, because there are
> certain co
Daniel P. Berrangé wrote:
> On Thu, Feb 02, 2023 at 01:22:12PM +0100, Juan Quintela wrote:
>> "manish.mishra" wrote:
>> > MSG_PEEK peeks at the channel, The data is treated as unread and
>> > the next read shall still return this data. This support is
>> > currently added only for socket class. E
On 02.02.23 12:04, Juan Quintela wrote:
David Hildenbrand wrote:
On 17.01.23 12:22, David Hildenbrand wrote:
While playing with migration of virtio-mem with an ordinary file backing,
I realized that migration and prealloc doesn't currently work as expected
for virtio-mem. Further, Jing Qi repo
Hi Frank,
On Wed, Feb 1, 2023 at 4:49 PM Frank Chang wrote:
>
> On Tue, Jan 31, 2023 at 10:36 PM Alexandre Ghiti
> wrote:
>>
>> Currently, the max satp mode is set with the only constraint that it must be
>> implemented in QEMU, i.e. set in valid_vm_1_10_[32|64].
>>
>> But we actually need to a
On Thu, Feb 2, 2023 at 9:01 PM Alexandre Ghiti
wrote:
> Hi Frank,
>
> On Wed, Feb 1, 2023 at 4:49 PM Frank Chang wrote:
> >
> > On Tue, Jan 31, 2023 at 10:36 PM Alexandre Ghiti
> wrote:
> >>
> >> Currently, the max satp mode is set with the only constraint that it
> must be
> >> implemented in
Hi,
On 2/2/23 11:58, Peter Maydell wrote:
> On Thu, 2 Feb 2023 at 10:47, Philippe Mathieu-Daudé wrote:
>> Where is "len-reserved-regions" declared?
> DEFINE_PROP_ARRAY("reserved-regions", ...)
>
> does this. For an array property "foo" the machinery creates an integer
> property "foo-len", which
On Thu, Feb 02, 2023 at 01:51:28PM +0100, Juan Quintela wrote:
> Daniel P. Berrangé wrote:
> > On Thu, Feb 02, 2023 at 01:22:12PM +0100, Juan Quintela wrote:
> >> "manish.mishra" wrote:
> >> > MSG_PEEK peeks at the channel, The data is treated as unread and
> >> > the next read shall still return
On 2/2/23 11:44, Thomas Huth wrote:
On 01/02/2023 14.20, Pierre Morel wrote:
S390 adds two new SMP levels, drawers and books to the CPU
topology.
The S390 CPU have specific toplogy features like dedication
Nit: s/toplogy/topology/
and polarity to give to the guest indications on the host
Hi there,
This patchset is to add a new machine type for MIPS architecture, which
is purely a VirtIO machine.
It is design to utilize existing VirtIO infrastures but also comptitable
with MIPS's existing internal simulation tools.
It should be able to cooperate with any MIPS core and boot Generi
MIPS Trickbox is a emulated device present in MIPS's IASIM simulator
for decades. It's capable of managing simulator status, signaling
interrupts, doing DMA and EJTAG signal stimulations.
For now we just use definition of this device and implement power
management related functions.
Signed-off-by
MIPS virt board is design to utilize existing VirtIO infrastures
but also comptitable with MIPS's existing internal simulation tools.
It includes virtio-mmio, pcie gpex, flash rom, fw_cfg, goldfish-rtc,
and optional goldfish_pic in case MIPS GIC is not present.
It should be able to cooperate with
This board had been deprecated long ago.
Signed-off-by: Jiaxun Yang
---
docs/system/target-mips.rst | 14 --
1 file changed, 14 deletions(-)
diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst
index 138441bdec..83239fb9df 100644
--- a/docs/system/target-mips.rst
+
Am 02.02.23 um 12:34 schrieb Kevin Wolf:
> Am 02.02.2023 um 11:19 hat Fiona Ebner geschrieben:
>> Am 31.01.23 um 19:18 schrieb Denis V. Lunev:
>>> Frankly speaking I would say that this switch could be considered
>>> NOT QEMU job and we should just send a notification (event) for the
>>> completion
On Thu, 2 Feb 2023 at 12:31, Jonathan Cameron
wrote:
>
> On Thu, 2 Feb 2023 11:39:28 +
> Peter Maydell wrote:
> > You might want to look at whether QEMU's iommu functionality is helpful
> > to you -- I'm assuming CXL doesn't do weird stuff on a less-than-page
> > granularity, and the iommu AP
On 2/2/23 14:27, Fiona Ebner wrote:
Am 02.02.23 um 12:34 schrieb Kevin Wolf:
Am 02.02.2023 um 11:19 hat Fiona Ebner geschrieben:
Am 31.01.23 um 19:18 schrieb Denis V. Lunev:
Frankly speaking I would say that this switch could be considered
NOT QEMU job and we should just send a notification (e
Tracked down with the help of scripts/clean-includes.
Signed-off-by: Markus Armbruster
Acked-by: Dr. David Alan Gilbert
Reviewed-by: Greg Kurz
Reviewed-by: Michael S. Tsirkin
Reviewed-by: Juan Quintela
---
include/hw/arm/fsl-imx6ul.h | 1 -
include/hw/arm/fsl-imx7.h | 1 -
backends/tpm
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
Back in 2016, we discussed[1] rules for headers, and these were
generally liked:
1. Have a carefully curated header that's included everywhere first. We
got that already thanks to Peter: osdep.h.
2. Headers should normally include everything they need beyond osdep.h.
If exceptions are need
Signed-off-by: Markus Armbruster
Reviewed-by: Christian Schoenebeck
Reviewed-by: Michael S. Tsirkin
---
hw/9pfs/9p.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c
index 9621ec1341..aa736af380 100644
--- a/hw/9pfs/9p.c
+++ b/hw/9pfs/9p.c
@@ -17,9 +17,6 @@
*/
This commit was created with scripts/clean-includes.
Signed-off-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Michael S. Tsirkin
Reviewed-by: Juan Quintela
---
audio/sndioaudio.c | 2 +-
backends/hostmem-epc.c | 2 +-
block/export/vduse-blk.c | 2 +-
hw/hyp
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
When clean-includes claims to skip or ignore a file, only the part
that sanitizes use of qemu/osdep.h skips the file. The part that
looks for duplicate #include does not, and neither does committing to
Git.
The latter can get unrelated stuff included in the commit, but only if
you run clean-inclu
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
When a symbolic link points to a file that needs cleaning, the script
replaces the link with a cleaned regular file. Not wanted; skip them.
We have a few symbolic links under subprojects/libvduse/ and
subprojects/libvhost-user/.
Signed-off-by: Markus Armbruster
Reviewed-by: Michael S. Tsirkin
When running with --check-dup-head, the script always claims it "Found
duplicate header file includes." Fix to do it only when it actually
found some.
Fixes: d66253e46ae2 ("scripts/clean-includes: added duplicate #include check")
Signed-off-by: Markus Armbruster
Reviewed-by: Michael S. Tsirkin
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
Daniel P. Berrangé wrote:
> On Thu, Feb 02, 2023 at 01:51:28PM +0100, Juan Quintela wrote:
>> Daniel P. Berrangé wrote:
>> > On Thu, Feb 02, 2023 at 01:22:12PM +0100, Juan Quintela wrote:
>> >> "manish.mishra" wrote:
>> >> > MSG_PEEK peeks at the channel, The data is treated as unread and
>> >>
This commit was created with scripts/clean-includes.
All .c should include qemu/osdep.h first. The script performs three
related cleanups:
* Ensure .c files include qemu/osdep.h first.
* Including it in a .h is redundant, since the .c already includes
it. Drop such inclusions.
* Likewise, in
On Mon, 30 Jan 2023 at 20:18, Michael S. Tsirkin wrote:
>
> The following changes since commit 13356edb87506c148b163b8c7eb0695647d00c2a:
>
> Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into
> staging (2023-01-24 09:45:33 +)
>
> are available in the Git repository at:
This commit was created with scripts/clean-includes.
Signed-off-by: Markus Armbruster
Acked-by: Christian Schoenebeck
Reviewed-by: Michael S. Tsirkin
---
backends/tpm/tpm_ioctl.h | 2 --
fsdev/p9array.h | 2 --
include/hw/misc/aspeed_lpc.h | 2 --
include/hw/pci
The script drops #include "qemu/osdep.h" from headers. Mention it in
the commit message it uses for --git.
Signed-off-by: Markus Armbruster
Reviewed-by: Juan Quintela
---
scripts/clean-includes | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/scripts/clean-inclu
Hi,
This new version removed the translate_fn() from patch 1 because it
wasn't removing the sign-extension for pentry as we thought it would.
A more detailed explanation is given in the commit msg of patch 1.
We're now retrieving the 'lowaddr' value from load_elf_ram_sym() and
using it when we're
The only remaining caller is riscv_load_kernel_and_initrd() which
belongs to the same file.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Reviewed-by: Alistair Francis
---
hw/riscv/boot.c | 80 -
load_elf_ram_sym() will sign-extend 32 bit addresses. If a 32 bit QEMU
guest happens to be running in a hypervisor that are using 64 bits to
encode its address, kernel_entry can be padded with '1's and create
problems [1].
Using a translate_fn() callback in load_elf_ram_sym() to filter the
padding
The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
the same steps when '-kernel' is used:
- execute load_kernel()
- load init_rd()
- write kernel_cmdline
Let's fold everything inside riscv_load_kernel() to avoid code
repetition. To not change the behavior of boards that aren'
On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
wrote:
>
Given that this is a non-trivial change, the commit message seems a bit brief?
> Co-authored-by: Nazar Kazakov
> Co-authored-by: Kiran Ostrolenk
> Co-authored-by: Max Chou
> Signed-off-by: Max Chou
> Signed-off-by: Kiran Ostrolenk
> Sign
On Thu, Feb 02, 2023 at 02:39:05PM +0100, Juan Quintela wrote:
> Daniel P. Berrangé wrote:
> > On Thu, Feb 02, 2023 at 01:51:28PM +0100, Juan Quintela wrote:
> >> Daniel P. Berrangé wrote:
> >> > On Thu, Feb 02, 2023 at 01:22:12PM +0100, Juan Quintela wrote:
> >> >> "manish.mishra" wrote:
> >> >
Hi,
This new version removed the translate_fn() from patch 1 because it
wasn't removing the sign-extension for pentry as we thought it would.
A more detailed explanation is given in the commit msg of patch 1.
We're now retrieving the 'lowaddr' value from load_elf_ram_sym() and
using it when we're
The only remaining caller is riscv_load_kernel_and_initrd() which
belongs to the same file.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Reviewed-by: Alistair Francis
---
hw/riscv/boot.c | 80 -
load_elf_ram_sym() will sign-extend 32 bit addresses. If a 32 bit QEMU
guest happens to be running in a hypervisor that are using 64 bits to
encode its address, kernel_entry can be padded with '1's and create
problems [1].
Using a translate_fn() callback in load_elf_ram_sym() to filter the
padding
The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
the same steps when '-kernel' is used:
- execute load_kernel()
- load init_rd()
- write kernel_cmdline
Let's fold everything inside riscv_load_kernel() to avoid code
repetition. To not change the behavior of boards that aren'
On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
wrote:
>
Please split off the refactoring.
See below for more comments.
> Co-authored-by: Kiran Ostrolenk
> Co-authored-by: Nazar Kazakov
> Signed-off-by: Kiran Ostrolenk
> Signed-off-by: Nazar Kazakov
> Signed-off-by: Lawrence Hunter
> ---
> ta
On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
wrote:
>
> Signed-off-by: Lawrence Hunter
> ---
> target/riscv/helper.h | 1 +
> target/riscv/insn32.decode | 1 +
> target/riscv/insn_trans/trans_rvzvkb.c.inc | 1 +
> target/riscv/vcrypto_helper.c
On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
wrote:
>
> From: Dickon Hood
>
> Add an initial implementation of the vrol.* and vror.* instructions,
> with mappings between the RISC-V instructions and their internal TCG
> accelerated implmentations.
>
> There are some missing ror helpers, so I've b
On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
wrote:
>
> From: Nazar Kazakov
>
> Signed-off-by: Nazar Kazakov
> ---
> target/riscv/helper.h | 4
> target/riscv/insn32.decode | 1 +
> target/riscv/insn_trans/trans_rvzvkb.c.inc | 1 +
> target/riscv/vcr
On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
wrote:
>
> From: William Salmon
>
> Co-authored-by: Kiran Ostrolenk
> Signed-off-by: Kiran Ostrolenk
> Signed-off-by: William Salmon
> ---
> include/qemu/bitops.h | 32 +
> target/riscv/helper.h
On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
wrote:
>
> From: Nazar Kazakov
>
> Signed-off-by: Nazar Kazakov
You might want to squash this onto the patch that first introduces the property.
Reviewed-by: Philipp Tomsich
> ---
> target/riscv/cpu.c | 2 ++
> 1 file changed, 2 insertions(+)
>
>
On Thu, 2 Feb 2023 at 15:23, Philipp Tomsich wrote:
>
> On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
> wrote:
> >
> > From: Nazar Kazakov
> >
> > Signed-off-by: Nazar Kazakov
>
> You might want to squash this onto the patch that first introduces the
> property.
>
> Reviewed-by: Philipp Tomsich
On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
wrote:
>
> From: Nazar Kazakov
>
> Signed-off-by: Nazar Kazakov
> ---
> target/riscv/helper.h | 9 +
> target/riscv/insn32.decode | 3 +++
> target/riscv/insn_trans/trans_rvzvkb.c.inc | 5 +
> targe
On Thu, 2 Feb 2023 at 15:13, Philipp Tomsich wrote:
>
> On Thu, 2 Feb 2023 at 13:42, Lawrence Hunter
> wrote:
> >
> > From: Dickon Hood
> >
> > Add an initial implementation of the vrol.* and vror.* instructions,
> > with mappings between the RISC-V instructions and their internal TCG
> > accele
On 01/02/2023 18:22, Vikram Garhwal wrote:
Hi Paul,
Thanks for reviewing this and other patches in series.
Please see my reply below.
On 2/1/23 12:30 AM, Paul Durrant wrote:
On 31/01/2023 22:51, Vikram Garhwal wrote:
Add a new machine xenpvh which creates a IOREQ server to
register/connect w
On Wed, 2023-02-01 at 15:48 -0500, Jason A. Donenfeld wrote:
[...]
> But it sounds like you might now have a concrete suggestion on
> something even better. I'm CCing hpa, as this is his wheelhouse, and
> maybe you two can divise the next step while I'm away. Maybe the pad9
> thing you mentioned is
From: Kiran Ostrolenk
Co-authored-by: Nazar Kazakov
Signed-off-by: Nazar Kazakov
Signed-off-by: Kiran Ostrolenk
---
target/riscv/helper.h | 2 +
target/riscv/insn32.decode | 3 +
target/riscv/insn_trans/trans_rvzvknh.c.inc | 45
target/ris
From: William Salmon
Co-authored-by: Kiran Ostrolenk
Signed-off-by: Kiran Ostrolenk
Signed-off-by: William Salmon
---
include/qemu/bitops.h | 32 +
target/riscv/helper.h | 5 +++
target/riscv/insn32.decode | 1 +
targ
Co-authored-by: Kiran Ostrolenk
Signed-off-by: Lawrence Hunter
Signed-off-by: Kiran Ostrolenk
---
target/riscv/helper.h | 2 +
target/riscv/insn32.decode | 3 ++
target/riscv/insn_trans/trans_rvzvksh.c.inc | 12 ++
target/riscv/translate.c
From: Dickon Hood
Add an initial implementation of the vrol.* and vror.* instructions,
with mappings between the RISC-V instructions and their internal TCG
accelerated implmentations.
There are some missing ror helpers, so I've bodged it by converting them
to rols.
Co-authored-by: Kiran Ostrole
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkb.c.inc | 1 +
target/riscv/vcrypto_helper.c | 12
4 files changed, 15 insertions(+)
diff --git a
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/cpu.c | 10 +-
target/riscv/cpu.h | 2 ++
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 0da04d0be1..a78d9ae120 100644
--- a/target/riscv/cpu.c
+++ b/target/r
Co-authored-by: Nazar Kazakov
Signed-off-by: Nazar Kazakov
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 2 +
target/riscv/insn32.decode | 3 ++
target/riscv/insn_trans/trans_rvzvkg.c.inc | 9 +
target/riscv/translate.c
From: Max Chou
Signed-off-by: Max Chou
Reviewed-by: Frank Chang
---
target/riscv/cpu.c | 3 ++-
target/riscv/cpu.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 48701e118f..0fa7049c3b 100644
--- a/target/riscv/cpu.c
+++ b/tar
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/cpu.c | 3 ++-
target/riscv/cpu.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 35790befc0..fd09822b4f 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
From: Kiran Ostrolenk
Signed-off-by: Kiran Ostrolenk
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvksh.c.inc | 8 ++
target/riscv/vcrypto_helper.c | 90 +
4 files c
From: Kiran Ostrolenk
Signed-off-by: Kiran Ostrolenk
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 9a412d9d53..a3b08e9d27 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1097,6 +1097,7 @@ static Property ris
From: Max Chou
- Share SM4_SBOXWORD between target/riscv and target/arm.
Signed-off-by: Max Chou
Reviewed-by: Frank Chang
---
include/crypto/sm4.h | 7 +++
target/arm/crypto_helper.c | 10 ++
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/include/crypto/
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 16 +
target/riscv/vcrypto_helper.c | 38 +
4 files changed, 56 insert
Co-authored-by: Nazar Kazakov
Signed-off-by: Nazar Kazakov
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 2 +
target/riscv/insn32.decode | 2 +
target/riscv/insn_trans/trans_rvzvknh.c.inc | 2 +
target/riscv/vcrypto_helper.c
From: Max Chou
Signed-off-by: Max Chou
Reviewed-by: Frank Chang
---
crypto/sm4.c | 10 ++
include/crypto/sm4.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/crypto/sm4.c b/crypto/sm4.c
index 9f0cd452c7..2987306cf7 100644
--- a/crypto/sm4.c
+++ b/crypto/sm4.c
@@ -47,3
Co-authored-by: Nazar Kazakov
Signed-off-by: Nazar Kazakov
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 2 +
target/riscv/insn32.decode | 4 ++
target/riscv/insn_trans/trans_rvzvkns.c.inc | 40 +++
target/riscv/translate.c
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 9
target/riscv/vcrypto_helper.c | 56 +
4 files cha
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 1 +
target/riscv/vcrypto_helper.c | 36 +
4 files changed, 39 insertions(+)
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index fd09822b4f..0da04d0be1 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1084,6 +1084,7 @@ static Property riscv_c
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkb.c.inc | 1 +
target/riscv/vcrypto_helper.c | 12
4 files changed, 15 insertions(+)
diff --git a
Co-authored-by: Kiran Ostrolenk
Co-authored-by: Nazar Kazakov
Signed-off-by: Kiran Ostrolenk
Signed-off-by: Nazar Kazakov
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzv
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/helper.h | 9 +
target/riscv/insn32.decode | 3 +++
target/riscv/insn_trans/trans_rvzvkb.c.inc | 5 +
target/riscv/vcrypto_helper.c | 19 +++
4 file
From: Kiran Ostrolenk
Signed-off-by: Kiran Ostrolenk
---
target/riscv/cpu.c | 4 +++-
target/riscv/cpu.h | 1 +
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 5076699226..9a412d9d53 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/c
Signed-off-by: Lawrence Hunter
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 6fded328f8..48701e118f 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1095,6 +1095,7 @@ static Property riscv_cpu_extensions[] = {
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/helper.h | 4
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkb.c.inc | 1 +
target/riscv/vcrypto_helper.c | 10 ++
4 files changed, 16 insert
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 1 +
target/riscv/vcrypto_helper.c | 4
4 files changed, 7 insertions(+)
diff --git a/target/r
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/cpu.c | 12
target/riscv/cpu.h | 1 +
2 files changed, 13 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index cc75ca7667..bd34119c75 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@
This patch series introduces an implementation for the six instruction sets
of the draft RISC-V vector cryptography extensions specification.
This patch set implements the instruction sets as per the 20221202
version of the specification (1). We plan to update to the latest spec
once stabilised.
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 13 -
target/riscv/vcrypto_helper.c | 2 ++
4 files changed, 12 insertions(+), 5 dele
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 1 +
target/riscv/vcrypto_helper.c | 3 +++
4 files changed, 6 insertions(+)
diff --git a/target/ri
From: Max Chou
Signed-off-by: Max Chou
Reviewed-by: Frank Chang
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 0fa7049c3b..a4e8347d5f 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1100,6 +1100,7 @@ static
Co-authored-by: Nazar Kazakov
Co-authored-by: Kiran Ostrolenk
Co-authored-by: Max Chou
Signed-off-by: Max Chou
Signed-off-by: Kiran Ostrolenk
Signed-off-by: Nazar Kazakov
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 3 +
target/riscv/insn32.decode
From: William Salmon
Signed-off-by: William Salmon
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 1 +
target/riscv/vcrypto_helper.c | 17 +
4 files changed,
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 45 +
target/riscv/vcrypto_helper.c | 42 +
Signed-off-by: Lawrence Hunter
---
target/riscv/cpu.c | 3 ++-
target/riscv/cpu.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a3b08e9d27..6fded328f8 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -101,6 +101,7 @@
Signed-off-by: Lawrence Hunter
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 1 +
target/riscv/vcrypto_helper.c | 31 +
4 files changed, 34 insertions(+)
From: Max Chou
- add vsm4k, vsm4r instructions
Signed-off-by: Max Chou
Reviewed-by: Frank Chang
[lawrence.hun...@codethink.co.uk: Moved SM4 functions from
crypto_helper.c to vcrypto_helper.c]
[nazar.kaza...@codethink.co.uk: Added alignment checks, refactored code to
use macros, and minor s
From: William Salmon
Signed-off-by: William Salmon
---
target/riscv/helper.h | 1 +
target/riscv/insn32.decode | 1 +
target/riscv/insn_trans/trans_rvzvkns.c.inc | 1 +
target/riscv/vcrypto_helper.c | 3 +++
4 files changed, 6 insertions(+)
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index bd34119c75..35790befc0 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1082,6 +1082,8 @@ static Property riscv
From: Nazar Kazakov
Signed-off-by: Nazar Kazakov
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a78d9ae120..5076699226 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1092,6 +1092,8 @@ static Property riscv
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