On Tue, Jul 12, 2022 at 08:02:34PM +0200, Gupta, Pankaj wrote:
> On 7/6/2022 10:20 AM, Chao Peng wrote:
> > From: "Kirill A. Shutemov"
> >
> > Implement shmem as a memfile_notifier backing store. Essentially it
> > interacts with the memfile_notifier feature flags for userspace
> > access/page mi
The following changes since commit 8e3d85d36b77f11ad7bded3a2d48c1f0cc334f82:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2022-07-12 14:12:15 +0100)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-aspeed-20220713
From: Peter Delevoryas
Signed-off-by: Peter Delevoryas
Reviewed-by: Titus Rwantare
Message-Id: <20220701000626.77395-2...@pjd.dev>
Signed-off-by: Cédric Le Goater
---
include/hw/i2c/pmbus_device.h | 7 +++
hw/i2c/pmbus_device.c | 9 +
2 files changed, 16 insertions(+)
dif
From: Joel Stanley
In order to correctly report secure boot running firmware the values
of certain registers must be set.
We don't yet have documentation from ASPEED on what they mean. The
meaning is inferred from u-boot's use of them.
Introduce properties so the settings can be configured per-
From: Peter Delevoryas
Signed-off-by: Peter Delevoryas
Reviewed-by: Joel Stanley
Reviewed-by: Cédric Le Goater
[ clg: - fixed URL links
- Moved Facebook Yosemite section at the end of the file ]
Message-Id: <20220705191400.41632-10-pe...@pjd.dev>
Signed-off-by: Cédric Le Goater
---
do
From: Peter Delevoryas
This commit adds a passthrough for PMBUS_IC_DEVICE_ID to allow Renesas
voltage regulators to return the integrated circuit device ID if they
would like to.
The behavior is very device specific, so it hasn't been added to the
general PMBUS model. Additionally, if the device
From: Peter Delevoryas
This change moves the code that connects the SoC UART's to serial_hd's
to the machine.
It makes each UART a proper child member of the SoC, and then allows the
machine to selectively initialize the chardev for each UART with a
serial_hd.
This should preserve backwards com
From: Peter Delevoryas
Signed-off-by: Peter Delevoryas
Reviewed-by: Cédric Le Goater
Message-Id: <20220705191400.41632-5-pe...@pjd.dev>
Signed-off-by: Cédric Le Goater
---
include/hw/arm/aspeed_soc.h | 2 ++
hw/arm/aspeed.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
From: Peter Delevoryas
Up until now, guests could modify input pins by overwriting the data
value register. The guest OS should only be allowed to modify output pin
values, and the QOM property setter should only be permitted to modify
input pins.
This change also updates the gpio input pin test
From: Peter Delevoryas
Signed-off-by: Peter Delevoryas
Reviewed-by: Cédric Le Goater
Message-Id: <20220705191400.41632-6-pe...@pjd.dev>
Signed-off-by: Cédric Le Goater
---
hw/arm/fby35.c | 39 +++
MAINTAINERS| 1 +
hw/arm/meson.build | 3 ++-
From: Peter Delevoryas
This adds the ISL69259, using all the same functionality as the existing
ISL69260 but overriding the IC_DEVICE_ID.
Signed-off-by: Peter Delevoryas
Reviewed-by: Titus Rwantare
Message-Id: <20220701000626.77395-4...@pjd.dev>
Signed-off-by: Cédric Le Goater
---
hw/sensor/
Some more controllers have been modeled recently. Reflect that in the
list of supported devices. New machines were also added.
Signed-off-by: Cédric Le Goater
Reviewed-by: Peter Delevoryas
Reviewed-by: Joel Stanley
Message-Id: <20220706172131.809255-1-...@kaod.org>
Signed-off-by: Cédric Le Goat
From: Peter Delevoryas
To support multiple SoC's running simultaneously, we need a unique name for
each RAM region. DRAM is created by the machine, but SRAM is created by the
SoC, since in hardware it is part of the SoC's internals.
We need a way to uniquely identify each SRAM region though, for
The Aspeed SDK kernel usually includes support for the lastest HW
features. This is interesting to exercise QEMU and discover the gaps
in the models.
Add extra I2C tests for the AST2600 EVB machine to check the new
register interface.
Message-Id: <20220707091239.1029561-1-...@kaod.org>
Signed-off
The BMC boots from the first flash device by fetching instructions
from the flash contents. Add an alias region on 0x0 for this
purpose. There are currently performance issues with this method (TBs
being flushed too often), so as a faster alternative, install the
flash contents as a ROM in the BMC
On 16/06/22 10:56 pm, Dr. David Alan Gilbert wrote:
* Het Gala (het.g...@nutanix.com) wrote:
> First of all, I apologise for the late reply. I was on a leave after
internship ended
at Nutanix. Hope to learn a lot from you all in the process of
upstreaming multifd
patches.
i) Modified
From: Iris Chen
Signed-off-by: Iris Chen
Reviewed-by: Cédric Le Goater
Message-Id: <20220627185234.1911337-3-irische...@fb.com>
Signed-off-by: Cédric Le Goater
---
tests/qtest/aspeed_smc-test.c | 111 ++
1 file changed, 111 insertions(+)
diff --git a/tests/qte
Similar to PIIX4 this series QOM'ifies internal device creation for PIIX3.
This reduces the delta between the implementations of PIIX3 and PIIX4 and
therefore might allow to merge both implementations in the future.
There were two challenges in this series:
First, QEMU considers the ACPI and USB
From: Peter Delevoryas
You can test booting the BMC with both '-device loader' and '-drive
file'. This is necessary because of how the fb-openbmc boot sequence
works (jump to 0x2000 after U-Boot SPL).
wget
https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.
From: Peter Delevoryas
With the BIC, the easiest way to run everything is to create two pty's
for each SoC and reserve stdin/stdout for the monitor:
wget
https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd
wget
https://github.com/peterdelevoryas/OpenBIC
Just like in the real hardware, create the DMA in the southbridges.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc.c | 3 ---
hw/i386/pc_piix.c | 2 ++
hw/isa/lpc_ich9.c | 3 +++
hw/isa/piix3.c| 9 +++--
4 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/hw/i386/pc.c b/
The ACPI controller is an integral part of PIIX3 (function 3). So create
it as part of the southbridge.
Note that the ACPI function is optional in QEMU. This is why it gets
unparented if it is disabled, otherwiese QEMU will abort with:
src/hw/core/qdev.c:357: qdev_assert_realized_properly_cb: A
From: Peter Delevoryas
Signed-off-by: Peter Delevoryas
Reviewed-by: Cédric Le Goater
Message-Id: <20220712023219.41065-4-pe...@pjd.dev>
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/hw/arm/aspeed.c b/hw/a
Just like in the real hardware, create the RTC in the southbridges.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc.c | 12 ++--
hw/i386/pc_piix.c | 8
hw/i386/pc_q35.c | 1 +
hw/isa/lpc_ich9.c | 8
hw/isa/piix3.c
The next patches will need to take advantage of it.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 7ad677e967..f129da29ac 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.
From: Iris Chen
Signed-off-by: Iris Chen
Reviewed-by: Francisco Iglesias
Message-Id: <20220708164552.3462620-1-irische...@fb.com>
Signed-off-by: Cédric Le Goater
---
hw/block/m25p80.c | 102 --
1 file changed, 90 insertions(+), 12 deletions(-)
diff
Now that the RTC is created as part of the southbridges it doesn't need
to be an out-parameter any longer.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc.c | 8
hw/i386/pc_piix.c| 2 +-
hw/i386/pc_q35.c | 2 +-
include/hw/i386/pc.h | 2 +-
4 files changed, 7 insertions(+
Use the newly introduced i8259 proxy "isa-pic" which allows for wiring
up devices in the southbridge where the virtualization technology used
(KVM, TCG, Xen) is not yet known.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 15 +--
hw/isa/piix3.c|
Now that PIIX3 has the PIC integrated, the ACPI controller can be wired
up internally.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 1 -
hw/isa/piix3.c| 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index f843a73d90..19c8
From: Peter Delevoryas
Verify the current behavior, which is that input pins can be modified by
guest OS register writes.
Signed-off-by: Peter Delevoryas
Reviewed-by: Cédric Le Goater
Message-Id: <20220712023219.41065-2-pe...@pjd.dev>
Signed-off-by: Cédric Le Goater
---
tests/qtest/aspeed_gp
Having an i8259 proxy allows for ISA PICs to be created and wired up in
southbridges. This is especially interesting for PIIX3 for two reasons:
First, the southbridge doesn't need to care about the virtualization
technology used (KVM, TCG, Xen) due to in-IRQs (where devices get
attached) and out-IR
On Wed, Jul 13, 2022 at 05:58:32AM +0200, Gupta, Pankaj wrote:
>
> > This is the v7 of this series which tries to implement the fd-based KVM
> > guest private memory. The patches are based on latest kvm/queue branch
> > commit:
> >
> >b9b71f43683a (kvm/queue) KVM: x86/mmu: Buffer nested MMU
>
On Mon, Jul 11, 2022 at 06:24:22PM +0200, Philippe Mathieu-Daudé wrote:
> On 7/7/22 18:37, Daniel P. Berrangé wrote:
> > The 'true' and 'false' constants should only ever be used with the
> > 'bool' type, never 'int'.
> >
> > Signed-off-by: Daniel P. Berrangé
> > ---
> > tests/style.yml | 5 +++
The USB controller is an integral part of PIIX3 (function 2). So create
it as part of the southbridge.
Note that the USB function is optional in QEMU. This is why it gets
unparented if it is disabled, otherwiese QEMU will abort with:
src/hw/core/qdev.c:357: qdev_assert_realized_properly_cb: Ass
Fixes the "extra-semi" clang-tidy check.
Signed-off-by: Bernhard Beschow
---
hw/isa/piix3.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 56a741c192..3cfd6eafcd 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -442,7 +442,7 @@
Now that PIIX3 contains the new isa-pic, it is possible to instantiate
PIIX3 IDE in the PIIX3 southbridge. PIIX3 IDE wires up its interrupts to
the ISA bus in its realize method which requires the interrupt
controller to provide fully populated qemu_irqs. This is the case for
isa-pic even though th
Upgrade OpenSBI from v1.0 to v1.1 and the pre-built bios images.
The v1.1 release includes the following commits:
5b99603 lib: utils/ipi: Fix size check in aclint_mswi_cold_init()
6dde435 lib: utils/sys: Extend HTIF library to allow custom base address
8257262 platform: sifive_fu740: do not use a
Replace '1 << shift' with 'MAKE_64BIT_MASK(shift, 1)' to fix
unintentional integer overflow errors in tlb_helper file.
Fix coverity CID: 1489759 1489762
Signed-off-by: Xiaojuan Yang
---
target/loongarch/tlb_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/
Fix out-of-bounds errors when access excp_names[] array. the valid
boundary size of excp_names should be 0 to ARRAY_SIZE(excp_names)-1.
However, the general code do not consider the max boundary.
Fix coverity CID: 1489758
Signed-off-by: Xiaojuan Yang
---
target/loongarch/cpu.c | 6 +++---
1 fil
Fix coverity errors:
1. In find_first_bit function, the 'size' argument need
'unsigned long' type, so we change the 'size' to unsigned
long type when use the function.
2. In expression 1ULL << irq, left shifting by more than
63 bits has undefined behavior. And out-of-bounds access
error occured whe
The boundary size of cpucfg array should be 0 to 20. So,
using index bigger than 20 to access cpucfg[] must be forbidden.
Fix coverity CID: 1489760
Signed-off-by: Xiaojuan Yang
---
target/loongarch/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/loongarch/
In loongarch_cpu_class_by_name(char *cpu_model) function,
the argument cpu_model already has the suffix '-loongarch-cpu',
so we should remove the LOONGARCH_CPU_TYPE_NAME(cpu_model) macro.
And add the assertion that 'cpu_model' resolves to a class of the
appropriate type.
Signed-off-by: Xiaojuan Ya
Make some changes following Richard's advice based on version v1. And the
v1 patches fix some coverity errors and loongarch_cpu_class_by_name function
for LoongArch virt machine.
1. Use MAKE_64BIT_MASK(shift, len) to replace 'xxx << shift'.
2. Use ARRAY_SIZE(arrqy) to get the array size.
3. Add th
+#ifdef CONFIG_MIGRATION
+static int shmem_migrate_page(struct address_space *mapping,
+ struct page *newpage, struct page *page,
+ enum migrate_mode mode)
+{
+ struct inode *inode = mapping->host;
+ struct shmem_inode_info *in
Signed-off-by: Konstantin Kostiuk
Message-Id: <20220712092715.2136898-1-kkost...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Konstantin Kostiuk
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 450abd0252..b1e73d99f3 100644
--
From: zhenwei pi
'linux' is not usable as identifier, because C compilers targeting
Linux predefine it as a macro expanding to 1. Add it to
@polluted_words. 'unix' is already there.
Suggested-by: Markus Armbruster
Reviewed-by: Marc-André Lureau
Signed-off-by: zhenwei pi
Message-Id: <20220707
The following changes since commit 08c8a31214e8ca29e05b9f6c3ee942b28ec58457:
Merge tag 'pull-tcg-20220712' of https://gitlab.com/rth7680/qemu into staging
(2022-07-12 11:52:11 +0530)
are available in the Git repository at:
g...@github.com:kostyanf14/qemu.git tags/qga-win32-pull-2022-07-13
From: zhenwei pi
A vCPU thread always reaches 100% utilization when:
- guest uses idle=poll
- disable HLT vm-exit
- enable MWAIT
Add new guest agent command 'guest-get-cpustats' to get guest CPU
statistics, we can know the guest workload and how busy the CPU is.
Reviewed-by: Marc-André Lureau
This is the v7 of this series which tries to implement the fd-based KVM
guest private memory. The patches are based on latest kvm/queue branch
commit:
b9b71f43683a (kvm/queue) KVM: x86/mmu: Buffer nested MMU
split_desc_cache only by default capacity
Introduction
In general th
On Wed, Jul 13, 2022 at 01:19:06PM +0300, Konstantin Kostiuk wrote:
> Signed-off-by: Konstantin Kostiuk
> Message-Id: <20220712092715.2136898-1-kkost...@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Konstantin Kostiuk
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion
* Peter Xu (pet...@redhat.com) wrote:
> We just added TLS tests for precopy but not postcopy. Add the
> corresponding test for vanilla postcopy.
>
> Rename the vanilla postcopy to "postcopy/plain" because all postcopy tests
> will only use unix sockets as channel.
>
> Signed-off-by: Peter Xu
R
On Wed, Jul 13, 2022 at 1:38 PM Daniel P. Berrangé
wrote:
> On Wed, Jul 13, 2022 at 01:19:06PM +0300, Konstantin Kostiuk wrote:
> > Signed-off-by: Konstantin Kostiuk
> > Message-Id: <20220712092715.2136898-1-kkost...@redhat.com>
> > Reviewed-by: Philippe Mathieu-Daudé
> > Signed-off-by: Konstan
On Wed, Jul 13, 2022 at 02:31:08PM +0300, Konstantin Kostiuk wrote:
> On Wed, Jul 13, 2022 at 1:38 PM Daniel P. Berrangé
> wrote:
>
> > On Wed, Jul 13, 2022 at 01:19:06PM +0300, Konstantin Kostiuk wrote:
> > > Signed-off-by: Konstantin Kostiuk
> > > Message-Id: <20220712092715.2136898-1-kkost...
On 08.07.22 06:17, Stefan Hajnoczi wrote:
libblkio (https://gitlab.com/libblkio/libblkio/) is a library for
high-performance disk I/O. It currently supports io_uring and
virtio-blk-vhost-vdpa with additional drivers under development.
One of the reasons for developing libblkio is that other appl
On Wed, Jul 13, 2022 at 2:55 PM Daniel P. Berrangé
wrote:
> On Wed, Jul 13, 2022 at 02:31:08PM +0300, Konstantin Kostiuk wrote:
> > On Wed, Jul 13, 2022 at 1:38 PM Daniel P. Berrangé
> > wrote:
> >
> > > On Wed, Jul 13, 2022 at 01:19:06PM +0300, Konstantin Kostiuk wrote:
> > > > Signed-off-by: K
From: Mauro Matteo Cascella
Set current_req to NULL, not current_req->req, to prevent reusing a free'd
buffer in case of repeated SCSI cancel requests. Also apply the fix to
CLEAR QUEUE and BUS DEVICE RESET messages as well, since they also cancel
the request.
Thanks to Alexander Bulekov for pr
The option generates a lot of warnings for integers casted to pointers,
for example:
/home/pbonzini/work/upstream/qemu/pc-bios/s390-ccw/dasd-ipl.c:174:19: warning:
array subscript 0 is outside array bounds of ‘CcwSeekData[0]’ [-Warray-bounds]
174 | seekData->cyl = 0x00;
|
On 6/16/22 19:26, Dr. David Alan Gilbert wrote:
> * Het Gala (het.g...@nutanix.com) wrote:
>> i) Modified the format of the qemu monitor command : 'migrate' by adding a
>> list,
>>each element in the list consists of multi-FD connection parameters:
>> source
>>and destination uris and of
Allocating the header lets us write it at a later time and hence also
allows us to change section and segment table offsets until we
finally write it.
Signed-off-by: Janosch Frank
---
dump/dump.c | 127 +-
include/sysemu/dump.h | 1 +
2 files c
The iteration over the memblocks is hard to understand so it's about
time to clean it up.
struct DumpState's next_block and start members can and should be
local variables within the iterator.
Instead of manually grabbing the next memblock we can use
QTAILQ_FOREACH to iterate over all memblocks.
By splitting the writing of the section headers and (future) section
data we prepare for the addition of a string table section and
architecture sections.
Signed-off-by: Janosch Frank
---
dump/dump.c | 116 --
include/sysemu/dump.h | 4 ++
2 fi
Sometimes dumping a guest from the outside is the only way to get the
data that is needed. This can be the case if a dumping mechanism like
KDUMP hasn't been configured or data needs to be fetched at a specific
point. Dumping a protected guest from the outside without help from
fw/hw doesn't yield
Add hooks which architectures can use to add arbitrary data to custom
sections.
Signed-off-by: Janosch Frank
---
dump/dump.c| 21 ++---
include/sysemu/dump-arch.h | 27 +++
2 files changed, 45 insertions(+), 3 deletions(-)
diff --git a/dum
Time to add a bit more descriptiveness to the dumps.
Signed-off-by: Janosch Frank
Reviewed-by: Richard Henderson
---
dump/dump.c | 106 --
include/sysemu/dump.h | 1 +
2 files changed, 94 insertions(+), 13 deletions(-)
diff --git a/dump/dump.
Signed-off-by: Janosch Frank
---
linux-headers/linux/kvm.h | 55 +++
1 file changed, 55 insertions(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 0d05d02ee4..ae5db2e44c 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/lin
Let's add a few bits of code which hide the new KVM PV dump API from
us via new functions.
Signed-off-by: Janosch Frank
---
hw/s390x/pv.c | 51 +++
include/hw/s390x/pv.h | 8 +++
2 files changed, 59 insertions(+)
diff --git a/hw/s390x/pv.c b/
Let's move ELF related members into one block and guest memory related
ones into another to improve readability.
Signed-off-by: Janosch Frank
Reviewed-by: Richard Henderson
---
include/sysemu/dump.h | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/include/s
Add a protected dump capability for later feature checking.
Signed-off-by: Janosch Frank
---
target/s390x/kvm/kvm.c | 7 +++
target/s390x/kvm/kvm_s390x.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index 7bd8db0e7b..cbd8c91424 1
Previously this series was two separate series:
* Arch section support
Adds the possibility for arch code to add custom section data.
* s390 PV dump support
Adds PV dump data to the custom arch sections.
I've chosen to merge them so it's easier to understand why the arch
section support h
Introduce an interface over which we can get information about UV data.
Signed-off-by: Janosch Frank
---
hw/s390x/pv.c | 61 ++
hw/s390x/s390-virtio-ccw.c | 5
include/hw/s390x/pv.h | 10 +++
3 files changed, 76 insertions(+)
diff
Signed-off-by: Konstantin Kostiuk
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 450abd0252..22a4ffe0a2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2880,6 +2880,7 @@ T: git https://repo.or.cz/qemu/armbru.git qapi-next
QEMU Guest Agent
M:
On 08.07.22 06:17, Stefan Hajnoczi wrote:
The only implementor of bdrv_register_buf() is block/nvme.c, where the
size is not needed when unregistering a buffer. This is because
util/vfio-helpers.c can look up mappings by address.
Future block drivers that implement bdrv_register_buf() may not be
On 17/06/22 12:10 am, Dr. David Alan Gilbert wrote:
* Het Gala (het.g...@nutanix.com) wrote:
i) Modified the format of qemu monitor command: ‘migrate-incoming’ by adding
a list, each element in the list is to open listeners with a given number
of multiFD channels.
ii) Qemu starts with
On 7/12/22 17:40, Janis Schoetterl-Glausch wrote:
On 6/20/22 16:03, Pierre Morel wrote:
We use new objects to have a dynamic administration of the CPU topology.
The highest level object in this implementation is the s390 book and
in this first implementation of CPU topology for S390 we have a
Hi
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
>
> The iteration over the memblocks is hard to understand so it's about
> time to clean it up.
>
> struct DumpState's next_block and start members can and should be
> local variables within the iterator.
>
> Instead of manually grabbing the
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
>
> Allocating the header lets us write it at a later time and hence also
> allows us to change section and segment table offsets until we
> finally write it.
>
> Signed-off-by: Janosch Frank
Reviewed-by: Marc-André Lureau
> ---
> dump/dum
On 7/13/22 17:09, Marc-André Lureau wrote:
Hi
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
The iteration over the memblocks is hard to understand so it's about
time to clean it up.
struct DumpState's next_block and start members can and should be
local variables within the iterator.
Hi
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
>
> By splitting the writing of the section headers and (future) section
> data we prepare for the addition of a string table section and
> architecture sections.
>
> Signed-off-by: Janosch Frank
> ---
> dump/dump.c | 116 +++
Hi
On Wed, Jul 13, 2022 at 7:30 PM Janosch Frank wrote:
>
> On 7/13/22 17:09, Marc-André Lureau wrote:
> > Hi
> >
> > On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
> >>
> >> The iteration over the memblocks is hard to understand so it's about
> >> time to clean it up.
> >>
> >> struct Dum
* Ilya Leoshkevich (i...@linux.ibm.com) wrote:
> zlib_send_prepare() compresses pages of a running VM. zlib does not
> make any thread-safety guarantees with respect to changing deflate()
> input concurrently with deflate() [1].
>
> One can observe problems due to this with the IBM zEnterprise Dat
On 7/12/22 18:02, Ilya Leoshkevich wrote:
This works, of course. It could be simpler using EXECUTE, to store
just the one
instruction and not worry about an executable mapped page, but I
guess it doesn't matter.
I thought about this too, but EX/EXRL operate only on the second byte,
and I need
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
>
> Let's move ELF related members into one block and guest memory related
> ones into another to improve readability.
>
> Signed-off-by: Janosch Frank
> Reviewed-by: Richard Henderson
Reviewed-by: Marc-André Lureau
> ---
> include/sysemu/
On 220712 1034, Stefan Hajnoczi wrote:
> On Tue, Jun 21, 2022 at 11:53:06AM -0400, Alexander Bulekov wrote:
> > On 220621 1630, Peter Maydell wrote:
> > > On Thu, 9 Jun 2022 at 14:59, Alexander Bulekov wrote:
> > > > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> > > > index 44dacfa224
Hi
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
>
> Time to add a bit more descriptiveness to the dumps.
Please add some more description & motivation to the patch (supposedly
necessary for next patches), and explain that it currently doesn't
change the dump (afaict).
>
> Signed-off-by:
On 7/13/22 15:20, Xiaojuan Yang wrote:
Replace '1 << shift' with 'MAKE_64BIT_MASK(shift, 1)' to fix
unintentional integer overflow errors in tlb_helper file.
Fix coverity CID: 1489759 1489762
Signed-off-by: Xiaojuan Yang
---
target/loongarch/tlb_helper.c | 4 ++--
1 file changed, 2 insertion
On 7/13/22 15:20, Xiaojuan Yang wrote:
In loongarch_cpu_class_by_name(char *cpu_model) function,
the argument cpu_model already has the suffix '-loongarch-cpu',
so we should remove the LOONGARCH_CPU_TYPE_NAME(cpu_model) macro.
And add the assertion that 'cpu_model' resolves to a class of the
appr
On 7/13/22 15:20, Xiaojuan Yang wrote:
Fix out-of-bounds errors when access excp_names[] array. the valid
boundary size of excp_names should be 0 to ARRAY_SIZE(excp_names)-1.
However, the general code do not consider the max boundary.
Fix coverity CID: 1489758
Signed-off-by: Xiaojuan Yang
---
Hi
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
>
> Add hooks which architectures can use to add arbitrary data to custom
> sections.
>
> Signed-off-by: Janosch Frank
> ---
> dump/dump.c| 21 ++---
> include/sysemu/dump-arch.h | 27 +++
On Wed, Jul 13, 2022 at 5:07 PM Janosch Frank wrote:
>
> Signed-off-by: Janosch Frank
Please tell which version this update come from. Otherwise, it should be fine
Reviewed-by: Marc-André Lureau
> ---
> linux-headers/linux/kvm.h | 55 +++
> 1 file changed,
On 7/13/22 15:20, Xiaojuan Yang wrote:
The boundary size of cpucfg array should be 0 to 20. So,
using index bigger than 20 to access cpucfg[] must be forbidden.
You must update the comment to match the code,
which no longer mentions "20" at all. With that change,
Reviewed-by: Richard Henderso
On 7/13/22 15:20, Xiaojuan Yang wrote:
Fix coverity errors:
1. In find_first_bit function, the 'size' argument need
'unsigned long' type, so we change the 'size' to unsigned
long type when use the function.
2. In expression 1ULL << irq, left shifting by more than
63 bits has undefined behavior. A
On Wed, 2022-07-13 at 21:14 +0530, Richard Henderson wrote:
> On 7/12/22 18:02, Ilya Leoshkevich wrote:
> > > This works, of course. It could be simpler using EXECUTE, to
> > > store
> > > just the one
> > > instruction and not worry about an executable mapped page, but I
> > > guess it doesn't ma
On 12/07/2022 14:05, Dr. David Alan Gilbert wrote:
* Laurent Vivier (lviv...@redhat.com) wrote:
Remove 'tcp:' prefix for inet type (because inet can be 'tcp' or 'udp'
and socket_parse() doesn't recognize it), the format is 'host:port'.
I don't think I understand why tests/qtest/migration-test.
https://patchew.org/QEMU/20220611223509.32280-1-mauri...@mailbox.org/
https://lore.kernel.org/qemu-devel/20220611223509.32280-1-mauri...@mailbox.org/
On 12/06/2022 00:35, Mauricio Sandt wrote:
This small patch is the result of some recent malware research I did
in a QEMU VM. The malware used mul
This patch series implements the 4 instructions added in Power ISA
3.1B:
- hashchk
- hashst
- hashchkp
- hashstp
To build it, you need to apply the following patches on top of master:
<20220701133507.740619-2-lucas.couti...@eldorado.org.br>
<20220701133507.740619-3-lucas.couti...@eldorado.org.br>
Linux KVM currently does not export these registers. Create
placeholders for them to allow implementing hashchk(p) and
hashst(p) instructions from PowerISA 3.1B.
Signed-off-by: Víctor Colombo
---
linux-headers/asm-powerpc/kvm.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/linux-headers
Implementation for instructions hashst and hashchk, which were added
in Power ISA 3.1B.
It was decided to implement the hash algorithm from ground up in this
patch exactly as described in Power ISA.
Signed-off-by: Víctor Colombo
---
target/ppc/cpu.h | 1 +
target/ppc/
Implementation for instructions hashstp and hashchkp, the privileged
versions of hashst and hashchk, which were added in Power ISA 3.1B.
Signed-off-by: Víctor Colombo
---
target/ppc/cpu.h | 1 +
target/ppc/cpu_init.c | 3 +++
target/ppc/excp_helper.
On Sun, Jun 12, 2022 at 12:35:09AM +0200, Mauricio Sandt wrote:
> This small patch is the result of some recent malware research I did
> in a QEMU VM. The malware used multiple ways of querying info from
> the VM disk and I needed a clean way to change those values from the
> hypervisor.
>
> I bel
On Wed, Jul 13, 2022 at 06:46:17PM +0200, Laurent Vivier wrote:
> On 12/07/2022 14:05, Dr. David Alan Gilbert wrote:
> > * Laurent Vivier (lviv...@redhat.com) wrote:
> > > Remove 'tcp:' prefix for inet type (because inet can be 'tcp' or 'udp'
> > > and socket_parse() doesn't recognize it), the form
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