Signed-off-by: BALATON Zoltan
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
hw/timer/sh_timer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c
index 02eb865908..cc7c1897a8 100644
--- a/hw/timer/sh_timer.c
++
Signed-off-by: BALATON Zoltan
---
hw/char/sh_serial.c | 98 +++--
hw/sh4/sh7750.c | 56 +++---
include/hw/sh4/sh.h | 9 +
3 files changed, 101 insertions(+), 62 deletions(-)
diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.
Use g_new0 instead of g_malloc0 and avoid some unneeded temporary
variable assignments.
Signed-off-by: BALATON Zoltan
---
hw/intc/sh_intc.c | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/hw/intc/sh_intc.c b/hw/intc/sh_intc.c
index d7cc61b42b..3603b448c2 1006
The INTC_A7 local macro does the same as the A7ADDR from
include/sh/sh.h so use the latter and drop the local macro definition.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
hw/intc/sh_intc.c | 12 +---
1 file changed, 5 insertions
The hw_error function calls abort and is not meant to be used by
devices. Use qemu_log_mask instead to log and ignore invalid accesses.
Also fix format strings to allow dropping type casts of hwaddr and use
__func__ instead of hard coding function name in the message which
were wrong in two cases.
Signed-off-by: BALATON Zoltan
Reviewed-by: Richard Henderson
---
hw/char/sh_serial.c | 13 ++-
hw/char/trace-events | 4 +++
hw/intc/sh_intc.c | 79 +++
hw/intc/trace-events | 8 +
hw/sh4/sh7750.c | 8 ++---
hw/sh4/trace-events |
Rename the iomem region to "intc" from "interrupt-controller" which
makes the info mtree output less wide as it is already too wide
because of all the aliases. Also drop the format macro which was only
used twice in close proximity so we can just use the literal string
instead without a macro defin
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
---
hw/char/sh_serial.c | 23 ++-
hw/intc/sh_intc.c| 39 +++
hw/pci-host/sh_pci.c | 10 --
hw/sh4/r2d.c | 39
Address of element i is one word thus clearer than array + i.
Signed-off-by: BALATON Zoltan
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
hw/intc/sh_intc.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/hw/intc/sh_int
Coding style says types should be camel case.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
hw/char/sh_serial.c | 24 +++-
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/hw/char/sh_serial.c b/hw/char/sh
Normally there are at least two sh_serial instances. Add device id to
trace messages to make it clear which instance they belong to
otherwise its not possible to tell which serial device is accessed.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Turn the INTC_MODE defines into an enum and clean up the function
returning these to make it clearer by removing nested ifs and
superfluous parenthesis. The one remaining #define is a flag which is
moved further apart by changing its value from 8 to 0x80 to leave some
spare bits as this is or-ed wi
Instead of if !expr continue else do something it is more straight
forward to say if expr then do something, especially if the action is
just a few lines. Remove such uses of continue to make the code easier
to follow.
Signed-off-by: BALATON Zoltan
Reviewed-by: Richard Henderson
---
hw/intc/sh_
The timer memory region is only accessed via aliases that are 0x1000
bytes long, no need to have the timer region larger than that.
Signed-off-by: BALATON Zoltan
---
hw/timer/sh_timer.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.
It's more readable to keep things on one line if it fits the length limit.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/timer/sh_timer.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c
index 2038a
This function is very simple and provides no advantage. Call sites
become simpler without it so just write it in line and drop the
separate function.
Signed-off-by: BALATON Zoltan
---
hw/intc/sh_intc.c| 54
hw/sh4/sh7750.c | 4 +--
inclu
According to coding style types should be camel case, also remove
unneded casts from void *.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
---
The tmu012_state is left for now, that's the real exported object with
SHTimerState being an internal object for a single timer. I'll
The sh_intc_locate function will either init these or not return so no
need to initialise them.
Signed-off-by: BALATON Zoltan
---
hw/intc/sh_intc.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/hw/intc/sh_intc.c b/hw/intc/sh_intc.c
index 3603b448c2..
On 10/29/21 23:02, BALATON Zoltan wrote:
> This now includes the previous code style clean up series so
> everything is in the series now. This got big enough for now so I'll
> wait until these are merged (hopefully before the freeze) before going
> on so I don't have to carry them in my tree. Only
On 10/29/21 23:02, BALATON Zoltan wrote:
> Signed-off-by: BALATON Zoltan
> ---
> hw/char/sh_serial.c | 29 +
> 1 file changed, 17 insertions(+), 12 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 10/29/21 23:02, BALATON Zoltan wrote:
> Instead of allocating timer with timer_new store it directly in the
> state struct. This makes it simpler to free it together with the device.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/char/sh_serial.c | 10 +-
> 1 file changed, 5 insertions(
On 10/29/21 23:02, BALATON Zoltan wrote:
> The hw_error function calls abort and is not meant to be used by
> devices. Use qemu_log_mask instead to log and ignore invalid accesses.
> Also fix format strings to allow dropping type casts of hwaddr and use
> __func__ instead of hard coding function na
On 10/29/21 23:02, BALATON Zoltan wrote:
> Use g_new0 instead of g_malloc0 and avoid some unneeded temporary
> variable assignments.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/intc/sh_intc.c | 15 ---
> 1 file changed, 4 insertions(+), 11 deletions(-)
Reviewed-by: Philippe Mathieu
On 10/29/21 23:02, BALATON Zoltan wrote:
> The timer memory region is only accessed via aliases that are 0x1000
> bytes long, no need to have the timer region larger than that.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/timer/sh_timer.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
On 10/29/21 23:02, BALATON Zoltan wrote:
> The sh_intc_locate function will either init these or not return so no
> need to initialise them.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/intc/sh_intc.c | 21 ++---
> 1 file changed, 10 insertions(+), 11 deletions(-)
Reviewed-by: P
On 10/29/21 23:02, BALATON Zoltan wrote:
> Signed-off-by: BALATON Zoltan
> ---
> hw/char/sh_serial.c | 98 +++--
> hw/sh4/sh7750.c | 56 +++---
> include/hw/sh4/sh.h | 9 +
> 3 files changed, 101 insertions(+), 62 deletions(-)
On 10/29/21 23:02, BALATON Zoltan wrote:
> This function is very simple and provides no advantage. Call sites
> become simpler without it so just write it in line and drop the
> separate function.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/intc/sh_intc.c| 54 ---
QERR_UNSUPPORTED definition is obsolete since 2015 (commit
4629ed1e989, "qerror: Finally unused, clean up"). Replace it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/nmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/core/nmi.c b/hw/core/nmi.c
index 481c4b3c7e5..b4
QERR_FEATURE_DISABLED definition is obsolete since 2015 (commit
4629ed1e989, "qerror: Finally unused, clean up"). Replace it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/machine-qmp-cmds.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/core/machine-qmp-cmds.c b/hw
QERR_ definitions are obsolete since 2015... Remove their
uses in hw/core/.
Philippe Mathieu-Daudé (5):
hw/core: Remove use of QERR_UNSUPPORTED
hw/core: Remove use of QERR_FEATURE_DISABLED
hw/core: Remove uses of QERR_DEVICE_NO_HOTPLUG
hw/core: Remove uses of QERR_PROPERTY_VALUE_BAD
hw/c
QERR_DEVICE_NO_HOTPLUG definition is obsolete since 2015 (commit
4629ed1e989, "qerror: Finally unused, clean up"). Replace the two
uses and drop the definition.
Signed-off-by: Philippe Mathieu-Daudé
---
include/qapi/qmp/qerror.h | 3 ---
hw/core/qdev.c| 3 ++-
softmmu/qdev-monitor.c
QERR_INVALID_PARAMETER_VALUE definition is obsolete since 2015
(commit 4629ed1e989, "qerror: Finally unused, clean up").
Replace the definitions used in hw/core/.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/qdev-properties-system.c | 2 +-
monitor/misc.c | 3 +--
softmmu/
QERR_PROPERTY_VALUE_BAD definition is obsolete since 2015 (commit
4629ed1e989, "qerror: Finally unused, clean up"). Replace the two
uses and drop the definition.
Signed-off-by: Philippe Mathieu-Daudé
---
include/qapi/qmp/qerror.h | 3 ---
hw/core/qdev-properties.c | 2 +-
target/i386/cpu.c
On 10/28/21 03:17, Richard Henderson wrote:
> On 10/26/21 9:56 PM, Philippe Mathieu-Daudé wrote:
>> -static inline void store_cpu_offset(TCGv_i32 var, int offset)
>> +static inline void store_cpu_offset(TCGv_i32 var, int offset, bool
>> is_temp)
>> {
>> tcg_gen_st_i32(var, cpu_env, offset);
Missing review: patches #2 & #5 (new)
Introduce store_cpu_field_constant() helper to avoid using temporary
when the value is constant (and read-only).
Since v2:
- Simplify store_cpu_field_constant(), do not modify store_cpu_field()
- Added another use in gen_rev16()
Philippe Mathieu-Daudé (5):
Avoid using a TCG temporary for a read-only constant.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/translate.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index d6af5b1b039..083a6d6e
Since the mask is a constant value, use tcg_constant_i32()
instead of a TCG temporary.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/translate.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 52ba562c96b..98f5925
When using a constant variable, we can replace the store_cpu_field()
call by store_cpu_field_constant() which avoid using TCG temporaries.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/translate.c | 21 ++---
1 file changed, 6 insertions(+),
Similarly to the store_cpu_field() helper which takes a TCG
temporary, store its value to the CPUState, introduce the
store_cpu_field_constant() helper which store a constant to
CPUState (without using any TCG temporary).
Suggested-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
The immediate value used for comparison is constant and
read-only. Move it to the constant pool. This frees a
TCG temporary for unsigned saturation opcodes.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/translate-sve.c | 17 -
1 file changed
On 10/15/21 06:10, Richard Henderson wrote:
> The named function no longer exists.
It seems to be declared inlined since QEMU v0.1.0 in 2003!
So it was likely a typo.
Anyhow,
Reviewed-by: Philippe Mathieu-Daudé
> Refer to host_signal_handler instead.
>
> Signed-off-by: Richard Henderson
> --
The timer unit only has registers that fit in a region 0x30 bytes
long. No need to have the timer region larger than that.
Signed-off-by: BALATON Zoltan
---
hw/timer/sh_timer.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c
in
On 10/15/21 06:10, Richard Henderson wrote:
> This is a new interface to be provided by the os emulator for
> raising SIGBUS on fault. Use the new record_sigbus target hook.
>
> Signed-off-by: Richard Henderson
> ---
> include/exec/exec-all.h | 14 ++
This header deserves a system/u
On Sat, 30 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/29/21 23:02, BALATON Zoltan wrote:
The timer memory region is only accessed via aliases that are 0x1000
bytes long, no need to have the timer region larger than that.
Signed-off-by: BALATON Zoltan
---
hw/timer/sh_timer.c | 3 +--
1 file
> -Original Message-
> From: Richard Henderson
> Sent: Friday, October 29, 2021 1:53 PM
> To: Taylor Simpson ; qemu-devel@nongnu.org
> Cc: f4...@amsat.org; a...@rev.ng; Brian Cain
> Subject: Re: [PATCH v4 10/30] Hexagon HVX (target/hexagon) instruction
> utility functions
>
> On 10/12/2
On 10/15/21 06:10, Richard Henderson wrote:
> For s390x, the only unaligned accesses that are signaled are atomic,
> and we don't actually want to raise SIGBUS for those, but instead
> raise a SPECIFICATION error, which the kernel will report as SIGILL.
>
> Split out a do_unaligned_access function
On 10/15/21 06:10, Richard Henderson wrote:
> This is not used by, nor required by, user-only.
>
> Signed-off-by: Richard Henderson
> ---
> target/ppc/internal.h| 8 +++-
> target/ppc/excp_helper.c | 8 +++-
> 2 files changed, 6 insertions(+), 10 deletions(-)
Reviewed-by: Philippe M
On 10/15/21 06:10, Richard Henderson wrote:
> Use the new cpu_loop_exit_sigbus for atomic_mmu_lookup, which
> has access to complete alignment info from the TCGMemOpIdx arg.
>
> Reviewed-by: Alex Bennée
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/user-exec.c | 13 -
> 1 fil
On 10/15/21 06:10, Richard Henderson wrote:
> Handle BUS_ADRALN via cpu_loop_exit_sigbus, but allow other SIGBUS
> si_codes to continue into the host-to-guest signal coversion code.
Typo "conversion".
>
> Signed-off-by: Richard Henderson
> ---
> linux-user/signal.c | 3 +++
> 1 file changed, 3
On Sat, 30 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/29/21 23:02, BALATON Zoltan wrote:
This function is very simple and provides no advantage. Call sites
become simpler without it so just write it in line and drop the
separate function.
Signed-off-by: BALATON Zoltan
---
hw/intc/sh_intc.c
Typo s/hppa/ppc/ in subject.
On 10/15/21 06:10, Richard Henderson wrote:
> We will raise SIGBUS directly from cpu_loop_exit_sigbus.
>
> Signed-off-by: Richard Henderson
> ---
> linux-user/ppc/cpu_loop.c | 8
> 1 file changed, 8 deletions(-)
>
> diff --git a/linux-user/ppc/cpu_loop.c b
On Sat, 30 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/29/21 23:02, BALATON Zoltan wrote:
The hw_error function calls abort and is not meant to be used by
devices. Use qemu_log_mask instead to log and ignore invalid accesses.
Also fix format strings to allow dropping type casts of hwaddr and u
On Fri, 29 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/29/21 23:02, BALATON Zoltan wrote:
This now includes the previous code style clean up series so
everything is in the series now. This got big enough for now so I'll
wait until these are merged (hopefully before the freeze) before going
on
On Sat, 30 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/29/21 23:02, BALATON Zoltan wrote:
Signed-off-by: BALATON Zoltan
---
hw/char/sh_serial.c | 98 +++--
hw/sh4/sh7750.c | 56 +++---
include/hw/sh4/sh.h | 9 +
3 files cha
On 10/15/21 06:10, Richard Henderson wrote:
> To be called from tcg generated code on hosts that support
> unaligned accesses natively, in response to an access that
> is supposed to be aligned.
>
> Reviewed-by: Peter Maydell
> Signed-off-by: Richard Henderson
> ---
> include/tcg/tcg-ldst.h |
A guest could craft a specific stream of instructions that will have QEMU
write 0xF9 to inappropriate locations in memory. Add additional asserts
to check for this. Generate a #UD if there are more than 14 prefix bytes.
Found by Julian Stecklina
Signed-off-by: Cameron Esfahani
---
target/i38
HVX is a set of wide vector instructions. Machine state includes
vector registers (VRegs)
vector predicate registers (QRegs)
temporary registers for intermediate values
store buffer (masked stores and scatter/gather)
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 34 ++
1 file changed, 34 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index e865410..f548404 100644
--- a/target/hexagon/gen
Signed-off-by: Taylor Simpson
---
target/hexagon/README | 81 ++-
1 file changed, 80 insertions(+), 1 deletion(-)
diff --git a/target/hexagon/README b/target/hexagon/README
index b0b2435..372e247 100644
--- a/target/hexagon/README
+++ b/target/hexa
This series adds support for the Hexagon Vector eXtensions (HVX)
These instructions are documented here
https://developer.qualcomm.com/downloads/qualcomm-hexagon-v66-hvx-programmer-s-reference-manual
Hexagon HVX is a wide vector engine with 128 byte vectors.
See patch 01 Hexagon HVX README for m
Add HVX support to the semantics generator
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_semantics.c | 33 +
target/hexagon/hex_common.py | 13 +
2 files changed, 46 insertions(+)
diff --git a/target/hexagon/gen_s
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 106 +++
1 file changed, 106 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index b5c6cad..a560504 100644
--- a/target/
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/hex_regs.h | 1 +
target/hexagon/cpu.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/hexagon/hex_regs.h b/target/hexagon/hex_regs.h
index f291911..e1b3149 100644
--- a/target/hexag
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 103 +++
1 file changed, 103 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index f53a7f2..32f8e20 100644
--- a/target/
Build the infrastructure to create overrides for HVX instructions.
We create a new empty file (gen_tcg_hvx.h) that will be populated
in subsequent patches.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h|
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/attribs_def.h.inc | 22 ++
1 file changed, 22 insertions(+)
diff --git a/target/hexagon/attribs_def.h.inc b/target/hexagon/attribs_def.h.inc
index e44a7ea..dc890a5 100644
--- a/target/hexagon/attrib
Imported from the Hexagon architecture library
imported/allext_macros.def Top level macro include for all extensions
imported/macros.def Scalar core macros (some HVX here)
imported/mmvec/macros.defHVX macro definitions
The macro definition files specify instru
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 31 +++
1 file changed, 31 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index a560504..916230e 100644
--- a/target/hexagon/gen_tc
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_dectree_import.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/target/hexagon/gen_dectree_import.c
b/target/hexagon/gen_dectree_import.c
index 5b7ecfc..ee35467 100644
--- a/target/hexagon/gen_d
macros to interface with the generator
macros referenced in instruction semantics
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/macros.h | 22 +++
target/hexagon/mmvec/macros.h | 354 ++
2 files changed, 376 insertion
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 42 ++
1 file changed, 42 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index f548404..f53a7f2 100644
--- a/target/hex
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index 32f8e20..435c7b5 100644
--- a/target/hexagon/gen_tcg_hvx
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
tests/tcg/hexagon/scatter_gather.c | 1011
tests/tcg/hexagon/Makefile.target |2 +
2 files changed, 1013 insertions(+)
create mode 100644 tests/tcg/hexagon/scatter_gather.c
diff --git a/test
Functions to support scatter/gather
Add new file to target/hexagon/meson.build
Signed-off-by: Taylor Simpson
---
target/hexagon/mmvec/system_ext_mmvec.h | 25 ++
target/hexagon/mmvec/system_ext_mmvec.c | 47 +
target/hexagon/meson.build
Tests for
packet semantics
vector loads (aligned and unaligned)
vector stores (aligned and unaligned)
vector masked stores
vector new value store
maximum HVX temps in a packet
vector operations
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
tests/tcg/h
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/translate.h | 61
target/hexagon/genptr.c| 15 +++
target/hexagon/translate.c | 239 -
3 files changed, 311 insertions(+), 4 deletions(-)
diff --git a/t
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_helper_funcs.py | 112 ++--
target/hexagon/gen_helper_protos.py | 16 ++-
target/hexagon/gen_tcg_funcs.py | 254 ++--
3 files changed, 360 insertions(+), 22 deletion
Add new file to target/hexagon/meson.build
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/mmvec/decode_ext_mmvec.h | 24
target/hexagon/decode.c | 24 +++-
target/hexagon/mmvec/decode_ext_mmvec.c | 236
target
Probe and commit vector stores (masked and scatter/gather)
Log vector register writes
Add the execution counters to the debug log
Histogram instructions
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/helper.h| 16 +++
target/hexagon/op_helper.c | 282 ++
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 122 +++
1 file changed, 122 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index ac2143e..e865410 100644
--- a/target/
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 50
1 file changed, 50 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index 916230e..ac2143e 100644
--- a/target/h
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
tests/tcg/hexagon/hvx_histogram_input.h | 717
tests/tcg/hexagon/hvx_histogram_row.h | 24 ++
tests/tcg/hexagon/hvx_histogram.c | 88
tests/tcg/hexagon/Makefile.target | 5 +
tes
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 150 +++
1 file changed, 150 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index 435c7b5..2d1d778 100644
--- a/target/hex
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/decode.c | 4 +
target/hexagon/imported/allextenc.def| 20 +
target/hexagon/imported/encode.def | 1 +
target/hexagon/imported/mmvec/encode_ext.def | 794 +
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
tests/tcg/hexagon/vector_add_int.c | 61 ++
tests/tcg/hexagon/Makefile.target | 3 ++
2 files changed, 64 insertions(+)
create mode 100644 tests/tcg/hexagon/vector_add_int.c
diff --git a/test
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 218 +++
1 file changed, 218 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index 2d1d778..cdcc938 100644
--- a/target/hex
On 10/29/21 12:07 PM, Eduardo Habkost wrote:
I should have flushed the queue a long time ago. Apologies for
taking so long.
A single patch, by now. Probably there are others I missed on
the mailing list, and if necessary I will send another pull
request.
The following changes since commit a92
On Thu, Oct 28, 2021 at 11:22 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 10/19/21 9:44 AM, Warner Losh wrote:
> > Arm specific user context structures for signal handling and the closely
> > related trap frame.
> >
> > Signed-off-by: Stacey Son
> > Signed-off-by: Warner Losh
On Thu, Oct 28, 2021 at 4:41 PM Warner Losh wrote:
>
>
> On Thu, Oct 28, 2021 at 11:25 AM Richard Henderson <
> richard.hender...@linaro.org> wrote:
>
>> On 10/19/21 9:44 AM, Warner Losh wrote:
>> > +regs->regs[TARGET_REG_PC] = ka->_sa_handler;
>>
>> Surely there should be some handling of th
From: Bin Meng
Move the codes around so that the order of .subsections matches
the one they are referenced in vmstate_riscv_cpu.
Signed-off-by: Bin Meng
---
target/riscv/machine.c | 92 +-
1 file changed, 46 insertions(+), 46 deletions(-)
diff --git a/
On 10/29/21 12:30 PM, Markus Armbruster wrote:
The following changes since commit c52d69e7dbaaed0ffdef8125e79218672c30161d:
Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20211027'
into staging (2021-10-27 11:45:18 -0700)
are available in the Git repository at:
git://re
I've got some experience with the SDL library, so I can help
reviewing patches here.
Signed-off-by: Thomas Huth
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 894dc43105..a24dfbfd32 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2313,6 +2313,7
Hi, Richard:
On 10/20/2021 12:19 PM, Richard Henderson wrote:
> On 10/19/21 12:34 AM, Xiaojuan Yang wrote:
>> This includes:
>> - TLBSRCH
>> - TLBRD
>> - TLBWR
>> - TLBFILL
>> - TLBCLR
>> - TLBFLUSH
>> - INVTLB
>>
>> Signed-off-by: Xiaojuan Yang
>> Signed-off-by: Song Gao
>> ---
>> target/loon
alistair23/qemu.git tags/pull-riscv-to-apply-20211029-1
for you to fetch changes up to 15161e425ee1bb1180f9cec574cda44fb10c0931:
target/riscv: change the api for RVF/RVD fmin/fmax (2021-10-29 16:56:12 +1000)
Fifth RISC-V PR for QEMU 6.2
From: Alistair Francis
Using a macro for the PLIC configuration doesn't make the code any
easier to read. Instead it makes it harder to figure out what is going
on, so let's remove it.
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 202110
From: Alistair Francis
Fixup the PLIC context address to correctly support the threshold and
claim register.
Fixes: ef63100648 ("hw/riscv: opentitan: Update to the latest build")
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Message-id: 20211025040657.262696-1-alistair.fran...@opensour
From: Alistair Francis
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Tested-by: Bin Meng
Message-id: 20211022060133.3045020-3-alistair.fran...@opensource.wdc.com
---
include/hw/riscv/sifive_u.h | 1 -
hw/riscv/sifive_u.c | 14 +
From: Alexey Baturo
Signed-off-by: Alexey Baturo
Reviewed-by: Alistair Francis
Message-id: 20211025173609.2724490-3-space.monkey.deliv...@gmail.com
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 96 +
1 file changed, 96 insertions(+)
dif
From: Alexey Baturo
Signed-off-by: Alexey Baturo
Reviewed-by: Alistair Francis
Message-id: 20211025173609.2724490-5-space.monkey.deliv...@gmail.com
Signed-off-by: Alistair Francis
---
target/riscv/machine.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/targe
From: Alistair Francis
Add a generic function that can create the PLIC strings.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Message-id: 20211022060133.3045020-2-alistair.fran...@opensource.wdc.com
---
include/hw/riscv/boot.h | 2 ++
hw/riscv/boo
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