Re: [PATCH v5 00/26] fdt: Make OF_BOARD a boolean option

Hi Simon Position unchanged on this series: adding fake dts for boards that generate their device tree in the dts directory is not good. If you have them in documentation the it is acceptable. Cheers FF Le mar. 26 oct. 2021 à 02:24, Simon Glass a écrit : > With Ilias' efforts we have dropped

[PATCH v4 07/22] target/riscv: Add defines for AIA CSRs

The RISC-V AIA specification extends RISC-V local interrupts and introduces new CSRs. This patch adds defines for the new AIA CSRs. Signed-off-by: Anup Patel --- target/riscv/cpu_bits.h | 128 1 file changed, 128 insertions(+) diff --git a/target/riscv/c

Re: [PATCH 17/24] bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack

On Tue, Oct 19, 2021 at 11:45 AM Warner Losh wrote: > > Defines for registers and stack layout related to signals. > > Signed-off-by: Stacey Son > Signed-off-by: Warner Losh > --- > bsd-user/arm/target_arch_signal.h | 57 +++ > 1 file changed, 57 insertions(+) > cre

[PATCH v4 10/22] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32

The AIA specification adds new CSRs for RV32 so that RISC-V hart can support 64 local interrupts on both RV32 and RV64. Signed-off-by: Anup Patel --- target/riscv/cpu.h| 14 +- target/riscv/cpu_helper.c | 10 +- target/riscv/csr.c| 560 +++--- ta

Re: [PATCH] hw/arm/virt: Expose empty NUMA nodes through ACPI

On Tue, Oct 26, 2021 at 07:41:01AM +0800, Gavin Shan wrote: > The empty NUMA nodes, where no memory resides, aren't exposed > through ACPI SRAT table. It's not user preferred behaviour because > the corresponding memory node devices are missed from the guest > kernel as the following example shows,

Re: [PATCH 21/24] bsd-user/arm/target_arch_signal.h: arm get_mcontext

On Tue, Oct 19, 2021 at 11:45 AM Warner Losh wrote: > > Get the machine context from the CPU state. > > Signed-off-by: Stacey Son > Signed-off-by: Klye Evans > Signed-off-by: Warner Losh > --- > bsd-user/arm/target_arch_signal.h | 38 +++ > 1 file changed, 38 insert

[PATCH v4 15/22] target/riscv: Implement AIA IMSIC interface CSRs

The AIA specification defines IMSIC interface CSRs for easy access to the per-HART IMSIC registers without using indirect xiselect and xireg CSRs. This patch implements the AIA IMSIC interface CSRs. Signed-off-by: Anup Patel --- target/riscv/csr.c | 199 ++

Re: [PATCH v8 62/78] target/riscv: rvv-1.0: widening floating-point/integer type-convert

On Fri, Oct 15, 2021 at 6:47 PM wrote: > > From: Frank Chang > > Add the following instructions: > > * vfwcvt.rtz.xu.f.v > * vfwcvt.rtz.x.f.v > > Also adjust GEN_OPFV_WIDEN_TRANS() to accept multiple floating-point > rounding modes. > > Signed-off-by: Frank Chang Acked-by: Alistair Francis Al

Re: [PATCH 18/24] bsd-user/arm/target_arch_signal.h: arm machine context for signals

On Tue, Oct 19, 2021 at 11:45 AM Warner Losh wrote: > > Signed-off-by: Stacey Son > Signed-off-by: Klye Evans > Signed-off-by: Warner Losh > --- > bsd-user/arm/target_arch_signal.h | 36 +++ > 1 file changed, 36 insertions(+) > > diff --git a/bsd-user/arm/target_arc

[PATCH v4 17/22] target/riscv: Allow users to force enable AIA CSRs in HART

We add "x-aia" command-line option for RISC-V HART using which allows users to force enable CPU AIA CSRs without changing the interrupt controller available in RISC-V machine. Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 5 + target/riscv/cpu.h | 1 + 2 f

Re: [PATCH v8 63/78] target/riscv: add "set round to odd" rounding mode helper function

On Fri, Oct 15, 2021 at 6:39 PM wrote: > > From: Frank Chang > > helper_set_rounding_mode() is responsible for SIGILL, and "round to odd" > should be an interface private to translation, so add a new independent > helper_set_rod_rounding_mode(). > > Signed-off-by: Frank Chang Acked-by: Alistair

[PATCH v4 05/22] target/riscv: Allow setting CPU feature from machine/device emulation

The machine or device emulation should be able to force set certain CPU features because: 1) We can have certain CPU features which are in-general optional but implemented by RISC-V CPUs on the machine. 2) We can have devices which require a certain CPU feature. For example, AIA IMSIC devices

[PATCH v4 22/22] docs/system: riscv: Document AIA options for virt machine

We have two new machine options "aia" and "aia-guests" available for the RISC-V virt machine so let's document these options. Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- docs/system/riscv/virt.rst | 16 1 file changed, 16 insertions(+) diff --git a/docs/system/

[PATCH v4 03/22] target/riscv: Implement hgeie and hgeip CSRs

The hgeie and hgeip CSRs are required for emulating an external interrupt controller capable of injecting virtual external interrupt to Guest/VM running at VS-level. Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- target/riscv/cpu.c| 61 --

Re: [PATCH v8 78/78] target/riscv: rvv-1.0: update opivv_vadc_check() comment

On Fri, Oct 15, 2021 at 6:48 PM wrote: > > From: Frank Chang > > Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions is > moved to Section 11.4 in RVV v1.0 spec. Update the comment, no > functional changes. > > Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Alistair >

[PATCH v4 00/22] QEMU RISC-V AIA support

The advanced interrupt architecture (AIA) extends the per-HART local interrupt support. Along with this, it also adds IMSIC (MSI contrllor) and Advanced PLIC (wired interrupt controller). The latest AIA draft specification can be found here: https://github.com/riscv/riscv-aia/releases/download/0.2

Re: [PATCH 20/24] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args

On Tue, Oct 19, 2021 at 11:45 AM Warner Losh wrote: > > Implement set_sigtramp_args to setup the arguments to the sigtramp > calls. > > Signed-off-by: Stacey Son > Signed-off-by: Warner Losh > --- > bsd-user/arm/target_arch_signal.h | 35 +++ > 1 file changed, 35 ins

[PATCH v4 02/22] target/riscv: Implement SGEIP bit in hip and hie CSRs

A hypervsior can optionally take guest external interrupts using SGEIP bit of hip and hie CSRs. Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 3 ++- target/riscv/cpu_bits.h | 3 +++ target/riscv/csr.c | 18 +++--- 3 files changed, 16 in

Re: [PATCH v8 74/78] target/riscv: rvv-1.0: add vsetivli instruction

On Fri, Oct 15, 2021 at 7:12 PM wrote: > > From: Frank Chang > > Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Alistair > --- > target/riscv/insn32.decode | 2 ++ > target/riscv/insn_trans/trans_rvv.c.inc | 27 + > 2 files changed, 29 inserti

[PATCH v4 01/22] target/riscv: Fix trap cause for RV32 HS-mode CSR access from RV64 HS-mode

We should be returning illegal instruction trap when RV64 HS-mode tries to access RV32 HS-mode CSR. Fixes: d6f20dacea51 ("target/riscv: Fix 32-bit HS mode access permissions") Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- target/riscv/csr.c | 2 +- 1 file changed, 1 insertion(+),

[PATCH v4 11/22] target/riscv: Implement AIA hvictl and hviprioX CSRs

The AIA hvictl and hviprioX CSRs allow hypervisor to control interrupts visible at VS-level. This patch implements AIA hvictl and hviprioX CSRs. Signed-off-by: Anup Patel --- target/riscv/cpu.h | 1 + target/riscv/csr.c | 126 + target/riscv/mach

Re: [PATCH 24/24] bsd-user: add arm target build

On Tue, Oct 19, 2021 at 11:45 AM Warner Losh wrote: > > Signed-off-by: Warner Losh > --- > configs/targets/arm-bsd-user.mak | 2 ++ > 1 file changed, 2 insertions(+) > create mode 100644 configs/targets/arm-bsd-user.mak > > diff --git a/configs/targets/arm-bsd-user.mak > b/configs/targets/arm-

[PATCH v4 04/22] target/riscv: Improve delivery of guest external interrupts

The guest external interrupts from an interrupt controller are delivered only when the Guest/VM is running (i.e. V=1). This means any guest external interrupt which is triggered while the Guest/VM is not running (i.e. V=0) will be missed on QEMU resulting in Guest with sluggish response to serial c

[PATCH v4 12/22] target/riscv: Implement AIA interrupt filtering CSRs

The AIA specificaiton adds interrupt filtering support for M-mode and HS-mode. Using AIA interrupt filtering M-mode and H-mode can take local interrupt 13 or above and selectively inject same local interrupt to lower privilege modes. At the moment, we don't have any local interrupts above 12 so we

[PATCH v4 09/22] target/riscv: Implement AIA local interrupt priorities

The AIA spec defines programmable 8-bit priority for each local interrupt at M-level, S-level and VS-level so we extend local interrupt processing to consider AIA interrupt priorities. The AIA CSRs which help software configure local interrupt priorities will be added by subsequent patches. Signed

Re: [PATCH] hvf: arm: Ignore cache operations on MMIO

On 26.10.21 02:14, Richard Henderson wrote: On 10/25/21 12:13 PM, Alexander Graf wrote: +    /* + * We ran into an instruction that traps for data, but is not + * hardware predecoded. This should not ever happen for well + * behaved guests. Let's try to see if we can somehow rescue

[PATCH v4 18/22] hw/intc: Add RISC-V AIA APLIC device emulation

The RISC-V AIA (Advanced Interrupt Architecture) defines a new interrupt controller for wired interrupts called APLIC (Advanced Platform Level Interrupt Controller). The APLIC is capabable of forwarding wired interupts to RISC-V HARTs directly or as MSIs (Message Signaled Interupts). This patch ad

[PATCH v4 13/22] target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs

The AIA specification introduces new [m|s|vs]topi CSRs for reporting pending local IRQ number and associated IRQ priority. Signed-off-by: Anup Patel --- target/riscv/csr.c | 154 + 1 file changed, 154 insertions(+) diff --git a/target/riscv/csr.c b/ta

[PATCH v4 20/22] hw/intc: Add RISC-V AIA IMSIC device emulation

The RISC-V AIA (Advanced Interrupt Architecture) defines a new interrupt controller for MSIs (message signal interrupts) called IMSIC (Incoming Message Signal Interrupt Controller). The IMSIC is per-HART device and also suppport virtualizaiton of MSIs using dedicated VS-level guest interrupt files.

[PATCH v4 06/22] target/riscv: Add AIA cpu feature

We define a CPU feature for AIA CSR support in RISC-V CPUs which can be set by machine/device emulation. The RISC-V CSR emulation will also check this feature for emulating AIA CSRs. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Reviewed-by: Alistair Francis --- target/riscv/cpu.h | 3 ++- 1

Re: [PATCH 2/9] qapi: Mark unstable QMP parts with feature 'unstable'

John Snow writes: > On Mon, Oct 25, 2021 at 1:25 AM Markus Armbruster wrote: > >> Add special feature 'unstable' everywhere the name starts with 'x-', >> except for InputBarrierProperties member x-origin and >> MemoryBackendProperties member x-use-canonical-path-for-ramblock-id, >> because these

[PATCH v4 16/22] hw/riscv: virt: Use AIA INTC compatible string when available

We should use the AIA INTC compatible string in the CPU INTC DT nodes when the CPUs support AIA feature. This will allow Linux INTC driver to use AIA local interrupt CSRs. Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- hw/riscv/virt.c | 13 +++-- 1 file changed, 11 insertio

[PATCH v4 08/22] target/riscv: Allow AIA device emulation to set ireg rmw callback

The AIA device emulation (such as AIA IMSIC) should be able to set (or provide) AIA ireg read-modify-write callback for each privilege level of a RISC-V HART. Signed-off-by: Anup Patel --- target/riscv/cpu.h| 19 +++ target/riscv/cpu_helper.c | 14 ++ 2 files

Re: [PATCH v3] target/riscv: fix VS interrupts forwarding to HS

On Mon, Oct 25, 2021 at 7:48 PM Jose Martins wrote: > > > From your last response I thought you sent a different series that > > replaces this patch. If that's not the case do you mind sending this > > patch again? > > I already sent the patch series here: > https://lists.gnu.org/archive/html/qemu

[PATCH v4 19/22] hw/riscv: virt: Add optional AIA APLIC support to virt machine

We extend virt machine to emulate AIA APLIC devices only when "aia=aplic" parameter is passed along with machine name in QEMU command-line. When "aia=none" or not specified then we fallback to original PLIC device emulation. Signed-off-by: Anup Patel --- hw/riscv/Kconfig| 1 + hw/riscv

[PATCH v2] hvf: arm: Ignore cache operations on MMIO

Apple's Hypervisor.Framework forwards cache operations as MMIO traps into user space. For MMIO however, these have no meaning: There is no cache attached to them. So let's just treat cache data exits as nops. This fixes OpenBSD booting as guest. Signed-off-by: Alexander Graf Reported-by: AJ Bar

[PATCH v4 21/22] hw/riscv: virt: Add optional AIA IMSIC support to virt machine

We extend virt machine to emulate both AIA IMSIC and AIA APLIC devices only when "aia=aplic-imsic" parameter is passed along with machine name in the QEMU command-line. The AIA IMSIC is only a per-HART MSI controller so we use AIA APLIC in MSI-mode to forward all wired interrupts as MSIs to the AIA

[PATCH v4 14/22] target/riscv: Implement AIA xiselect and xireg CSRs

The AIA specification defines [m|s|vs]iselect and [m|s|vs]ireg CSRs which allow indirect access to interrupt priority arrays and per-HART IMSIC registers. This patch implements AIA xiselect and xireg CSRs. Signed-off-by: Anup Patel --- target/riscv/cpu.h | 7 ++ target/riscv/csr.c | 17

Re: [PATCH 1/9] qapi: New special feature flag "unstable"

Kashyap Chamarthy writes: > On Mon, Oct 25, 2021 at 07:25:24AM +0200, Markus Armbruster wrote: >> By convention, names starting with "x-" are experimental. The parts >> of external interfaces so named may be withdrawn or changed >> incompatibly in future releases. >> >> Drawback: promoting some

Re: [PATCH v8 77/78] target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmorn.mm

On Fri, Oct 15, 2021 at 6:57 PM wrote: > > From: Frank Chang > > Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Alistair > --- > target/riscv/helper.h | 4 ++-- > target/riscv/insn32.decode | 4 ++-- > target/riscv/insn_trans/trans_rvv.c.inc | 4 ++--

Re: [PATCH v2 3/4] qemu-img: add --shallow option for qemu-img compare

On 21.10.21 12:12, Vladimir Sementsov-Ogievskiy wrote: Allow compare only top images of backing chains. This is useful to compare images with same backing file or to compare incremental images from the chain of incremental backups with "--stat" option. Signed-off-by: Vladimir Sementsov-Ogievskiy

Re: [PATCH v8 73/78] target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11

On Fri, Oct 15, 2021 at 6:50 PM wrote: > > From: Frank Chang > > Rename r2_zimm to r2_zimm11 for the upcoming vsetivli instruction. > vsetivli has 10-bits of zimm but vsetvli has 11-bits of zimm. > > Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Alistair > --- > target/riscv/insn

Re: [PATCH 3/9] qapi: Eliminate QCO_NO_OPTIONS for a slight simplification

John Snow writes: > On Mon, Oct 25, 2021 at 1:25 AM Markus Armbruster wrote: > >> Signed-off-by: Markus Armbruster >> --- >> include/qapi/qmp/dispatch.h | 1 - >> monitor/misc.c | 3 +-- >> scripts/qapi/commands.py| 5 + >> 3 files changed, 2 insertions(+), 7 deletions(-)

Re: [PATCH 1/9] qapi: New special feature flag "unstable"

Am 25.10.2021 um 07:25 hat Markus Armbruster geschrieben: > By convention, names starting with "x-" are experimental. The parts > of external interfaces so named may be withdrawn or changed > incompatibly in future releases. > > Drawback: promoting something from experimental to stable involves a

Re: [PATCH v2 1/4] qemu-img: implement compare --stat

25.10.2021 19:40, Hanna Reitz wrote: On 21.10.21 12:12, Vladimir Sementsov-Ogievskiy wrote: With new option qemu-img compare will not stop at first mismatch, but instead calculate statistics: how many clusters with different data, how many clusters with equal data, how many clusters were unalloc

Re: [PATCH v2 2/4] qemu-img: make --block-size optional for compare --stat

On 21.10.21 12:12, Vladimir Sementsov-Ogievskiy wrote: Let's detect block-size automatically if not specified by user: If both files define cluster-size, use minimum to be more precise. If both files don't specify cluster-size, use default of 64K If only one file specify cluster-size, just

Re: [PATCH 1/9] qapi: New special feature flag "unstable"

On Tue, Oct 26, 2021 at 09:15:30AM +0200, Markus Armbruster wrote: > Kashyap Chamarthy writes: > > > On Mon, Oct 25, 2021 at 07:25:24AM +0200, Markus Armbruster wrote: [...] > > Looks like there's another stable property with an "x-" prefix: > > "x-remote-object", part of QOM type @RemoteObject

Re: [PATCH v2 5/5] sgx: Reset the vEPC regions during VM reboot

On Fri, Oct 22, 2021 at 11:46:30PM +0200, Paolo Bonzini wrote: > On 22/10/21 21:27, Yang Zhong wrote: > >+ > >+for (j = 0; j < num; j++) { > >+epc = pcms->sgx_epc.sections[j]; > >+hostmem = MEMORY_BACKEND(epc->hostmem); > >+fd = memory_region_get_fd(host_memory_backend_g

Re: [PATCH v2 4/4] iotests: add qemu-img-compare-stat test

On 21.10.21 12:12, Vladimir Sementsov-Ogievskiy wrote: Test new feature qemu-img compare --stat. Signed-off-by: Vladimir Sementsov-Ogievskiy --- .../qemu-iotests/tests/qemu-img-compare-stat | 88 +++ .../tests/qemu-img-compare-stat.out | 106 ++ 2 fil

Re: [Libguestfs] [PATCH 1/9] qapi: New special feature flag "unstable"

On Tue, Oct 26, 2021 at 09:37:29AM +0200, Kevin Wolf wrote: > Am 25.10.2021 um 07:25 hat Markus Armbruster geschrieben: [...] > > This commit updates documentation and prepares tests. The next commit > > updates the QAPI schema. The remaining patches update the QAPI > > generator and wire up -c

Re: [PATCH v4] isa-applesmc: provide OSK forwarding on Apple hosts

On Mon, Oct 25, 2021 at 09:45:35PM +0200, Alexander Graf wrote: > > On 25.10.21 17:10, Daniel P. Berrangé wrote: > > On Mon, Oct 25, 2021 at 04:53:57PM +0200, Alexander Graf wrote: > > > On 25.10.21 16:47, Daniel P. Berrangé wrote: > > > > On Mon, Oct 25, 2021 at 04:42:22PM +0200, Alexander Graf w

Re: [PATCH v2 1/4] qemu-img: implement compare --stat

On 26.10.21 09:53, Vladimir Sementsov-Ogievskiy wrote: 25.10.2021 19:40, Hanna Reitz wrote: On 21.10.21 12:12, Vladimir Sementsov-Ogievskiy wrote: With new option qemu-img compare will not stop at first mismatch, but instead calculate statistics: how many clusters with different data, how many

Re: [PATCH 4/9] qapi: Tools for sets of special feature flags in generated code

John Snow writes: > On Mon, Oct 25, 2021 at 1:25 AM Markus Armbruster wrote: > >> New enum QapiSpecialFeature enumerates the special feature flags. >> >> New helper gen_special_features() returns code to represent a >> collection of special feature flags as a bitset. >> >> The next few commits w

Re: [PATCH] hvf: arm: Ignore cache operations on MMIO

On 10/26/21 09:09, Alexander Graf wrote: > On 26.10.21 02:14, Richard Henderson wrote: >> On 10/25/21 12:13 PM, Alexander Graf wrote: >>> @@ -1156,6 +1183,11 @@ int hvf_vcpu_exec(CPUState *cpu) >>> hvf_exit->exception.physical_address, isv, >>>    iswrite, s1ptw, len, s

Re: [PATCH v2] hvf: arm: Ignore cache operations on MMIO

On 10/26/21 09:12, Alexander Graf wrote: > Apple's Hypervisor.Framework forwards cache operations as MMIO traps > into user space. For MMIO however, these have no meaning: There is no > cache attached to them. > > So let's just treat cache data exits as nops. > > This fixes OpenBSD booting as gue

[PATCH] block-backend: Silence clang -m32 compiler warning

Similarly to e7e588d432d31ecebc26358e47201dd108db964c, there is a warning in block/block-backend.c that qiov->size <= INT64_MAX is always true on machines where size_t is narrower than a uint64_t. In said commit, we silenced this warning by casting to uint64_t. The commit introducing this warning

Re: [PATCH 5/9] qapi: Generalize struct member policy checking

John Snow writes: > On Mon, Oct 25, 2021 at 1:25 AM Markus Armbruster wrote: > >> The generated visitor functions call visit_deprecated_accept() and >> visit_deprecated() when visiting a struct member with special feature >> flag 'deprecated'. This makes the feature flag visible to the actual >

Re: [PATCH v2 1/4] qemu-img: implement compare --stat

26.10.2021 11:47, Hanna Reitz wrote: On 26.10.21 09:53, Vladimir Sementsov-Ogievskiy wrote: 25.10.2021 19:40, Hanna Reitz wrote: On 21.10.21 12:12, Vladimir Sementsov-Ogievskiy wrote: With new option qemu-img compare will not stop at first mismatch, but instead calculate statistics: how many c

Re: [PATCH 1/9] qapi: New special feature flag "unstable"

* Kevin Wolf (kw...@redhat.com) wrote: > Am 25.10.2021 um 07:25 hat Markus Armbruster geschrieben: > > By convention, names starting with "x-" are experimental. The parts > > of external interfaces so named may be withdrawn or changed > > incompatibly in future releases. > > > > Drawback: promoti

Re: [PATCH 1/9] qapi: New special feature flag "unstable"

On Tue, Oct 26, 2021 at 10:22:15AM +0100, Dr. David Alan Gilbert wrote: > * Kevin Wolf (kw...@redhat.com) wrote: > > Am 25.10.2021 um 07:25 hat Markus Armbruster geschrieben: > > > By convention, names starting with "x-" are experimental. The parts > > > of external interfaces so named may be with

Re: [PATCH 1/9] qapi: New special feature flag "unstable"

Kevin Wolf writes: > Am 25.10.2021 um 07:25 hat Markus Armbruster geschrieben: >> By convention, names starting with "x-" are experimental. The parts >> of external interfaces so named may be withdrawn or changed >> incompatibly in future releases. >> >> Drawback: promoting something from exper

Re: [PATCH 6/9] qapi: Generalize command policy checking

Philippe Mathieu-Daudé writes: > On 10/25/21 07:25, Markus Armbruster wrote: >> The code to check command policy can see special feature flag >> 'deprecated' as command flag QCO_DEPRECATED. I want to make feature >> flag 'unstable' visible there as well, so I can add policy for it. >> >> To let

[PATCH v2] hw/arm/virt: Rename default_bus_bypass_iommu

Since commit d8fb7d0969d5 ("vl: switch -M parsing to keyval"), machine parameter definitions cannot use underscores, because keyval_dashify() transforms them to dashes and the parser doesn't find the parameter. This affects option default_bus_bypass_iommu which was introduced in the same release:

Re: [PATCH 7/9] qapi: Generalize enum member policy checking

John Snow writes: > On Mon, Oct 25, 2021 at 1:26 AM Markus Armbruster wrote: > >> The code to check enumeration value policy can see special feature >> flag 'deprecated' in QEnumLookup member flags[value]. I want to make >> feature flag 'unstable' visible there as well, so I can add policy for

Re: [PATCH 8/9] qapi: Factor out compat_policy_input_ok()

Philippe Mathieu-Daudé writes: > On 10/25/21 07:25, Markus Armbruster wrote: >> The code to check policy for handling deprecated input is triplicated. >> Factor it out into compat_policy_input_ok() before I mess with it in >> the next commit. >> >> Signed-off-by: Markus Armbruster >> --- >> in

Re: [PATCH] hw/arm/virt: Expose empty NUMA nodes through ACPI

On Tue, 26 Oct 2021 07:41:01 +0800 Gavin Shan wrote: > The empty NUMA nodes, where no memory resides, aren't exposed > through ACPI SRAT table. It's not user preferred behaviour because > the corresponding memory node devices are missed from the guest > kernel as the following example shows, and

Re: [PATCH v5 10/12] tests/acpi: add test cases for VIOT

On Thu, Oct 21, 2021 at 11:02:27AM +0200, Eric Auger wrote: > Hi Jean, > > On 10/20/21 7:27 PM, Jean-Philippe Brucker wrote: > > Add two test cases for VIOT, one on the q35 machine and the other on > > virt. To test complex topologies the q35 test has two PCIe buses that > > bypass the IOMMU (and

[PATCH] hw/i386: fix vmmouse registration

According to the logic of vmmouse_update_handler function, vmmouse should be registered as an event handler when it's status is zero. vmmouse_read_id resets the status but does not register the handler. This patch adds vmmouse registration and activation when status is reset. Signed-off-by: Pavel

Re: [PATCH v2 07/15] iotests/297: refactor run_[mypy|pylint] as generic execution shim

On 19.10.21 16:49, John Snow wrote: There's virtually nothing special here anymore; we can combine these into a single, rather generic function. Signed-off-by: John Snow --- tests/qemu-iotests/297 | 42 ++ 1 file changed, 22 insertions(+), 20 deletions

Re: [PATCH v7 1/4] monitor/hmp: add support for flag argument with value

* Stefan Reiter (s.rei...@proxmox.com) wrote: > Adds support for the "-xV" parameter type, where "-x" denotes a flag > name and the "V" suffix indicates that this flag is supposed to take an > arbitrary string parameter. > > These parameters are always optional, the entry in the qdict will be > om

Re: [PATCH v2 08/15] iotests/297: Change run_linter() to raise an exception on failure

On 19.10.21 16:49, John Snow wrote: Instead of using a process return code as the python function return value (or just not returning anything at all), allow run_linter() to raise an exception instead. The responsibility for printing output on error shifts from the function itself to the caller,

Re: [PATCH v7 3/4] qapi/monitor: allow VNC display id in set/expire_password

* Stefan Reiter (s.rei...@proxmox.com) wrote: > It is possible to specify more than one VNC server on the command line, > either with an explicit ID or the auto-generated ones à la "default", > "vnc2", "vnc3", ... > > It is not possible to change the password on one of these extra VNC > displays t

Re: [PATCH v7 0/4] VNC-related HMP/QMP fixes

* Markus Armbruster (arm...@redhat.com) wrote: > I'm done reviewing. David, care to have another look at the HMP part? Yep, looking good to me - is that going via qmp, hmp, or vnc ? Dave -- Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK

Re: [PATCH v2 09/15] iotests/297: update tool availability checks

On 19.10.21 16:49, John Snow wrote: As mentioned in 'iotests/297: Don't rely on distro-specific linter binaries', these checks are overly strict. Update them to be in-line with how we actually invoke the linters themselves. Signed-off-by: John Snow --- tests/qemu-iotests/297 | 9 + 1

[PATCH v1 01/28] tests/docker: Use apt build-dep in debian10

From: Richard Henderson Replace the complex apt-get subshell with apt build-dep. Signed-off-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20211014224435.2539547-2-richard.hender...@linaro.org> --- tests/docker/dockerfiles/debian10.docker | 9 ++--- 1 file changed, 6 insert

[PATCH v1 04/28] gitlab-ci: Remove special casing for hexagon testing

From: Richard Henderson Now that the hexagon container is using a pre-built toolchain, we do not need to make the build optional. Signed-off-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20211014224435.2539547-5-richard.hender...@linaro.org> --- .gitlab-ci.d/buildtest.yml

[PATCH v1 02/28] tests/docker: Simplify debian-all-test-cross

From: Richard Henderson The base debian10 image contains enough to build qemu; we do not need to repeat that within the new image. Signed-off-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20211014224435.2539547-3-richard.hender...@linaro.org> --- tests/docker/dockerfiles/debia

[PATCH v1 00/28] testing, plugins and gdbstub for 6.2

Hi, This is an omnibus series covering a bunch of my maintainer trees. We have updates to testing from Richard which expands the testing nios2 and microblaze along with an update to the hexagon images. There is also a patch from Paolo that fixes a linux-user build issue that hasn't been merged yet

[PATCH v1 06/28] tests/docker: Add debian-microblaze-cross image

From: Richard Henderson Build the entire cross tool chain from source. For this reason, default to caching. Signed-off-by: Richard Henderson [AJB: Update MAINTAINERS] Signed-off-by: Alex Bennée Message-Id: <20211014224435.2539547-7-richard.hender...@linaro.org> --- MAINTAINERS

[PATCH v1 07/28] tests/tcg: Enable container_cross_cc for microblaze

From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20211014224435.2539547-8-richard.hender...@linaro.org> --- tests/tcg/configure.sh | 6 ++ 1 file changed, 6 insertions(+) diff --git a/tests/tcg/configure.sh b/tests/tcg/configure.sh index 1f9

[PATCH v1 09/28] tests/docker: split PARTIAL into PARTIAL and VIRTUAL images

This is mostly to ensure we don't include the toolchain and bootstrap builds in DOCKER_IMAGES which is useful when verifying all images still build. Signed-off-by: Alex Bennée --- tests/docker/Makefile.include | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/tests/dock

[PATCH v1 11/28] tests/tcg: enable debian-nios2-cross for test building

Now we have a nios2 test image we can start using it to build tests. However signal handling in nios2 is still broken so we disable the signals and linux-test tests that trigger the bug. Signed-off-by: Alex Bennée --- MAINTAINERS | 1 + tests/tcg/configure.sh | 6 +

[PATCH v1 28/28] gdbstub: Switch to the thread receiving a signal

From: Pavel Labath Respond with Txxthread:; instead of a plain Sxx to indicate which thread received the signal. Otherwise, the debugger will associate it with the main one. Also automatically select this thread, as that is what gdb expects. Signed-off-by: Pavel Labath Message-Id: <20211019

[PATCH v1 03/28] tests/docker: Update debian-hexagon-cross to a newer toolchain

From: Brian Cain The new dockerfile uses a complete toolchain built by CodeLinaro. Remove the special casing that was necessary when the dockerfile built the toolchain from source. Suggested-by: Brian Cain Signed-off-by: Richard Henderson [AJB: fix MAINTAINERS] Signed-off-by: Alex Bennée Mess

[PATCH v1 05/28] tests/docker: Add debian-nios2-cross image

From: Richard Henderson Build the entire cross tool chain from source. For this reason, default to caching. Signed-off-by: Richard Henderson [AJB: honour NOUSER in cached fetch and build, update MAINTAINERS] Signed-off-by: Alex Bennée Message-Id: <20211014224435.2539547-6-richard.hender...@lin

[PATCH v1 08/28] tests/tcg: Fix some targets default cross compiler path

From: Philippe Mathieu-Daudé We do not want a shell command substitution, but a parameter substitution (with assignment). Replace $() -> ${}, otherwise the expanded command return an empty string and the $cross_cc variable is not set. Fixes: 634ef789f8e ("tests/tcg: add more default compilers to

[PATCH v1 13/28] plugins/cache: freed heap-allocated mutexes

From: Mahmoud Mandour Signed-off-by: Mahmoud Mandour Signed-off-by: Alex Bennée Message-Id: <20210810134844.166490-2-ma.mando...@gmail.com> --- contrib/plugins/cache.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/contrib/plugins/cache.c b/contrib/plugins/cache.c index a1e03ca882..a25

[PATCH v1 12/28] ebpf: really include it only in system emulators

From: Paolo Bonzini eBPF libraries are being included in user emulators, which is useless and also breaks --static compilation if a shared library for libbpf is present in the system. Reported-by: Alex Bennée Signed-off-by: Paolo Bonzini Signed-off-by: Alex Bennée Message-Id: <20211012162252.

[PATCH v1 27/28] tests/tcg: remove duplicate EXTRA_RUNS

We set it bellow outside the #if leg. Signed-off-by: Alex Bennée --- tests/tcg/multiarch/Makefile.target | 2 -- 1 file changed, 2 deletions(-) diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target index 6ccb592aac..c0d9e638e9 100644 --- a/tests/tcg/multiarch/M

[PATCH v1 10/28] tests/docker: allow non-unique userid

This is a bit of a band-aid against hand-built images that have been accidentally polluted by a user build. All images pulled from the registry shouldn't have the user defined. Signed-off-by: Alex Bennée --- tests/docker/docker.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff -

[PATCH v1 25/28] plugins: add helper functions for coverage plugins

From: Ivanov Arkady Which provide information about: - start_code. - end_code. - entry. - path to the executable binary. Signed-off-by: Ivanov Arkady Message-Id: <163491883461.304355.8210754161847179432.stgit@pc-System-Product-Name> [AJB: reword title, better descriptions, defaults, rm export,

Re: [PATCH v2 10/15] iotests/297: split test into sub-cases

On 19.10.21 16:49, John Snow wrote: Take iotest 297's main() test function and split it into two sub-cases that can be skipped individually. We can also drop custom environment setup from the pylint test as it isn't needed. Signed-off-by: John Snow --- tests/qemu-iotests/297 | 63

Re: [PATCH 0/5] trace: inroduce qmp: trace namespace

Stefan Hajnoczi writes: > On Thu, Oct 14, 2021 at 06:22:32PM +0300, Vladimir Sementsov-Ogievskiy wrote: >> 12.10.2021 14:49, Markus Armbruster wrote: >> > Vladimir Sementsov-Ogievskiy writes: [...] >> Another possible way is to update QAPI code generator to insert a personal >> trace point for

[PULL 3/5] virtiofsd: Add a helper to send element on virtqueue

From: Vivek Goyal We have open coded logic to take locks and push element on virtqueue at three places. Add a helper and use it everywhere. Code is easier to read and less number of lines of code. Signed-off-by: Vivek Goyal Message-Id: <20210930153037.1194279-5-vgo...@redhat.com> Reviewed-by: S

[PATCH v1 26/28] contrib/plugins: add a drcov plugin

From: Ivanov Arkady This patch adds the ability to generate files in drcov format. Primary goal this script is to have coverage logfiles thatwork in Lighthouse. Signed-off-by: Ivanov Arkady Message-Id: <163491884553.304355.13246023070235438959.stgit@pc-System-Product-Name> [AJB: use g_ptr_arra

Re: [PATCH v2] hw/arm/virt: Rename default_bus_bypass_iommu

On 10/26/21 11:37, Jean-Philippe Brucker wrote: > Since commit d8fb7d0969d5 ("vl: switch -M parsing to keyval"), machine > parameter definitions cannot use underscores, because keyval_dashify() > transforms them to dashes and the parser doesn't find the parameter. > > This affects option default_b

[PATCH v1 18/28] chardev: don't exit() straight away on C-a x

While there are a number of uses in the code-base of the exit(0) pattern it gets in the way of clean exit which can do all of it's house-keeping. In particular it was reported that you can crash plugins this way because TCG can still be running on other threads when the atexit callback is called.

[PATCH v1 17/28] docs/tcg-plugins: add L2 arguments to cache docs

From: Mahmoud Mandour cache plugin now allows optional L2 per-core cache emulation that can be configured through plugin arguments, this commit adds this functionality to the docs. While I'm at it, I editted the bullet point for cache plugin to say: contrib/plugins/cache.c instead of con

[PATCH v1 21/28] docs: remove references to TCG tracing

Users wanting this sort of functionality should turn to TCG plugins instead. Signed-off-by: Alex Bennée Cc: Luis Vilanova Cc: Stefan Hajnoczi --- docs/about/removed-features.rst | 13 + docs/devel/tracing.rst | 85 - 2 files changed, 13 insertions(+

[PATCH v1 19/28] tests/plugins: extend the insn plugin to track opcode sizes

This is mostly a convenience feature for identifying frontends that do multiple repeat loads so I can test changes to the instruction tracking interface. Signed-off-by: Alex Bennée --- tests/plugin/insn.c | 37 +++-- 1 file changed, 35 insertions(+), 2 deletions(-

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