On Fri, Oct 15, 2021 at 6:48 PM <frank.ch...@sifive.com> wrote:
>
> From: Frank Chang <frank.ch...@sifive.com>
>
> Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions is
> moved to Section 11.4 in RVV v1.0 spec. Update the comment, no
> functional changes.
>
> Signed-off-by: Frank Chang <frank.ch...@sifive.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/insn_trans/trans_rvv.c.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
> b/target/riscv/insn_trans/trans_rvv.c.inc
> index b78c13f0be7..de2e2e506fe 100644
> --- a/target/riscv/insn_trans/trans_rvv.c.inc
> +++ b/target/riscv/insn_trans/trans_rvv.c.inc
> @@ -1613,7 +1613,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)
> \
>
> /*
> * For vadc and vsbc, an illegal instruction exception is raised if the
> - * destination vector register is v0 and LMUL > 1. (Section 12.4)
> + * destination vector register is v0 and LMUL > 1. (Section 11.4)
> */
> static bool opivv_vadc_check(DisasContext *s, arg_rmrr *a)
> {
> --
> 2.25.1
>
>
