Re: [PATCH] block/export/fuse.c: fix musl build

Le lun. 25 oct. 2021 à 08:31, Michael Tokarev a écrit : > > 22.10.2021 12:52, Fabrice Fontaine пишет: > > Include linux/falloc.h if CONFIG_FALLOCATE_ZERO_RANGE is defined to fix > > https://gitlab.com/qemu-project/qemu/-/commit/50482fda98bd62e072c30b7ea73c985c4e9d9bbb > > and avoid the following b

Re: [PATCH 1/9] qapi: New special feature flag "unstable"

Markus Armbruster wrote: > By convention, names starting with "x-" are experimental. The parts > of external interfaces so named may be withdrawn or changed > incompatibly in future releases. > > Drawback: promoting something from experimental to stable involves a > name change. Client code need

Re: [PATCH 2/9] qapi: Mark unstable QMP parts with feature 'unstable'

Markus Armbruster wrote: > Add special feature 'unstable' everywhere the name starts with 'x-', > except for InputBarrierProperties member x-origin and > MemoryBackendProperties member x-use-canonical-path-for-ramblock-id, > because these two are actually stable. > > Signed-off-by: Markus Armbrust

Re: [PATCH 3/9] qapi: Eliminate QCO_NO_OPTIONS for a slight simplification

Markus Armbruster wrote: > Signed-off-by: Markus Armbruster Reviewed-by: Juan Quintela

Re: gitlab/cirrus auth token failure

On Sun, Oct 24, 2021 at 06:15:38PM -0700, Richard Henderson wrote: > On 10/24/21 12:42 AM, Paolo Bonzini wrote: > > On 22/10/21 20:31, Richard Henderson wrote: > > > Hi Daniel, you win the cookie because you committed cirrus.yml. > > > > > > I should have reported this before the weekend, but at s

[PATCH] configure: remove useless NPTL probe

Using a linuxthreads system with a recent QEMU will have bigger problems than just not having NPTL. Remove the unnecessary check. Signed-off-by: Paolo Bonzini --- configure | 19 --- 1 file changed, 19 deletions(-) diff --git a/configure b/configure index 03162008aa..b5c36347eb

[PATCH] configure: do not duplicate CPU_CFLAGS into QEMU_LDFLAGS

CPU_CFLAGS is included in the link commands both during configure and (via config-meson.cross) during meson. It need not be added separately to QEMU_LDFLAGS. Signed-off-by: Paolo Bonzini --- configure | 53 ++--- 1 file changed, 14 insertions(+),

[PATCH] hvf: Avoid mapping regions < PAGE_SIZE as ram

HVF has generic memory listener code that adds all RAM regions as HVF RAM regions. However, HVF can only handle page aligned, page granule regions. So let's ignore regions that are not page aligned and sized. They will be trapped as MMIO instead. Signed-off-by: Alexander Graf --- accel/hvf/hvf-

Re: [PATCH] Trim some trailing space from human-readable output

Nominating for qemu-trivial. Tweaking the subject to monitor: Trim some trailing space from human-readable output as Philippe suggested would be nice. Markus Armbruster writes: > I noticed -cpu help printing enough trailing spaces to make the output > at least 84 characters wide. Looks u

Re: [PATCH] Trim some trailing space from human-readable output

Le 25/10/2021 à 11:12, Markus Armbruster a écrit : Nominating for qemu-trivial. Tweaking the subject to monitor: Trim some trailing space from human-readable output as Philippe suggested would be nice. Markus Armbruster writes: I noticed -cpu help printing enough trailing spaces to ma

Re: [PATCH v6 00/15] target/riscv: Rationalize XLEN and operand length

On 2021/10/22 下午11:50, Richard Henderson wrote: On 10/22/21 1:26 AM, LIU Zhiwei wrote: As the specification said, "PC bits above XLEN are ignored, and when the PC is written, it is sign-extended to fill the widest supported XLEN." We still need special process of PC for exceptions or jump in

Re: [PATCH] block/export/fuse.c: fix musl build

Am 22.10.2021 um 11:52 hat Fabrice Fontaine geschrieben: > Include linux/falloc.h if CONFIG_FALLOCATE_ZERO_RANGE is defined to fix > https://gitlab.com/qemu-project/qemu/-/commit/50482fda98bd62e072c30b7ea73c985c4e9d9bbb > and avoid the following build failure on musl: > > ../block/export/fuse.c: I

Re: [PATCH v3] target/riscv: fix VS interrupts forwarding to HS

> From your last response I thought you sent a different series that > replaces this patch. If that's not the case do you mind sending this > patch again? I already sent the patch series here: https://lists.gnu.org/archive/html/qemu-devel/2021-06/msg00553.html. I got confused, I should have raised

Re: [PATCH] block/export/fuse.c: fix musl build

Le lun. 25 oct. 2021 à 11:33, Kevin Wolf a écrit : > > Am 22.10.2021 um 11:52 hat Fabrice Fontaine geschrieben: > > Include linux/falloc.h if CONFIG_FALLOCATE_ZERO_RANGE is defined to fix > > https://gitlab.com/qemu-project/qemu/-/commit/50482fda98bd62e072c30b7ea73c985c4e9d9bbb > > and avoid the f

Re: [PULL 0/1] Block patches

On Thu, Oct 21, 2021 at 03:08:56PM -0700, Richard Henderson wrote: > On 10/21/21 10:41 AM, Stefan Hajnoczi wrote: > > The following changes since commit afc9fcde55296b83f659de9da3cdf044812a6eeb: > > > >Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into > > staging (2021-10-20 0

Re: [PATCH v4] isa-applesmc: provide OSK forwarding on Apple hosts

On 22.10.21 18:14, Vladislav Yaroshchuk wrote: On Apple hosts we can read AppleSMC OSK key directly from host's SMC and forward this value to QEMU Guest. Usage: `-device isa-applesmc,hostosk=on` Apple licence allows use and run up to two additional copies or instances of macOS operating withi

[PATCH] Add a comment about endian-ness of capabilities recorded in pci config space

Values in PCI configuration space are written in little endian format. This includes capability values recorded in pci config space for pci bridges etc. Add comment to remind developers to make sure the values are written in little endian for all platforms and that the code must be endian safe. Ple

[PATCH v4 01/25] main-loop.h: introduce qemu_in_main_thread()

When invoked from the main loop, this function is the same as qemu_mutex_iothread_locked, and returns true if the BQL is held. When invoked from iothreads or tests, it returns true only if the current AioContext is the Main Loop. This essentially just extends qemu_mutex_iothread_locked to work als

[PATCH v4 04/25] include/sysemu/block-backend: split header into I/O and global state (GS) API

Similarly to the previous patches, split block-backend.h in block-backend-io.h and block-backend-global-state.h In addition, remove "block/block.h" include as it seems it is not necessary anymore, together with "qemu/iov.h" block-backend-common.h contains the structures shared between the two hea

[PATCH v4 02/25] include/block/block: split header into I/O and global state API

block.h currently contains a mix of functions: some of them run under the BQL and modify the block layer graph, others are instead thread-safe and perform I/O in iothreads. It is not easy to understand which function is part of which group (I/O vs GS), and this patch aims to clarify it. The "GS" f

[PATCH v4 03/25] assertions for block global state API

All the global state (GS) API functions will check that qemu_in_main_thread() returns true. If not, it means that the safety of BQL cannot be guaranteed, and they need to be moved to I/O. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- block.c| 136 +++

[PATCH v4 00/25] block layer: split block APIs in global state and I/O

Currently, block layer APIs like block-backend.h contain a mix of functions that are either running in the main loop and under the BQL, or are thread-safe functions and run in iothreads performing I/O. The functions running under BQL also take care of modifying the block graph, by using drain and/o

[PATCH v4 08/25] block: introduce assert_bdrv_graph_writable

We want to be sure that the functions that write the child and parent list of a bs are under BQL and drain. BQL prevents from concurrent writings from the GS API, while drains protect from I/O. TODO: drains are missing in some functions using this assert. Therefore a proper assertion will fail. B

[PATCH v4 05/25] block/block-backend.c: assertions for block-backend

All the global state (GS) API functions will check that qemu_in_main_thread() returns true. If not, it means that the safety of BQL cannot be guaranteed, and they need to be moved to I/O. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- block/block-backend.c | 90

[PATCH v4 07/25] assertions for block_int global state API

Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- block.c | 17 + block/backup.c | 1 + block/block-backend.c | 3 +++ block/commit.c | 2 ++ block/dirty-bitmap.c| 1 + bl

[PATCH v4 09/25] include/block/blockjob_int.h: split header into I/O and GS API

Since the I/O functions are not many, keep a single file. Also split the function pointers in BlockJobDriver. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- include/block/blockjob_int.h | 28 1 file changed, 28 insertions(+) diff --git a

[PATCH v4 06/25] include/block/block_int: split header into I/O and global state API

Similarly to the previous patch, split block_int.h in block_int-io.h and block_int-global-state.h block_int-common.h contains the structures shared between the two headers, and the functions that can't be categorized as I/O or global state. Assertions are added in the next patch. Signed-off-by:

[PATCH v4 12/25] assertions for blockob.h global state API

Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- blockjob.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/blockjob.c b/blockjob.c index fbd6c7d873..4982f6a2b5 100644 --- a/blockjob.c +++ b/blockjob.c @@ -61,6 +61,7 @@ static bool is_block_job(Job *job)

[PATCH v4 13/25] include/sysemu/blockdev.h: move drive_add and inline drive_def

drive_add is only used in softmmu/vl.c, so it can be a static function there, and drive_def is only a particular use case of qemu_opts_parse_noisily, so it can be inlined. Also remove drive_mark_claimed_by_board, as it is only defined but not implemented (nor used) anywhere. This also helps simpl

[PATCH v4 25/25] job.h: assertions in the callers of JobDriver funcion pointers

Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- job.c | 9 + 1 file changed, 9 insertions(+) diff --git a/job.c b/job.c index dbfa67bb0a..94b142684f 100644 --- a/job.c +++ b/job.c @@ -380,6 +380,8 @@ void job_ref(Job *job) void job_unref(Job *job) { +a

[PATCH v4 11/25] include/block/blockjob.h: global state API

blockjob functions run always under the BQL lock. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- include/block/blockjob.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/block/blockjob.h b/include/block/blockjob.h index d200f33c10..fa0c3f7a47 100

[PATCH v4 14/25] include/systemu/blockdev.h: global state API

blockdev functions run always under the BQL lock. Signed-off-by: Emanuele Giuseppe Esposito --- include/sysemu/blockdev.h | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/include/sysemu/blockdev.h b/include/sysemu/blockdev.h index 960b54d320..b07f15df09 100

[PATCH v4 10/25] assertions for blockjob_int.h

Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- blockjob.c | 4 1 file changed, 4 insertions(+) diff --git a/blockjob.c b/blockjob.c index 4bad1408cb..fbd6c7d873 100644 --- a/blockjob.c +++ b/blockjob.c @@ -83,6 +83,7 @@ BlockJob *block_job_get(const char *id)

[PATCH v4 17/25] block/copy-before-write.h: global state API + assertions

copy-before-write functions always run under BQL lock. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Paolo Bonzini Reviewed-by: Stefan Hajnoczi --- block/copy-before-write.c | 2 ++ block/copy-before-write.h | 7 +++ 2 files changed, 9 insertions(+) diff --git a/block/copy-before

[PATCH v4 16/25] include/block/snapshot: global state API + assertions

Snapshots run also under the BQL lock, so they all are in the global state API. The aiocontext lock that they hold is currently an overkill and in future could be removed. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Paolo Bonzini Reviewed-by: Stefan Hajnoczi --- block/snapshot.c

[PATCH v4 15/25] assertions for blockdev.h global state API

Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Paolo Bonzini Reviewed-by: Stefan Hajnoczi --- block/block-backend.c | 3 +++ blockdev.c| 15 +++ 2 files changed, 18 insertions(+) diff --git a/block/block-backend.c b/block/block-backend.c index fa30bb88ea..e5e4f

[PATCH v4 19/25] block_int-common.h: split function pointers in BlockDriver

Similar to the header split, also the function pointers in BlockDriver can be split in I/O and global state. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- include/block/block_int-common.h | 458 --- 1 file changed, 237 insertions(+), 221

[PATCH v4 18/25] block/coroutines: I/O API

block coroutines functions run in different aiocontext, and are not protected by the BQL. Therefore are I/O. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Paolo Bonzini Reviewed-by: Stefan Hajnoczi --- block/coroutines.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/block/

[PATCH v4 20/25] block_int-common.h: assertion in the callers of BlockDriver function pointers

Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- block.c | 17 + 1 file changed, 17 insertions(+) diff --git a/block.c b/block.c index 94bff5c757..40c4729b8d 100644 --- a/block.c +++ b/block.c @@ -1074,6 +1074,7 @@ int refresh_total_sectors(BlockDriverS

[PATCH v4 23/25] block-backend-common.h: split function pointers in BlockDevOps

Assertions in the callers of the funciton pointrs are already added by previous patches. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- include/sysemu/block-backend-common.h | 28 ++- 1 file changed, 23 insertions(+), 5 deletions(-) diff --gi

Re: [PATCH 1/3] file-posix: add `aio-max-batch` option

On Thu, Oct 21, 2021 at 04:18:41PM +0100, Stefan Hajnoczi wrote: On Thu, Sep 23, 2021 at 04:30:58PM +0200, Stefano Garzarella wrote: Commit d7ddd0a161 ("linux-aio: limit the batch size using `aio-max-batch` parameter") added a way to limit the batch size of Linux AIO backend for the entire AIO c

[PATCH v4 22/25] block_int-common.h: assertions in the callers of BdrvChildClass function pointers

Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- block.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/block.c b/block.c index 40c4729b8d..da80e89ad4 100644 --- a/block.c +++ b/block.c @@ -1462,6 +1462,7 @@ const BdrvChildClass child_of_bds = { AioC

Re: [PATCH v2 0/3] virtio: increase VIRTQUEUE_MAX_SIZE to 32k

On Thu, Oct 21, 2021 at 05:39:28PM +0200, Christian Schoenebeck wrote: > On Freitag, 8. Oktober 2021 18:08:48 CEST Christian Schoenebeck wrote: > > On Freitag, 8. Oktober 2021 16:24:42 CEST Christian Schoenebeck wrote: > > > On Freitag, 8. Oktober 2021 09:25:33 CEST Greg Kurz wrote: > > > > On Thu,

[PATCH v4 21/25] block_int-common.h: split function pointers in BdrvChildClass

Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- include/block/block_int-common.h | 51 1 file changed, 32 insertions(+), 19 deletions(-) diff --git a/include/block/block_int-common.h b/include/block/block_int-common.h index 9857e775fe.

[PATCH v4 24/25] job.h: split function pointers in JobDriver

The job API will be handled separately in another serie. Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- include/qemu/job.h | 16 1 file changed, 16 insertions(+) diff --git a/include/qemu/job.h b/include/qemu/job.h index 6e67b6977f..7e9e59f4b8 10064

Re: [PATCH] configure: do not duplicate CPU_CFLAGS into QEMU_LDFLAGS

On 10/25/21 10:20, Paolo Bonzini wrote: Can we prefix with this? Since commit 4dba2789084 ("configure, meson: move CPU_CFLAGS out of QEMU_CFLAGS"), > CPU_CFLAGS is included in the link commands both during configure > and (via config-meson.cross) during meson. It need not be added > separat

Re: [PATCH] hvf: Avoid mapping regions < PAGE_SIZE as ram

Hi Alex, On 10/25/21 10:25, Alexander Graf wrote: > HVF has generic memory listener code that adds all RAM regions as HVF RAM > regions. However, HVF can only handle page aligned, page granule regions. > > So let's ignore regions that are not page aligned and sized. They will be > trapped as MMIO

[PATCH v2] hw/i386: Rename default_bus_bypass_iommu

Since commit d8fb7d0969d5 ("vl: switch -M parsing to keyval"), machine parameter definitions cannot use underscores, because keyval_dashify() transforms them to dashes and the parser doesn't find the parameter. This affects option default_bus_bypass_iommu which was introduced in the same release:

Re: [PATCH] block/export/fuse.c: fix musl build

On 10/22/21 11:52, Fabrice Fontaine wrote: > Include linux/falloc.h if CONFIG_FALLOCATE_ZERO_RANGE is defined to fix > https://gitlab.com/qemu-project/qemu/-/commit/50482fda98bd62e072c30b7ea73c985c4e9d9bbb > and avoid the following build failure on musl: > > ../block/export/fuse.c: In function 'fu

Re: [PATCH] block/export/fuse.c: fix musl build

On 10/25/21 13:01, Philippe Mathieu-Daudé wrote: > On 10/22/21 11:52, Fabrice Fontaine wrote: >> Include linux/falloc.h if CONFIG_FALLOCATE_ZERO_RANGE is defined to fix >> https://gitlab.com/qemu-project/qemu/-/commit/50482fda98bd62e072c30b7ea73c985c4e9d9bbb >> and avoid the following build failure

[PATCH] qmp: Stabilize preconfig

The -preconfig option and exit-preconfig command are around for quite some time now. However, they are still marked as unstable. This is suboptimal because it may block some upper layer in consuming it. In this specific case - Libvirt avoids using experimental features. Signed-off-by: Michal Privo

Re: [PATCH v5 04/12] hw/i386/pc: Allow instantiating a virtio-iommu device

On Thu, Oct 21, 2021 at 03:47:09PM +0200, Igor Mammedov wrote: > On Wed, 20 Oct 2021 18:27:38 +0100 > Jean-Philippe Brucker wrote: > > > Allow instantiating a virtio-iommu device by adding an ACPI Virtual I/O > > Translation table (VIOT), which describes the relation between the > > virtio-iommu

Re: [PATCH v4 01/25] main-loop.h: introduce qemu_in_main_thread()

On 10/25/21 12:17, Emanuele Giuseppe Esposito wrote: > When invoked from the main loop, this function is the same > as qemu_mutex_iothread_locked, and returns true if the BQL is held. > When invoked from iothreads or tests, it returns true only > if the current AioContext is the Main Loop. > > Thi

Re: [PATCH v5 0/6] block/rbd: migrate to coroutines and add write zeroes support

Am 16.09.21 um 14:34 schrieb Peter Lieven: Am 09.07.21 um 12:21 schrieb Kevin Wolf: Am 08.07.2021 um 20:23 hat Peter Lieven geschrieben: Am 08.07.2021 um 14:18 schrieb Kevin Wolf : Am 07.07.2021 um 20:13 hat Peter Lieven geschrieben: Am 06.07.2021 um 17:25 schrieb Kevin Wolf : Am 06.07.2021 u

Re: [PATCH v4 02/25] include/block/block: split header into I/O and global state API

On 10/25/21 12:17, Emanuele Giuseppe Esposito wrote: > block.h currently contains a mix of functions: > some of them run under the BQL and modify the block layer graph, > others are instead thread-safe and perform I/O in iothreads. > It is not easy to understand which function is part of which > gr

[PATCH v2 3/4] usb/uhci: Replace pci_set_irq with qemu_set_irq

Instead of using pci_set_irq, store the irq in the device state and use it explicitly so variants having different interrupt handling can use their own. Signed-off-by: BALATON Zoltan Reviewed-by: Gerd Hoffmann --- hw/usb/hcd-uhci.c | 4 +++- hw/usb/hcd-uhci.h | 2 +- 2 files changed, 4 insertio

[PATCH v2 0/4] hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts

This is the same as posted before just omitting the two patches that are optimisations by caching the func0 and avoiding QOM casts which could not be measured to have an effect but these reamaining patches are still needed to fix USB interrupts on pegasos2 Gerd, could you please take them? Regard

[PATCH v2 2/4] usb/uhci: Disallow user creating a vt82c686-uhci-pci device

Because this device only works as part of VIA superio chips set user creatable to false. Since the class init method is common for UHCI variants introduce a flag in UHCIInfo for this. Signed-off-by: BALATON Zoltan Reviewed-by: Gerd Hoffmann --- hw/usb/hcd-uhci.c | 3 +++ hw/usb/hcd-uhc

[PATCH v2 4/4] hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts

This device is part of a superio/ISA bridge chip and IRQs from it are routed to an ISA interrupt set by the Interrupt Line PCI config register. Implement this in a vt82c686-uhci-pci specific irq handler Using via_isa_set_irq(). Signed-off-by: BALATON Zoltan Reviewed-by: Jiaxun Yang Reviewed-by:

[PATCH v2 1/4] usb/uhci: Misc clean up

Fix a comment for coding style so subsequent patch will not get checkpatch error and simplify and shorten uhci_update_irq(). Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé --- hw/usb/hcd-uhci.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/usb/

Re: [PATCH 6/9] qapi: Generalize command policy checking

On 10/25/21 07:25, Markus Armbruster wrote: > The code to check command policy can see special feature flag > 'deprecated' as command flag QCO_DEPRECATED. I want to make feature > flag 'unstable' visible there as well, so I can add policy for it. > > To let me make it visible, add member @special

Re: [PATCH] Add a comment about endian-ness of capabilities recorded in pci config space

On Mon, Oct 25, 2021 at 03:47:36PM +0530, Ani Sinha wrote: > Values in PCI configuration space are written in little endian format. This > includes capability values recorded in pci config space for pci bridges etc. > Add comment to remind developers to make sure the values are written in little >

Re: [PATCH 1/9] qapi: New special feature flag "unstable"

On Mon, Oct 25, 2021 at 07:25:24AM +0200, Markus Armbruster wrote: > By convention, names starting with "x-" are experimental. The parts > of external interfaces so named may be withdrawn or changed > incompatibly in future releases. > > Drawback: promoting something from experimental to stable i

Re: [PATCH v4 6/8] iotests/300: avoid abnormal shutdown race condition

On 13.10.21 23:57, John Snow wrote: Wait for the destination VM to close itself instead of racing to shut it down first, which produces different error log messages from AQMP depending on precisely when we tried to shut it down. (For example: We may try to issue 'quit' immediately prior to the t

Re: [PATCH 8/9] qapi: Factor out compat_policy_input_ok()

On 10/25/21 07:25, Markus Armbruster wrote: > The code to check policy for handling deprecated input is triplicated. > Factor it out into compat_policy_input_ok() before I mess with it in > the next commit. > > Signed-off-by: Markus Armbruster > --- > include/qapi/compat-policy.h | 7 + > q

Re: [PATCH 1/9] qapi: New special feature flag "unstable"

On 10/25/21 14:05, Kashyap Chamarthy wrote: > On Mon, Oct 25, 2021 at 07:25:24AM +0200, Markus Armbruster wrote: >> By convention, names starting with "x-" are experimental. The parts >> of external interfaces so named may be withdrawn or changed >> incompatibly in future releases. >> >> Drawback:

Re: [PATCH] qmp: Stabilize preconfig

Michal Privoznik writes: > The -preconfig option and exit-preconfig command are around for > quite some time now. However, they are still marked as unstable. > This is suboptimal because it may block some upper layer in > consuming it. In this specific case - Libvirt avoids using > experimental f

Re: [PATCH v4 02/25] include/block/block: split header into I/O and global state API

Signed-off-by: Emanuele Giuseppe Esposito Reviewed-by: Stefan Hajnoczi --- block.c| 3 + block/meson.build | 7 +- include/block/block-common.h | 389 + Can this patch be split in 3? (first) include/block/block-glob

Re: [PATCH v2 0/4] hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts

On 10/25/21 13:33, BALATON Zoltan wrote: > This is the same as posted before just omitting the two patches that > are optimisations by caching the func0 and avoiding QOM casts which > could not be measured to have an effect but these reamaining patches > are still needed to fix USB interrupts on pe

Re: [PATCH 0/5] trace: inroduce qmp: trace namespace

On Thu, Oct 14, 2021 at 06:22:32PM +0300, Vladimir Sementsov-Ogievskiy wrote: > 12.10.2021 14:49, Markus Armbruster wrote: > > Vladimir Sementsov-Ogievskiy writes: > > > > > Hi all! > > > > > > We have handle_qmp_command and qmp_command_repond trace points to trace > > > qmp commands. They are v

[PATCH v4 03/17] target/riscv: additional macros to check instruction support

Given that the 128-bit version of the riscv spec adds new instructions, and that some instructions that were previously only available in 64-bit mode are now available for both 64-bit and 128-bit, we added new macros to check for the processor mode during translation. Although RV128 is a superset o

[PATCH v4 00/17] Adding partial support for 128-bit riscv target

This series of patches provides partial 128-bit support for the riscv target architecture, namely RVI and RVM, with very minimal csr support. Per Richard suggestions, this v4 makes the accesses to the gprs safer and cleaner, which paves the way to a more integrated 64/128 version. It also uses loc

[PATCH v4 04/17] target/riscv: separation of bitwise logic and aritmetic helpers

Introduction of a gen_logic function for bitwise logic to implement instructions in which not propagation of information occurs between bits and use of this function on the bitwise instructions. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas Reviewed-by: Richard Henderson --- tar

[PATCH v4 14/17] target/riscv: adding high part of some csrs

Adding the high part of a very minimal set of csr. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas Reviewed-by: Richard Henderson --- target/riscv/cpu.h | 4 target/riscv/machine.c | 2 ++ 2 files changed, 6 insertions(+) diff --git a/target/riscv/cpu.h b/target/riscv/cp

[PATCH v4 05/17] target/riscv: array for the 64 upper bits of 128-bit registers

The upper 64-bit of the 128-bit registers have now a place inside the cpu state structure, and are created as globals for future use. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/cpu.h | 2 ++ target/riscv/cpu.c | 9 + target/riscv/machine.

[PATCH v4 10/17] target/riscv: support for 128-bit U-type instructions

Adding the 128-bit version of lui and auipc, and introducing to that end a set register with immediat function to handle extension on 128 bits. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/translate.c| 22 ++ target/riscv/insn

[PATCH v4 02/17] qemu/int128: addition of a few 128-bit operations

Addition of not, xor, div and rem on 128-bit integers, used in particular within div/rem and csr helpers for computations on 128-bit registers in the 128-bit riscv target. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- include/qemu/int128.h | 26 + util/int128.c |

[PATCH v4 01/17] exec/memop: Rename MO_Q definition as MO_UQ and add MO_UO

Introducing defines for unsigned quad, signed quad, and unsigned octo access types to handle load and store by 128-bit processors. Signed-off-by: Frédéric Pétrot Reviewed-by: Philippe Mathieu-Daudé --- include/exec/memop.h | 13 target/arm/translate-a32.h

[PATCH v4 12/17] target/riscv: support for 128-bit arithmetic instructions

Addition of 128-bit adds and subs in their various sizes. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/insn32.decode | 3 + target/riscv/translate.c| 63 ++-- target/riscv/insn_trans/trans_rvb.c.inc | 20 +-- target/riscv/ins

[PATCH v4 15/17] target/riscv: helper functions to wrap calls to 128-bit csr insns

Given the side effects they have, the csr instructions are realized as helpers. We extend this existing infrastructure for 128-bit sized csr. We return 128-bit values using the same approach as for div/rem. Theses helpers all call a unique function that is currently a fallback on the 64-bit version

[PATCH v4 13/17] target/riscv: support for 128-bit M extension

Given the complexity of the implementation of these instructions, we call helpers to produce their behavior. From an implementation standpoint, we ended up by adding two more tcg globals to return the 128-bit result in a wrapper that itself is called by gen_arith. The sub 128-bit insns are now hand

[PATCH v4 06/17] target/riscv: setup everything so that riscv128-softmmu compiles

This patch is kind of a mess because several files have to be slightly modified to allow for a new target. In the current status, we have done our best to have RV64 and RV128 under the same RV64 umbrella, but there is still work to do to have a single executable for both. Once this patch applied,

Re: gitlab/cirrus auth token failure

On 25/10/2021 10.17, Daniel P. Berrangé wrote: On Sun, Oct 24, 2021 at 06:15:38PM -0700, Richard Henderson wrote: On 10/24/21 12:42 AM, Paolo Bonzini wrote: On 22/10/21 20:31, Richard Henderson wrote: Hi Daniel, you win the cookie because you committed cirrus.yml. I should have reported this

[PATCH v4 07/17] target/riscv: moving some insns close to similar insns

lwu and ld are functionally close to the other loads, but were after the stores in the source file. Similarly, xor was away from or and and by two arithmetic functions, while the immediate versions were nicely put together. This patch moves the aforementioned loads after lhu, and xor above or, wher

[PATCH v2 0/2] mconfigptr support

Patches add the mconfigptr csr support. mconfigptr is newly incorporated in risc-v privileged architecture specification 1.12 version. priv spec 1.12.0 version check is also added. qemu-system-riscv64 -nographic -machine virt -cpu rv64,priv_spec=v1.12.0 Changelog: v1->v2 -- 1. Added privi

[PATCH v4 09/17] target/riscv: support for 128-bit bitwise instructions

The 128-bit bitwise instructions do not need any function prototype change as the functions can be applied independently on the lower and upper part of the registers. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/translate.c | 21 +++-- 1 file cha

Re: MMIO/PIO dispatch file descriptors (ioregionfd) design discussion

On Mon, Oct 11, 2021 at 10:34:29PM -0700, elena wrote: > On Wed, Nov 25, 2020 at 12:44:07PM -0800, Elena Afanasova wrote: > > Hello, > > > > Hi > > Sorry for top-posting, just wanted to provide a quik update. > We are currently working on the support for ioregionfd in Qemu and will > be posting t

[PATCH v4 08/17] target/riscv: accessors to registers upper part and 128-bit load/store

Get function to retrieve the 64 top bits of a register, stored in the gprh field of the cpu state. Set function that writes the 128-bit value at once. The access to the gprh field can not be protected at compile time to make sure it is accessed only in the 128-bit version of the processor because w

[PATCH v2 2/2] target/riscv: csr: Implement mconfigptr CSR

Signed-off-by: Rahul Pathak --- target/riscv/cpu_bits.h | 1 + target/riscv/csr.c | 19 +++ 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index cffcd3a5df..e2f154b7c5 100644 --- a/target/riscv/cpu_bits.h +++

[PATCH v2 1/2] target/riscv: Add priv spec 1.12.0 version check

Signed-off-by: Rahul Pathak --- target/riscv/cpu.c | 4 +++- target/riscv/cpu.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 788fa0b11c..83c3814a5a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -405,7 +405,9 @@ st

[PATCH v4 11/17] target/riscv: support for 128-bit shift instructions

Handling shifts for 32, 64 and 128 operation length for RV128, following the general framework for handling various olens proposed by Richard. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas --- target/riscv/insn32.decode | 10 ++ target/riscv/translate.c

[PATCH v4 16/17] target/riscv: modification of the trans_csrxx for 128-bit support

As opposed to the gen_arith and gen_shift generation helpers, the csr insns do not have a common prototype, so the choice to generate 32/64 or 128-bit helper calls is done in the trans_csrxx functions. Signed-off-by: Frédéric Pétrot Co-authored-by: Fabien Portas Reviewed-by: Richard Henderson -

Re: [PATCH v5 0/6] block/rbd: migrate to coroutines and add write zeroes support

Am 25.10.2021 um 13:39 hat Peter Lieven geschrieben: > Am 16.09.21 um 14:34 schrieb Peter Lieven: > > Am 09.07.21 um 12:21 schrieb Kevin Wolf: > > > Am 08.07.2021 um 20:23 hat Peter Lieven geschrieben: > > > > Am 08.07.2021 um 14:18 schrieb Kevin Wolf : > > > > > Am 07.07.2021 um 20:13 hat Peter Li

[PATCH v4 17/17] target/riscv: actual functions to realize crs 128-bit insns

The csrs are accessed through function pointers: we add read operations in the table for two 128-bit accesses (writes fallback to the 64-bit version): - misa, as mxl is needed for proper operation, - mstatus, as sd needs to be known also In addition, we also add read and write accesses to the machi

Re: configure --extra-cflags and --extra-ldflags values not propagating to meson?

On 22/10/2021 13.20, Owen LaGarde wrote: Am I using --extra-cflags and --extra-ldflags wrong in the configure call? I'd like to source build several pre-reqs specific to supporting the qemu source build.  I'd specifically not like to install neither the qemu or re-req builds at the system level.

Re: [PATCH 7/8] pci: Add pci_for_each_device_all()

On Mon, Oct 25, 2021 at 08:57:36PM +0800, Peter Xu wrote: > On Fri, Oct 22, 2021 at 04:43:43AM -0400, Michael S. Tsirkin wrote: > > On Fri, Oct 22, 2021 at 10:33:15AM +0800, Peter Xu wrote: > > > Hi, Michael, > > > > > > On Thu, Oct 21, 2021 at 06:54:59AM -0400, Michael S. Tsirkin wrote: > > > > >

Re: [PATCH 5/8] pci: Add pci_for_each_root_bus()

On Thu, Oct 21, 2021 at 06:42:56PM +0800, Peter Xu wrote: > Add a helper to loop over each root bus of the system, either the default root > bus or extended buses like pxb-pcie. > > Signed-off-by: Peter Xu > --- > hw/pci/pci.c | 26 ++ > include/hw/pci/pci.h | 2

Re: [PATCH 7/8] pci: Add pci_for_each_device_all()

On Fri, Oct 22, 2021 at 04:43:43AM -0400, Michael S. Tsirkin wrote: > On Fri, Oct 22, 2021 at 10:33:15AM +0800, Peter Xu wrote: > > Hi, Michael, > > > > On Thu, Oct 21, 2021 at 06:54:59AM -0400, Michael S. Tsirkin wrote: > > > > +typedef struct { > > > > +pci_bus_dev_fn fn; > > > > +void *

Re: [PATCH v4 6/8] iotests/300: avoid abnormal shutdown race condition

On 13.10.21 23:57, John Snow wrote: Wait for the destination VM to close itself instead of racing to shut it down first, which produces different error log messages from AQMP depending on precisely when we tried to shut it down. (For example: We may try to issue 'quit' immediately prior to the t

[PATCH v2] hvf: Avoid mapping regions < PAGE_SIZE as ram

HVF has generic memory listener code that adds all RAM regions as HVF RAM regions. However, HVF can only handle page aligned, page granule regions. So let's ignore regions that are not page aligned and sized. They will be trapped as MMIO instead. Signed-off-by: Alexander Graf --- v1 -> v2:

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