On Thu, Sep 30, 2021 at 10:33:43AM +0800, Cindy Lu wrote:
> Add new call back function in vhost-vdpa, this call back function will
> set the fb number to hardware.
>
> Signed-off-by: Cindy Lu
fb being what? you mean fd. said fd doing what exactly?
all this needs to be in the commit log pls.
> -
On Thu, Sep 30, 2021 at 10:33:48AM +0800, Cindy Lu wrote:
> Add support for configure interrupt, The process is used kvm_irqfd_assign
> to set the gsi to kernel. When the configure notifier was signal by
> host, qemu will inject a msix interrupt to guest
>
> Signed-off-by: Cindy Lu
> ---
> hw/vi
On Thu, Sep 30, 2021 at 10:33:38AM +0800, Cindy Lu wrote:
> these patches add the support for configure interrupt
>
> These codes are all tested in vp-vdpa (support configure interrupt)
> vdpa_sim (not support configure interrupt), virtio tap device
>
> test in virtio-pci bus and virtio-mmio bus
Hi,
I don't understand if there are some issues to address to have this patch
merged?
Thanks,
Laurent
On 01/10/2021 10:25, Laurent Vivier wrote:
Failover needs to detect the end of the PCI unplug to start migration
after the VFIO card has been unplugged.
To do that, a flag is set in pcie_cap
On Mon, Oct 18, 2021 at 09:19:16AM +0200, Laurent Vivier wrote:
> Hi,
>
> I don't understand if there are some issues
Gerd did identify some issues, you felt they aren't related to the patch
and need to be addressed separately.
Gerd posted patches that are supposed to address them since.
"try im
On 10/4/21 17:46, Cédric Le Goater wrote:
Hello,
The Aspeed SoCs have a dual boot function for firmware fail-over
recovery. The system auto-reboots from the second flash if the main
flash does not boot successfully within a certain amount of time. This
function is called alternate boot (ABR) in
On 10/4/21 17:46, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater
> ---
> hw/watchdog/wdt_aspeed.c | 5 +
> hw/watchdog/trace-events | 4
> 2 files changed, 9 insertions(+)
> +# wdt-aspeed.c
> +aspeed_wdt_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d"
> +aspeed_wd
On 10/4/21 17:46, Cédric Le Goater wrote:
> The register index is currently printed and this is confusing.
>
> Signed-off-by: Cédric Le Goater
> ---
> hw/ssi/aspeed_smc.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
This demo not correct, the original childs1 can't pass the
the bdrv_is_root_node check in replcation_start().
Keep consistent with docs/COLO-FT.txt
Signed-off-by: Zhang Chen
---
docs/block-replication.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/block-replication.
Hi Alistair,
There is some products based on the vector v0.7.1, such as D1 SOC from
Allwinner and Xuantie CPU And we have spent a lot of work to support
vector on QEMU.
Allwinner
On 2021/10/15 下午3:45, frank.ch...@sifive.com wrote:
From: Frank Chang
This patchset implements the vect
Hi Cédric,
On 10/4/21 17:46, Cédric Le Goater wrote:
> Initialize the region in the instance_init handler because we will
> want to link this region in the FMC object before the WDT object is
> realized.
>
> Cc: Peter Delevoryas
> Signed-off-by: Cédric Le Goater
> ---
> include/hw/watchdog/wdt
Hi Jason~
Have any comments or updates for this patch?
Thanks
Chen
> -Original Message-
> From: Markus Armbruster
> Sent: Tuesday, October 12, 2021 5:31 PM
> To: Zhang, Chen
> Cc: Jason Wang ; Eric Blake ;
> qemu-dev ; Li Zhijian ;
> Lukas Straub ; Tao Xu
> Subject: Re: [PATCH V3] net
On Monday, 18 October, 2021, 12:20:55 pm IST, Thomas Huth
wrote:
On 30/01/2021 14.16, P J P wrote:
>> diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
>> index eff299f629..4a910ca971 100644
>> --- a/hw/net/vmxnet3.c
>> +++ b/hw/net/vmxnet3.c
>> @@ -1420,6 +1420,7 @@ static void vmxnet3_activate_d
Alistair Francis 於 2021年10月18日 週一
下午12:38寫道：
> From: Alistair Francis
>
> Signed-off-by: Alistair Francis
> ---
> target/riscv/cpu_bits.h | 8
> 1 file changed, 8 deletions(-)
>
> diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
> index 999187a9ee..3aa2512d13 100644
> --
Alistair Francis 於 2021年10月18日 週一
下午12:38寫道：
> From: Alistair Francis
>
> Signed-off-by: Alistair Francis
> ---
> target/riscv/cpu.c | 17 ++---
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 1d69d1887e..837bea327
On Thu, Oct 14, 2021 at 04:12:35PM +0200, Eugenio Pérez wrote:
Abstract this operation, that will be reused when validating the region
against the iova range that the device supports.
Signed-off-by: Eugenio Pérez
Acked-by: Jason Wang
---
hw/virtio/vhost-vdpa.c | 22 +++---
1 fil
On Thu, Oct 14, 2021 at 04:12:34PM +0200, Eugenio Pérez wrote:
Following the logic of commit 56918a126ae ("memory: Add RAM_PROTECTED
flag to skip IOMMU mappings") with VFIO, skip memory sections
inaccessible via normal mechanisms, including DMA.
Signed-off-by: Eugenio Pérez
Acked-by: Jason Wang
On 15/10/21 18:12, Greg Kurz wrote:
+/*
+ * NotifierList used to force an RCU grace period. Accessed under
+ * rcu_registry_lock.
+ */
+static NotifierList force_rcu_notifiers =
+NOTIFIER_LIST_INITIALIZER(force_rcu_notifiers);
+
/*
* Check whether a quiescent state was crossed between t
On 15/10/21 18:12, Greg Kurz wrote:
+void tcg_cpus_force_rcu(Notifier *notify, void *data)
+{
+CPUState *cpu = container_of(notify, CPUState, force_rcu);
+
Perhaps add a comment: /* Called with rcu_registry_lock held, using
async_run_on_cpu ensudes that there are no deadlocks. */
Paolo
On Thu, Oct 14, 2021 at 04:12:36PM +0200, Eugenio Pérez wrote:
Check vdpa device range before updating memory regions so we don't add
any outside of it, and report the invalid change if any.
Signed-off-by: Eugenio Pérez
---
include/hw/virtio/vhost-vdpa.h | 2 ++
hw/virtio/vhost-vdpa.c |
cmocka website SSL certificate expired, making CI pipelines
fail [*]. However EDK2 images built to test QEMU don't need
cmocka. Avoid cloning it.
[*] https://gitlab.com/rth7680/qemu/-/jobs/1685387520
fatal: unable to access 'https://git.cryptomilk.org/projects/cmocka.git/':
server certificate ver
Since EDK2 BaseTools only require the brotli submodule,
we don't need to initialize other submodules at to build it.
Signed-off-by: Philippe Mathieu-Daudé
---
roms/Makefile | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/roms/Makefile b/roms/Makefile
index eeb5970348c..b967
On 10/18/21 11:23, Philippe Mathieu-Daudé wrote:
> cmocka website SSL certificate expired, making CI pipelines
> fail [*]. However EDK2 images built to test QEMU don't need
> cmocka. Avoid cloning it.
Oh I forgot to mention we don't need oniguruma either, so
this series also avoid cloning it.
> P
The EDK2 firmware images built to test QEMU do not require
the following submodules:
- MdeModulePkg/Universal/RegularExpressionDxe/oniguruma
- UnitTestFrameworkPkg/Library/CmockaLib/cmocka
The only submodules required are:
- ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3
- BaseTools/Sou
On 18/10/2021 11.23, Philippe Mathieu-Daudé wrote:
Since EDK2 BaseTools only require the brotli submodule,
we don't need to initialize other submodules at to build it.
s/at to/to/
Signed-off-by: Philippe Mathieu-Daudé
---
roms/Makefile | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(
On 10/18/21 11:23, Philippe Mathieu-Daudé wrote:
> The EDK2 firmware images built to test QEMU do not require
> the following submodules:
>
> - MdeModulePkg/Universal/RegularExpressionDxe/oniguruma
> - UnitTestFrameworkPkg/Library/CmockaLib/cmocka
>
> The only submodules required are:
>
> - A
On 10/18/21 06:32, Alistair Francis wrote:
> From: Alistair Francis
Possible commit description:
Since commit 1a9540d1f1a ("target/riscv: Drop support for ISA
spec version 1.09.1") these definitions are unused, remove them.
Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Alistair Franc
Hi Alistair,
Sorry for the send error. And I have a question about this patch set.
Firstly, I totally support the vector v1.0 upstream.
The concern is how to deal with the v0.7.1 code on QEMU. There are some
products based on the vector v0.7.1,
such as D1 SOC from Allwinner and Xuantie CPU
Cc'ing Michael, since the make-release script is not covered
in any MAINTAINERS section.
On 10/18/21 11:31, Philippe Mathieu-Daudé wrote:
> On 10/18/21 11:23, Philippe Mathieu-Daudé wrote:
>> The EDK2 firmware images built to test QEMU do not require
>> the following submodules:
>>
>> - MdeModule
On 10/18/21 03:36, BALATON Zoltan wrote:
> Cache the pointer to PCI function 0 (ISA bridge, that this IDE device
> has to use for IRQs) in the PCIIDEState and pass that as the opaque
> data for the interrupt handler to eliminate both the need to look up
> function 0 at every interrupt and also a QO
Hello,
On Mon, 18 Oct 2021, Gerd Hoffmann wrote:
Hi,
I can do that but waiting for a decision on how to proceed. Will Gerd
take my first series this is based on as is then this should be a
separate series doing the clean up using pci_get_function_0 or should
these two series be merged? I'd al
On 10/18/21 02:41, Benjamin Herrenschmidt wrote:
> On Sun, 2021-10-17 at 17:08 +0200, Philippe Mathieu-Daudé wrote:
>> Hi Benjamin,
>>
>> On 10/17/21 09:48, Benjamin Herrenschmidt wrote:
>>> The framebuffer driver fails to initialize with recent Raspberry Pi
>>> kernels, such as the ones shipped in
* Stafford Horne (sho...@gmail.com) wrote:
> On Thu, Oct 14, 2021 at 12:33:06PM -0700, Richard Henderson wrote:
> > On 10/14/21 11:52 AM, Dr. David Alan Gilbert (git) wrote:
> > > Although I'm tempted to think that perhaps we should just
> > > prefer '0x%08' which seems clearer.
> >
> > That's wha
On Mon, 18 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/18/21 03:36, BALATON Zoltan wrote:
Cache the pointer to PCI function 0 (ISA bridge, that this IDE device
has to use for IRQs) in the PCIIDEState and pass that as the opaque
data for the interrupt handler to eliminate both the need to look
On 15/10/2021 12.07, Paolo Bonzini wrote:
Hi all,
Starting with Meson 0.57, "meson test" has all features of QEMU's
makefile-based harness and more.
I just gave it a try, and basically I like this ... but I also encountered
two issues:
* CTRL+C will only interrupt the longest running test.
On Tue, Oct 12, 2021 at 09:12:23AM +0200, Thomas Huth wrote:
> On 30/09/2021 15.23, Daniel P. Berrangé wrote:
> > This is a counterpart to the HMP "info skeys" command. It is being
> > added with an "x-" prefix because this QMP command is intended as an
> > adhoc debugging tool and will thus not be
Hi Łukasz,
On 10/7/21 18:24, Lukasz Maniak wrote:
> From: Łukasz Gieryk
>
> An Nvme device with SR-IOV capability calculates the BAR size
> differently for PF and VF, so it makes sense to extract the common code
> to a separate function.
>
> Also: it seems the n->reg_size parameter unnecessaril
On 10/7/21 18:24, Lukasz Maniak wrote:
> From: Łukasz Gieryk
>
> The Nvme device defines two properties: max_ioqpairs, msix_qsize. Having
> them as constants is problematic for SR-IOV support.
>
> The SR-IOV feature introduces virtual resources (queues, interrupts)
> that can be assigned to PF a
Am 15.10.21 um 21:15 schrieb Richard Henderson:
On 10/15/21 4:08 AM, Christian Borntraeger wrote:
Am 13.10.21 um 11:07 schrieb Paolo Bonzini:
From: Markus Armbruster
Commit 6287d827d4 "monitor: allow device_del to accept QOM paths"
extended find_device_state() to accept QOM paths in addit
On 10/18/21 11:51, BALATON Zoltan wrote:
> On Mon, 18 Oct 2021, Philippe Mathieu-Daudé wrote:
>> On 10/18/21 03:36, BALATON Zoltan wrote:
>>> Cache the pointer to PCI function 0 (ISA bridge, that this IDE device
>>> has to use for IRQs) in the PCIIDEState and pass that as the opaque
>>> data for th
On 10/9/21 01:14, Warner Losh wrote:
> To increase flexibility, only descend into *-user when that is
> configured. This allows *-user to selectively include directories based
> on the host OS which may not exist on all hosts. Adopt Paolo's
> suggestion of checking the configuration in the director
ping
On 27/09/2021 15:07, Li Zhijian wrote:
> destination:
> ../qemu/build/qemu-system-x86_64 -enable-kvm -netdev
> tap,id=hn0,script=/etc/qemu-ifup,downscript=/etc/qemu-ifdown -device
> e1000,netdev=hn0,mac=50:52:54:00:11:22 -boot c -drive
> if=none,file=./Fedora-rdma-server-migration.qcow2,i
On Mon, 2021-10-18 at 11:47 +0200, Philippe Mathieu-Daudé wrote:
>
> > I've just checked the rpi-5.15.y branch and it's the same.
>
> Indeed. I stopped testing recent kernels because they use too many
> features QEMU don't implement.
>
> Our model should generate the DTB blob of devices implemen
Cc'ing qemu-trivial@
On 10/15/21 22:35, Tong Ho wrote:
> This series fixes memory leaks in Xilinx eFUSE devices for
> the Versal and ZynqMP product families.
>
> The leaks result from failing to free memory allocated
> by object_get_canonical_path().
>
> Tong Ho (3):
> hw/nvram: Fix Memory Lea
On 10/18/21 12:27, Benjamin Herrenschmidt wrote:
> On Mon, 2021-10-18 at 11:47 +0200, Philippe Mathieu-Daudé wrote:
>>
>>> I've just checked the rpi-5.15.y branch and it's the same.
>>
>> Indeed. I stopped testing recent kernels because they use too many
>> features QEMU don't implement.
>>
>> Our
Richard Henderson writes:
> Replace the complex apt-get subshell with apt build-dep.
>
> Signed-off-by: Richard Henderson
> ---
> tests/docker/dockerfiles/debian10.docker | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/tests/docker/dockerfiles/debian10.docker
Richard Henderson writes:
> The base debian10 image contains enough to build qemu;
> we do not need to repeat that within the new image.
>
> Signed-off-by: Richard Henderson
> ---
> tests/docker/dockerfiles/debian-all-test-cross.docker | 5 -
> 1 file changed, 5 deletions(-)
>
> diff --gi
On 9/7/21 13:43, Alex Bennée wrote:
Lukas Jünger writes:
Hi all,
I have been trying to use the hwprofile and cache plugin on
qemu-system-riscv64. They failed to load with an undefined
symbol error. It looks like some of the plugin API functions
are missing from the symbol list, so I added the
Since EDK2 BaseTools only require the brotli submodule,
we don't need to initialize other submodules to build it.
Reviewed-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
---
roms/Makefile | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/roms/Makefile b/roms/Makefile
cmocka website SSL certificate expired, making CI pipelines
fail [*]. However EDK2 images built to test QEMU don't need
cmocka, nor oniguruma. Avoid cloning them.
Note: scripts/make-release is neither covered in MAINTAINERS
nor in our CI.
[*] https://gitlab.com/rth7680/qemu/-/jobs/168538752
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
The EDK2 firmware images built to test QEMU do not require
the following submodules:
- MdeModulePkg/Universal/RegularExpressionDxe/oniguruma
- UnitTestFrameworkPkg/Library/CmockaLib/cmocka
The only submodules required are:
- ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3
- BaseTools/Sou
On 10/18/21 12:54, Alex Bennée wrote:
>
> Richard Henderson writes:
>
>> The base debian10 image contains enough to build qemu;
>> we do not need to repeat that within the new image.
>>
>> Signed-off-by: Richard Henderson
>> ---
>> tests/docker/dockerfiles/debian-all-test-cross.docker | 5
On [2021 Oct 15] Fri 13:35:30, Tong Ho wrote:
> Signed-off-by: Tong Ho
Reviewed-by: Francisco Iglesias
> ---
> hw/nvram/xlnx-efuse.c | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c
> index ee1caab54c..a0fd77b586 1
On [2021 Oct 15] Fri 13:35:31, Tong Ho wrote:
> Signed-off-by: Tong Ho
Reviewed-by: Francisco Iglesias
> ---
> hw/nvram/xlnx-versal-efuse-ctrl.c | 20 +++-
> 1 file changed, 15 insertions(+), 5 deletions(-)
>
> diff --git a/hw/nvram/xlnx-versal-efuse-ctrl.c
> b/hw/nvram/xlnx-
On [2021 Oct 15] Fri 13:35:32, Tong Ho wrote:
> Signed-off-by: Tong Ho
Reviewed-by: Francisco Iglesias
> ---
> hw/nvram/xlnx-zynqmp-efuse.c | 18 --
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/hw/nvram/xlnx-zynqmp-efuse.c b/hw/nvram/xlnx-zynqmp-efuse.c
Lukas Jünger writes:
> On 9/7/21 13:43, Alex Bennée wrote:
>> Lukas Jünger writes:
>>
>>> Hi all,
>>>
>>> I have been trying to use the hwprofile and cache plugin on
>>> qemu-system-riscv64. They failed to load with an undefined
>>> symbol error. It looks like some of the plugin API functions
Because this device only works as part of VIA superio chips set user
creatable to false. Since the class init method is common for UHCI
variants introduce a flag in UHCIInfo for this.
Signed-off-by: BALATON Zoltan
---
This should come before the other patches changing to use via_isa_set_irq
hw/
Philippe Mathieu-Daudé writes:
> On 10/18/21 12:54, Alex Bennée wrote:
>>
>> Richard Henderson writes:
>>
>>> The base debian10 image contains enough to build qemu;
>>> we do not need to repeat that within the new image.
>>>
>>> Signed-off-by: Richard Henderson
>>> ---
>>> tests/docker/doc
On 2021/10/17 上午1:14, Richard Henderson wrote:
The hw representation of misa.mxl is at the high bits of the
misa csr. Representing this in the same way inside QEMU
results in overly complex code trying to check that field.
Reviewed-by: Alistair Francis
Signed-off-by: Richard Henderson
Revi
On 2021/10/17 上午1:14, Richard Henderson wrote:
Shortly, the set of supported XL will not be just 32 and 64,
and representing that properly using the enumeration will be
imperative.
Two places, booting and gdb, intentionally use misa_mxl_max
to emphasize the use of the reset value of misa.mxl,
On 2021/10/17 上午1:14, Richard Henderson wrote:
Begin adding support for switching XLEN at runtime. Extract the
effective XLEN from MISA and MSTATUS and store for use during translation.
Reviewed-by: Alistair Francis
Signed-off-by: Richard Henderson
Reviewed-by: LIU Zhiwei
Zhiwei
---
ta
Christian Borntraeger writes:
> Am 13.10.21 um 11:07 schrieb Paolo Bonzini:
>> From: Markus Armbruster
>> Commit 6287d827d4 "monitor: allow device_del to accept QOM paths"
>> extended find_device_state() to accept QOM paths in addition to qdev
>> IDs. This added a checked conversion to TYPE_DEV
On Mon, Oct 18, 2021 at 12:58:14PM +0200, Philippe Mathieu-Daudé wrote:
> cmocka website SSL certificate expired, making CI pipelines
> fail [*]. However EDK2 images built to test QEMU don't need
> cmocka, nor oniguruma. Avoid cloning them.
>
> Note: scripts/make-release is neither covered in MAIN
On Thu, Oct 14, 2021 at 07:32:26PM +0200, BALATON Zoltan wrote:
> v4 splits up the single patch into a series
>
> BALATON Zoltan (3):
> usb/uhci: Misc clean up
> usb/uhci: Replace pci_set_irq with qemu_set_irq
> hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts
>
> hw/usb/hcd-uhc
On Mon, Oct 18, 2021 at 01:29:29PM +0200, BALATON Zoltan wrote:
> Because this device only works as part of VIA superio chips set user
> creatable to false. Since the class init method is common for UHCI
> variants introduce a flag in UHCIInfo for this.
>
> Signed-off-by: BALATON Zoltan
Reviewed
On 10/18/21 13:18, Alex Bennée wrote:
Lukas Jünger writes:
On 9/7/21 13:43, Alex Bennée wrote:
Lukas Jünger writes:
Hi all,
I have been trying to use the hwprofile and cache plugin on
qemu-system-riscv64. They failed to load with an undefined
symbol error. It looks like some of the plugi
Christian Borntraeger writes:
[...]
> The 2nd thing to do is to fix the regression. Does anyone have an idea what
> is broken?
I do: "device ID or QOM path" arguments where the device ID contains
'/'. Undocumented feature, as far as I can tell. I'll fix it anyway.
Affects device_del, qemu-io
Hi,
This series only support linux-user emulation.
More about LoongArch at: https://github.com/loongson/
The latest kernel:
* https://github.com/loongson/linux/tree/loongarch-next
Missing review:
* 0017-LoongArch-Linux-User-Emulation.patch
Changes for v7:
* scripts/gensyscalls.sh support
Hi,
On 10/18/21 14:01, Chan Kim wrote:
> Hi, list members,
>
> I see for example in hw/arm/virt.c, when it creates a device to attach
> to a system bus, it calls “sysbus_realize_and_unref(SYS_BUS_DEVICE(dev),
> &error_fatal);” function
>
> .
>
> static void create_its(VirtMachineState *vms)
>
This patch implement fixed point atomic instruction translation.
This includes:
- LL.{W/D}, SC.{W/D}
- AM{SWAP/ADD/AND/OR/XOR/MAX/MIN}[_DB].{W/D}
- AM{MAX/MIN}[_DB].{WU/DU}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/insn_trans/tran
This patch implement fixed point load/store instruction translation.
This includes:
- LD.{B[U]/H[U]/W[U]/D}, ST.{B/H/W/D}
- LDX.{B[U]/H[U]/W[U]/D}, STX.{B/H/W/D}
- LDPTR.{W/D}, STPTR.{W/D}
- PRELD
- LD{GT/LE}.{B/H/W/D}, ST{GT/LE}.{B/H/W/D}
- DBAR, IBAR
Signed-off-by: Song Gao
Signed-off-by: Xiao
This patch implement fixed point bit instruction translation.
This includes:
- EXT.W.{B/H}
- CL{O/Z}.{W/D}, CT{O/Z}.{W/D}
- BYTEPICK.{W/D}
- REVB.{2H/4H/2W/D}
- REVH.{2W/D}
- BITREV.{4B/8B}, BITREV.{W/D}
- BSTRINS.{W/D}, BSTRPICK.{W/D}
- MASKEQZ, MASKNEZ
Signed-off-by: Song Gao
Signed-off-by: Xi
This patch implement fixed point extra instruction translation.
This includes:
- CRC[C].W.{B/H/W/D}.W
- SYSCALL
- BREAK
- ASRT{LE/GT}.D
- RDTIME{L/H}.W, RDTIME.D
- CPUCFG
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h
This patch implement floating point arithmetic instruction translation.
This includes:
- F{ADD/SUB/MUL/DIV}.{S/D}
- F{MADD/MSUB/NMADD/NMSUB}.{S/D}
- F{MAX/MIN}.{S/D}
- F{MAXA/MINA}.{S/D}
- F{ABS/NEG}.{S/D}
- F{SQRT/RECIP/RSQRT}.{S/D}
- F{SCALEB/LOGB/COPYSIGN}.{S/D}
- FCLASS.{S/D}
Signed-off-by: S
This patch give an introduction to the LoongArch target.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
MAINTAINERS | 5
target/loongarch/README | 76 +
2 files changed, 81 insertions(+)
This patch implement fixed point shift instruction translation.
This includes:
- SLL.W, SRL.W, SRA.W, ROTR.W
- SLLI.W, SRLI.W, SRAI.W, ROTRI.W
- SLL.D, SRL.D, SRA.D, ROTR.D
- SLLI.D, SRLI.D, SRAI.D, ROTRI.D
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
This patch implement branch instruction translation.
This includes:
- BEQ, BNE, BLT[U], BGE[U]
- BEQZ, BNEZ
- B
- BL
- JIRL
- BCEQZ, BCNEZ
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/insn_trans/trans_branch.c | 85 ++
This patch implement floating point load/store instruction translation.
This includes:
- FLD.{S/D}, FST.{S/D}
- FLDX.{S/D}, FSTX.{S/D}
- FLD{GT/LE}.{S/D}, FST{GT/LE}.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/insn_trans/trans
This patch implement floating point comparison instruction translation.
This includes:
- FCMP.cond.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/fpu_helper.c| 60
target/loongarch/hel
This patch add target state header, target definitions
and initialization routines.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/cpu-param.h | 19 +++
target/loongarch/cpu.c | 285 +++
ta
Implementation of linux user emulation for LoongArch.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
---
accel/tcg/user-exec.c | 15 ++
configure | 5 +
include/elf.h | 2 +
linux-user/elfload.c
This patch implement fixed point arithemtic instruction translation.
This includes:
- ADD.{W/D}, SUB.{W/D}
- ADDI.{W/D}, ADDU16ID
- ALSL.{W[U]/D}
- LU12I.W, LU32I.D LU52I.D
- SLT[U], SLT[U]I
- PCADDI, PCADDU12I, PCADDU18I, PCALAU12I
- AND, OR, NOR, XOR, ANDN, ORN
- MUL.{W/D}, MULH.{W[U]/D[U]}
- MU
This patch implement floationg point move instruction translation.
This includes:
- FMOV.{S/D}
- FSEL
- MOVGR2FR.{W/D}, MOVGR2FRH.W
- MOVFR2GR.{S/D}, MOVFRH2GR.S
- MOVGR2FCSR, MOVFCSR2GR
- MOVFR2CF, MOVCF2FR
- MOVGR2CF, MOVCF2GR
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by:
Add loongarch64 linux-user default configs file.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
configs/targets/loongarch64-linux-user.mak | 3 +++
1 file changed, 3 insertions(+)
create mode 100644 configs/targets/loongarch64-linux-user.mak
diff --gi
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
scripts/qemu-binfmt-conf.sh | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh
index 7de996d..5575bdd 100755
--- a/scripts/qemu
This patch add main translation routines and
basic functions for translation.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h| 9 +++
target/loongarch/internals.h | 1 -
target/loongarch/op_helper.c | 22 ++
target/
On Fri, Oct 15, 2021 at 11:54 AM Alistair Francis wrote:
>
> On Thu, Sep 16, 2021 at 11:42 PM Anup Patel wrote:
> >
> > On Wed, Sep 15, 2021 at 6:19 AM Alistair Francis
> > wrote:
> > >
> > > On Tue, Sep 14, 2021 at 2:33 AM Anup Patel wrote:
> > > >
> > > > On Thu, Sep 9, 2021 at 12:14 PM Alis
This patch implement floating point conversion instruction translation.
This includes:
- FCVT.S.D, FCVT.D.S
- FFINT.{S/D}.{W/L}, FTINT.{W/L}.{S/D}
- FTINT{RM/RP/RZ/RNE}.{W/L}.{S/D}
- FRINT.{S/D}
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loo
Lukas Jünger writes:
> On 10/18/21 13:18, Alex Bennée wrote:
>> Lukas Jünger writes:
>>
>>> On 9/7/21 13:43, Alex Bennée wrote:
Lukas Jünger writes:
> Hi all,
>
>>> It seems like there is a race condition with the tcg threads.
>>> The plugin exit handler is run with atexit
On 10/18/21 14:47, Song Gao wrote:
> This patch add main translation routines and
> basic functions for translation.
>
> Signed-off-by: Song Gao
> Signed-off-by: Xiaojuan Yang
> Reviewed-by: Richard Henderson
> ---
> target/loongarch/helper.h| 9 +++
> target/loongarch/internals.h | 1
This patch add support for disassembling via option '-d in_asm'.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Acked-by: Richard Henderson
---
MAINTAINERS |1 +
disas/loongarch.c | 2511 +++
disas/meson.build |1
Hello Phil,
On 10/18/21 11:04, Philippe Mathieu-Daudé wrote:
Hi Cédric,
On 10/4/21 17:46, Cédric Le Goater wrote:
Initialize the region in the instance_init handler because we will
want to link this region in the FMC object before the WDT object is
realized.
Cc: Peter Delevoryas
Signed-off-b
This patch add build loongarch-linux-user target support.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
meson.build | 2 +-
target/loongarch/meson.build | 18 ++
target/meson.build | 1 +
3 files changed, 20
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
tests/tcg/configure.sh | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/tcg/configure.sh b/tests/tcg/configure.sh
index 1f985cc..d8f677d 100755
--- a/tests/tcg/configure.sh
+++ b/tests/tcg/configure
On the AST2600, the 2nd watchdog timer can be controlled through the
FMC controller to disable the alternate boot function. Next changes
will map the WDT2 registers in the AST2600 FMC memory region. Add a
container on top of the register region for this purpose.
Signed-off-by: Cédric Le Goater
--
On Thu, Oct 14, 2021 at 01:25:54PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Make the '--socket-group=' option fail if the group name is unknown:
>
> ./tools/virtiofsd/virtiofsd --socket-group=zaphod
> vhost socket: unable to find group 'zaphod'
>
> Re
Next changes will map the WDT2 registers in the AST2600 FMC memory
region. Make sure the MemoryRegion pointers are correctly initialized
before setting the object links.
Do the same in the Aspeed AST2400 and AST2500 SoC models for
consistency.
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed_a
Because AddressSpaces must not be sysbus-mapped, commit e9c568dbc225
("hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use
alias") introduced an alias for the flash mmio region.
Using a container is cleaner.
Cc: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
include/hw
Hello,
The Aspeed SoCs have a dual boot function for firmware fail-over
recovery. The system auto-reboots from the second flash if the main
flash does not boot successfully within a certain amount of time. This
function is called alternate boot (ABR) in the FMC controllers.
On the AST2600, the AB
1 - 100 of 278 matches
Mail list logo
