On Tue, Oct 12, 2021 at 08:44:45AM +0200, Gerd Hoffmann wrote:
> On Tue, Oct 12, 2021 at 01:46:35AM -0400, Michael S. Tsirkin wrote:
> > On Tue, Oct 12, 2021 at 07:30:34AM +0200, Gerd Hoffmann wrote:
> > > > > index f3ac04399969..477c8776aa27 100644
> > > > > --- a/hw/pci/pcie.c
> > > > > +++ b/hw/
On 30/09/2021 15.23, Daniel P. Berrangé wrote:
This is a counterpart to the HMP "info skeys" command. It is being
added with an "x-" prefix because this QMP command is intended as an
adhoc debugging tool and will thus not be modelled in QAPI as fully
structured data, nor will it have long term gu
On Thu, Oct 07, 2021 at 06:23:55PM +0200, Lukasz Maniak wrote:
> PCIe devices implementing SR-IOV may need to perform certain actions
> before the VFs are unrealized or vice versa.
>
> Signed-off-by: Lukasz Maniak
Callbacks are annoying and easy to misuse though.
VFs are enabled through a config
On 17/09/2021 14.06, Pierre Morel wrote:
CLP immediate commands allow to query the Logical Processor
available on the machine and to check for a specific one.
Let's add these commands.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-pci-inst.c | 33
in
On Mon, Oct 11, 2021 at 07:33:05PM +0200, David Hildenbrand wrote:
> If we warn about the block size being smaller than the default, we skip
> some alignment checks.
>
> This can currently only fail on x86-64, when specifying a block size of
> 1 MiB, however, we detect the THP size of 2 MiB.
>
>
The register index is currently printed and this is confusing.
Reviewed-by: Francisco Iglesias
Signed-off-by: Cédric Le Goater
---
hw/ssi/aspeed_smc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 7129341c129e..8a988c16
'cs' is a more appropriate name to index SPI flash devices.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
include/hw/ssi/aspeed_smc.h | 2 +-
hw/ssi/aspeed_smc.c | 30 +++---
2 files changed, 16 insertions(+), 16 deletions(-)
diff --gi
From: Peter Delevoryas
The gpio array is declared as a dense array:
qemu_irq gpios[ASPEED_GPIO_NR_PINS];
(AST2500 has 228, AST2400 has 216, AST2600 has 208)
However, this array is used like a matrix of GPIO sets
(e.g. gpio[NR_SETS][NR_PINS_PER_SET] = gpio[8][32])
size_t offset = set * GPI
There is no need to keep a reference of the flash qdev in the AspeedSMCFlash
state: the SPI bus takes ownership and will release its resources. Remove
AspeedSMCFlash::flash.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
include/hw/ssi/aspeed_smc.h | 1 -
hw/arm/aspeed
The AST2400 SPI controller has a transitional HW interface and it
stores the address width currently in use in a different register than
all the other SMC controllers. It needs special handling when working
in 4B mode.
Make it clear through a class handler. This also removes another use
of the seg
Reviewed-by: Francisco Iglesias
Signed-off-by: Cédric Le Goater
---
hw/watchdog/wdt_aspeed.c | 5 +
hw/watchdog/trace-events | 4
2 files changed, 9 insertions(+)
diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
index 69c37af9a6e9..146ffcd71301 100644
--- a/hw/watchdog/
Signed-off-by: Cédric Le Goater
---
include/hw/ssi/aspeed_smc.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index 8dc81294988e..75bc793bd269 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -56,7 +56,6 @
From: Peter Delevoryas
Some of the pin declarations in the Aspeed GPIO module were incorrect,
probably because of confusion over which bits in the input and output
uint32_t's correspond to which groups in the label array. Since the
uint32_t literals are in big endian, it's sort of the opposite of
Introduce an AspeedI2CBus SysBusDevice model and attach the associated
memory region and IRQ to the newly instantiated objects.
Before this change, the I2C bus IRQs were all attached to the
SysBusDevice model of the I2C controller. Adapt the AST2600 SoC
realize routine to take into account this ch
The Aspeed SoCs have a dual boot function for firmware fail-over
recovery. The system auto-reboots from the second flash if the main
flash does not boot successfully within a certain amount of time. This
function is called alternate boot (ABR) in the FMC controllers.
On AST2400/AST2500, ABR is ena
This simplifies the reset handler and has the benefit to remove some
"bad" use of the segments array as an identifier of the controller model.
Signed-off-by: Cédric Le Goater
---
include/hw/ssi/aspeed_smc.h | 1 +
hw/ssi/aspeed_smc.c | 52 +++--
2 files c
AspeedSMCFlash is a small structure representing the AHB memory window
through which the contents of a flash device can be accessed with MMIOs.
Introduce an AspeedSMCFlash SysBusDevice model and attach the associated
memory region to the newly instantiated objects.
Reviewed-by: Philippe Mathieu-D
The following changes since commit c09124dcb8401a0d635b4a52b295e9b3fc12392a:
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into
staging (2021-10-11 08:15:32 -0700)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-aspee
The characteristics of the Aspeed controllers are described in a
AspeedSMCController structure which is redundant with the
AspeedSMCClass. Move all attributes under the class and adapt the code
to use class attributes instead.
This is a large change but it is functionally equivalent.
Signed-off-b
From: Andrew Jeffery
Signed-off-by: Andrew Jeffery
Signed-off-by: Cédric Le Goater
Signed-off-by: Peter Delevoryas
Message-Id: <20211005052604.1674891-3-p...@fb.com>
Signed-off-by: Cédric Le Goater
---
include/hw/arm/aspeed_soc.h | 2 ++
hw/arm/aspeed_ast2600.c | 11 +++
hw/arm/
It unifies the errors reported by the Aspeed SMC model and also
removes some use of ctrl->name which will help us for the next
patches.
Signed-off-by: Cédric Le Goater
---
hw/ssi/aspeed_smc.c | 97 +
1 file changed, 45 insertions(+), 52 deletions(-)
d
From: Andrew Jeffery
This model implements enough behaviour to do basic functionality tests
such as device initialisation and read out of dummy sample values. The
sample value generation strategy is similar to the STM ADC already in
the tree.
Signed-off-by: Andrew Jeffery
[clg : support for mul
On 11.10.21 18:24, Eric Blake wrote:
On Mon, Oct 11, 2021 at 05:50:31PM +0200, Hanna Reitz wrote:
With -m32, size_t is generally only a uint32_t. That makes clang
complain that in the assertion
assert(qiov->size <= INT64_MAX);
the range of the type of qiov->size (size_t) is too small for a
There is no real reason to use this name. It's simply nice to have in
the monitor output but it's a burden for the following patch which
removes the AspeedSMCController structure describing the controller.
Signed-off-by: Cédric Le Goater
---
hw/ssi/aspeed_smc.c | 25 ++---
1
AspeedSMCFlash::size is only used to compute the initial size of the
boot_rom region. Not very useful, so directly call memory_region_size()
instead.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
include/hw/ssi/aspeed_smc.h | 1 -
hw/arm/aspeed.c | 7 --
On Sat, Oct 9, 2021 at 3:51 PM Travis Geiselbrecht wrote:
>
> Ensure the columns for all of the register names and values line up.
> No functional change, just a minor tweak to the output.
>
> Signed-off-by: Travis Geiselbrecht
Thanks!
Applied to riscv-to-apply.next
Alistair
On 10/7/21 9:27 AM, Eric Blake wrote:
On Tue, Oct 05, 2021 at 12:45:52PM -0400, Jonah Palmer wrote:
From: Laurent Vivier
This new command shows the information of a VirtQueue element.
Signed-off-by: Jonah Palmer
---
+++ b/qapi/virtio.json
+##
+# @VirtioRingAvail:
+#
+# @flags: VRingAvail fl
On 10/5/21 5:18 PM, Eric Blake wrote:
On Tue, Oct 05, 2021 at 12:45:46PM -0400, Jonah Palmer wrote:
This patch drops the name parameter for the virtio_init function.
The pair between the numeric device ID and the string device ID
(name) of a virtio device already exists, but not in a way that
On Mon, 11 Oct 2021 19:45:20 +0200
David Hildenbrand wrote:
> memory_region_is_mapped() is the wrong check, we actually want to check
> whether the backend is already marked mapped.
>
> For example, memory regions mapped via an alias, such as NVDIMMs,
> currently don't make memory_region_is_mapp
The code in vpc.c uses BDRVVPCState->footer.type in various places
to decide whether the image is a fixed-size (VHD_FIXED) or a dynamic
(VHD_DYNAMIC) image. However, we never check that this field really
contains VHD_FIXED if we detected a fixed size image in vpc_open(),
so a wrong value here could
Currently, block layer APIs like block-backend.h contain a mix of
functions that are either running in the main loop and under the
BQL, or are thread-safe functions and run in iothreads performing I/O.
The functions running under BQL also take care of modifying the
block graph, by using drain and/o
block.h currently contains a mix of functions:
some of them run under the BQL and modify the block layer graph,
others are instead thread-safe and perform I/O in iothreads.
It is not easy to understand which function is part of which
group (I/O vs GS), and this patch aims to clarify it.
The "GS" f
When invoked from the main loop, this function is the same
as qemu_mutex_iothread_locked, and returns true if the BQL is held.
When invoked from iothreads or tests, it returns true only
if the current AioContext is the Main Loop.
This essentially just extends qemu_mutex_iothread_locked to work
als
All the global state (GS) API functions will check that
qemu_in_main_thread() returns true. If not, it means
that the safety of BQL cannot be guaranteed, and
they need to be moved to I/O.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
block.c| 136 +++
Similarly to the previous patch, split block_int.h
in block_int-io.h and block_int-global-state.h
block_int-common.h contains the structures shared between
the two headers, and the functions that can't be categorized as
I/O or global state.
Assertions are added in the next patch.
Signed-off-by:
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
block.c | 17 +
block/backup.c | 1 +
block/block-backend.c | 3 +++
block/commit.c | 2 ++
block/dirty-bitmap.c| 1 +
bl
Similarly to the previous patches, split block-backend.h
in block-backend-io.h and block-backend-global-state.h
In addition, remove "block/block.h" include as it seems
it is not necessary anymore, together with "qemu/iov.h"
block-backend-common.h contains the structures shared between
the two hea
All the global state (GS) API functions will check that
qemu_in_main_thread() returns true. If not, it means
that the safety of BQL cannot be guaranteed, and
they need to be moved to I/O.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
block/block-backend.c | 90
We want to be sure that the functions that write the child and
parent list of a bs are under BQL and drain.
BQL prevents from concurrent writings from the GS API, while
drains protect from I/O.
TODO: drains are missing in some functions using this assert.
Therefore a proper assertion will fail. B
Since the I/O functions are not many, keep a single file.
Also split the function pointers in BlockJobDriver.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
include/block/blockjob_int.h | 28
1 file changed, 28 insertions(+)
diff --git a
drive_add is only used in softmmu/vl.c, so it can be a static
function there, and drive_def is only a particular use case of
qemu_opts_parse_noisily, so it can be inlined.
Also remove drive_mark_claimed_by_board, as it is only defined
but not implemented (nor used) anywhere.
This also helps simpl
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
blockjob.c | 4
1 file changed, 4 insertions(+)
diff --git a/blockjob.c b/blockjob.c
index 4bad1408cb..fbd6c7d873 100644
--- a/blockjob.c
+++ b/blockjob.c
@@ -83,6 +83,7 @@ BlockJob *block_job_get(const char *id)
blockjob functions run always under the BQL lock.
Signed-off-by: Emanuele Giuseppe Esposito
---
include/block/blockjob.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/block/blockjob.h b/include/block/blockjob.h
index d200f33c10..fa0c3f7a47 100644
--- a/include/block/blockj
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
blockjob.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/blockjob.c b/blockjob.c
index fbd6c7d873..4982f6a2b5 100644
--- a/blockjob.c
+++ b/blockjob.c
@@ -61,6 +61,7 @@ static bool is_block_job(Job *job)
blockdev functions run always under the BQL lock.
Signed-off-by: Emanuele Giuseppe Esposito
---
include/sysemu/blockdev.h | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/include/sysemu/blockdev.h b/include/sysemu/blockdev.h
index 960b54d320..cc9dfb5181 100644
copy-before-write functions always run under BQL lock.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Paolo Bonzini
---
block/copy-before-write.c | 2 ++
block/copy-before-write.h | 7 +++
2 files changed, 9 insertions(+)
diff --git a/block/copy-before-write.c b/block/copy-before-w
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Paolo Bonzini
Reviewed-by: Stefan Hajnoczi
---
block/block-backend.c | 2 ++
blockdev.c| 12
2 files changed, 14 insertions(+)
diff --git a/block/block-backend.c b/block/block-backend.c
index 6f36a54e82..f2c724b48
Snapshots run also under the BQL lock, so they all are
in the global state API. The aiocontext lock that they hold
is currently an overkill and in future could be removed.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Paolo Bonzini
Reviewed-by: Stefan Hajnoczi
---
block/snapshot.c
block coroutines functions run in different aiocontext, and are
not protected by the BQL. Therefore are I/O.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Paolo Bonzini
Reviewed-by: Stefan Hajnoczi
---
block/coroutines.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/block
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
include/block/block_int-common.h | 51
1 file changed, 32 insertions(+), 19 deletions(-)
diff --git a/include/block/block_int-common.h b/include/block/block_int-common.h
index 9857e775fe.
The job API will be handled separately in another serie.
Signed-off-by: Emanuele Giuseppe Esposito
---
include/qemu/job.h | 16
1 file changed, 16 insertions(+)
diff --git a/include/qemu/job.h b/include/qemu/job.h
index 6e67b6977f..7e9e59f4b8 100644
--- a/include/qemu/job.h
+++
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
block.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/block.c b/block.c
index 40c4729b8d..da80e89ad4 100644
--- a/block.c
+++ b/block.c
@@ -1462,6 +1462,7 @@ const BdrvChildClass child_of_bds = {
AioC
Similar to the header split, also the function pointers in BlockDriver
can be split in I/O and global state.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
include/block/block_int-common.h | 458 ---
1 file changed, 237 insertions(+), 221
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
block.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/block.c b/block.c
index 94bff5c757..40c4729b8d 100644
--- a/block.c
+++ b/block.c
@@ -1074,6 +1074,7 @@ int refresh_total_sectors(BlockDriverS
Assertions in the callers of the funciton pointrs are already
added by previous patches.
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
include/sysemu/block-backend-common.h | 28 ++-
1 file changed, 23 insertions(+), 5 deletions(-)
diff --gi
On Tue, 12 Oct 2021 08:50:25 +0200
David Hildenbrand wrote:
> On 12.10.21 00:17, Philippe Mathieu-Daudé wrote:
> > On 10/11/21 23:21, Richard Henderson wrote:
> >> On 10/11/21 10:45 AM, David Hildenbrand wrote:
> >>> /**
> >>> * memory_region_is_mapped: returns true if #MemoryRegion is
Stefan, any thoughts on this?
Markus Armbruster writes:
> I've thought a bit more.
>
> A monitor can serve a series of clients.
>
> Back when all of the monitor ran in the main thread, we completely
> finished serving the current client before we started serving the next
> one (I think). In oth
Signed-off-by: Emanuele Giuseppe Esposito
Reviewed-by: Stefan Hajnoczi
---
job.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/job.c b/job.c
index dbfa67bb0a..94b142684f 100644
--- a/job.c
+++ b/job.c
@@ -380,6 +380,8 @@ void job_ref(Job *job)
void job_unref(Job *job)
{
+a
Before sending this patch, I had
commit 71d15e90d513327c90d346ef73865d2db749fbba
Author: David Hildenbrand
Date: Thu Oct 7 11:25:18 2021 +0200
memory: make memory_region_is_mapped() succeed when mapped via an alias
memory_region_is_mapped() currently does not return "true"
Stefan Reiter writes:
> It is possible to specify more than one VNC server on the command line,
> either with an explicit ID or the auto-generated ones à la "default",
> "vnc2", "vnc3", ...
>
> It is not possible to change the password on one of these extra VNC
> displays though. Fix this by addi
On Tue, Oct 12, 2021 at 6:06 AM Jason Wang wrote:
>
> On Tue, Oct 12, 2021 at 11:59 AM Jason Wang wrote:
> >
> >
> > 在 2021/10/1 下午3:05, Eugenio Pérez 写道:
> > > This series enable shadow virtqueue (SVQ) for vhost-vdpa devices. This
> > > is intended as a new method of tracking the memory the devi
For the 4 byte instruction case we started doing an ld_code2 and then
reloaded the data with ld_code4 once it was identified as a 4 byte op.
This is confusing for the plugin hooks which are expecting to see
simple sequential loading so end up reporting a malformed 6 byte
instruction buffer. While w
Jason, did this fall through the cracks?
Zhang Chen writes:
> When COLO use only one vnet_hdr_support parameter between
> COLO network filter(filter-mirror, filter-redirector or
> filter-rewriter and colo-compare, packet will not be parsed
> correctly. Acquire network driver related to COLO, if
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead
of hex_gpr[HEX_REG_USR].
Then, we need code to mark the instructions that can set implicitly
set USR
- Macros added to hex_common.py
- A_FPOP added in translate.c
Test case added in tests/tcg/hexagon/overflow.c
Signed-off-by: Ta
On Wed, 6 Oct 2021 18:22:08 +0800
Gavin Shan wrote:
> The following option is used to specify the distance map. It's
> possible the option isn't provided by user. In this case, the
> distance map isn't populated and exposed to platform. On the
> other hand, the empty NUMA node, where no memory r
Followup to replace more tcg_const_* with tcg_constant_tl*
Fix bug to delay writes to USR until packet commit
Taylor Simpson (2):
Hexagon (target/hexagon) more tcg_constant_*
Hexagon (target/hexagon) put writes to USR into temp until commit
target/hexagon/gen_tcg.h | 9 ++--
targe
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead
of hex_gpr[HEX_REG_USR].
Then, we need code to mark the instructions that can set implicitly
set USR
- Macros added to hex_common.py
- A_FPOP added in translate.c
Signed-off-by: Taylor Simpson
---
target/hexagon/macros.h
Change additional tcg_const_tl to tcg_constant_tl
Note that gen_pred_cancal had slot_mask initialized with tcg_const_tl.
However, it is not constant throughout, so we initialize it with
tcg_temp_new and replace the first use with the constant value.
Inspired-by: Richard Henderson
Inspired-by: Ph
The following changes since commit c09124dcb8401a0d635b4a52b295e9b3fc12392a:
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into
staging (2021-10-11 08:15:32 -0700)
are available in the Git repository at:
https://github.com/stsquad/qemu.git tags/pull-for-6.2-121021-
On Tue, 12 Oct 2021 11:28:56 +0200
David Hildenbrand wrote:
> >> Before sending this patch, I had
> >>
> >> commit 71d15e90d513327c90d346ef73865d2db749fbba
> >> Author: David Hildenbrand
> >> Date: Thu Oct 7 11:25:18 2021 +0200
> >>
> >> memory: make memory_region_is_mapped() succeed whe
Am 09.10.2021 um 14:09 hat Markus Armbruster geschrieben:
> The next commit will add feature flags to enum members. There's a
> problem, though: query-qmp-schema shows an enum type's members as an
> array of member names (SchemaInfoEnum member @values). If it showed
> an array of objects with a n
The less confusing would be one where check works for any memory region
involved.
Exactly, so for any alias, even in-between another alias and the target.
I am not aware of actual issues, this is rather a cleanup.
Signed-off-by: David Hildenbrand
diff --git a
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/attribs_def.h.inc | 22 ++
1 file changed, 22 insertions(+)
diff --git a/target/hexagon/attribs_def.h.inc b/target/hexagon/attribs_def.h.inc
index 3815509..4138a7a 100644
--- a/target/hexagon/attrib
Add HVX support to the semantics generator
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_semantics.c | 33 +
target/hexagon/hex_common.py | 13 +
2 files changed, 46 insertions(+)
diff --git a/target/hexagon/gen_s
HVX is a set of wide vector instructions. Machine state includes
vector registers (VRegs)
vector predicate registers (QRegs)
temporary registers for intermediate values
store buffer (masked stores and scatter/gather)
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
This series adds support for the Hexagon Vector eXtensions (HVX)
These instructions are documented here
https://developer.qualcomm.com/downloads/qualcomm-hexagon-v66-hvx-programmer-s-reference-manual
Hexagon HVX is a wide vector engine with 128 byte vectors.
See patch 01 Hexagon HVX README for m
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 106 +++
1 file changed, 106 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index b5c6cad..a560504 100644
--- a/target/hexagon/gen_tcg_hvx.h
+++ b/targ
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/hex_regs.h | 1 +
target/hexagon/cpu.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/hexagon/hex_regs.h b/target/hexagon/hex_regs.h
index f291911..e1b3149 100644
--- a/target/hexag
Signed-off-by: Taylor Simpson
---
target/hexagon/README | 81 ++-
1 file changed, 80 insertions(+), 1 deletion(-)
diff --git a/target/hexagon/README b/target/hexagon/README
index b0b2435..372e247 100644
--- a/target/hexagon/README
+++ b/target/hexa
Signed-off-by: Taylor Simpson
---
target/hexagon/translate.h | 61
target/hexagon/genptr.c| 15 +++
target/hexagon/translate.c | 243 -
3 files changed, 315 insertions(+), 4 deletions(-)
diff --git a/target/hexagon/translate.h b/targ
Functions to support scatter/gather
Add new file to target/hexagon/meson.build
Signed-off-by: Taylor Simpson
---
target/hexagon/mmvec/system_ext_mmvec.h | 29 +++
target/hexagon/mmvec/system_ext_mmvec.c | 66 +
target/hexagon/meson.build |
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 34 ++
1 file changed, 34 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index e865410..f548404 100644
--- a/target/hexagon/gen
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 31 +++
1 file changed, 31 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index a560504..916230e 100644
--- a/target/hexagon/gen_tc
Imported from the Hexagon architecture library
imported/allext_macros.def Top level macro include for all extensions
imported/macros.def Scalar core macros (some HVX here)
imported/mmvec/macros.defHVX macro definitions
The macro definition files specify instru
Signe-off-by: Taylor Simpson
---
tests/tcg/hexagon/hvx_histogram_input.h | 717
tests/tcg/hexagon/hvx_histogram_row.h | 24 ++
tests/tcg/hexagon/hvx_histogram.c | 88
tests/tcg/hexagon/Makefile.target | 5 +
tests/tcg/hexagon/hvx_histogram_r
Probe and commit vector stores (masked and scatter/gather)
Log vector register writes
Add the execution counters to the debug log
Histogram instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/helper.h| 16 +++
target/hexagon/op_helper.c | 282 ++
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 103 +++
1 file changed, 103 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index f53a7f2..32f8e20 100644
--- a/target/
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index 32f8e20..435c7b5 100644
--- a/target/hexagon/gen_tcg_hvx
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 50
1 file changed, 50 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index 916230e..ac2143e 100644
--- a/target/h
macros to interface with the generator
macros referenced in instruction semantics
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/macros.h | 22 +++
target/hexagon/mmvec/macros.h | 354 ++
2 files changed, 376 insertion
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 150 +++
1 file changed, 150 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index 435c7b5..2d1d778 100644
--- a/target/hex
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 122 +++
1 file changed, 122 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index ac2143e..e865410 100644
--- a/target/
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 42 ++
1 file changed, 42 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index f548404..f53a7f2 100644
--- a/target/hexagon/gen_tcg_hvx.h
+++ b/target/
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_dectree_import.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/target/hexagon/gen_dectree_import.c
b/target/hexagon/gen_dectree_import.c
index 5b7ecfc..ee35467 100644
--- a/target/hexagon/gen_d
Tests for
packet semantics
vector loads (aligned and unaligned)
vector stores (aligned and unaligned)
vector masked stores
vector new value store
maximum HVX temps in a packet
vector operations
Signed-off-by: Taylor Simpson
---
tests/tcg/hexagon/hvx_misc.c | 469
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_helper_funcs.py | 112 ++--
target/hexagon/gen_helper_protos.py | 16 ++-
target/hexagon/gen_tcg_funcs.py | 254 ++--
3 files changed, 360 insertions(+), 22 deletion
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h | 218 +++
1 file changed, 218 insertions(+)
diff --git a/target/hexagon/gen_tcg_hvx.h b/target/hexagon/gen_tcg_hvx.h
index 2d1d778..cdcc938 100644
--- a/target/hex
Signe-off-by: Taylor Simpson
---
tests/tcg/hexagon/vector_add_int.c | 61 ++
tests/tcg/hexagon/Makefile.target | 3 ++
2 files changed, 64 insertions(+)
create mode 100644 tests/tcg/hexagon/vector_add_int.c
diff --git a/tests/tcg/hexagon/vector_add_int.c
b
Add new file to target/hexagon/meson.build
Acked-by: Richard Henderson
Signed-off-by: Taylor Simpson
---
target/hexagon/mmvec/decode_ext_mmvec.h | 24
target/hexagon/decode.c | 24 +++-
target/hexagon/mmvec/decode_ext_mmvec.c | 236
target
Build the infrastructure to create overrides for HVX instructions.
We create a new empty file (gen_tcg_hvx.h) that will be populated
in subsequent patches.
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_tcg_hvx.h| 21 +
target/hexagon/genptr.c | 1 +
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