For the 4 byte instruction case we started doing an ld_code2 and then
reloaded the data with ld_code4 once it was identified as a 4 byte op.
This is confusing for the plugin hooks which are expecting to see
simple sequential loading so end up reporting a malformed 6 byte
instruction buffer. While we are at it lets clean up some of the
shifts with nice deposit/extrac calls.
Signed-off-by: Alex Bennée <alex.ben...@linaro.org>
---
target/s390x/tcg/translate.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index a2d6fa5cca..7fc870bbb9 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -6273,21 +6273,20 @@ static const DisasInsn *extract_insn(CPUS390XState
*env, DisasContext *s)
/* Extract the values saved by EXECUTE. */
insn = s->ex_value & 0xffffffffffff0000ull;
- ilen = s->ex_value & 0xf;
- op = insn >> 56;
+ ilen = extract64(s->ex_value, 0, 8);
+ op = extract64(insn, 56, 8);
} else {
- insn = ld_code2(env, s, pc);
- op = (insn >> 8) & 0xff;
+ insn = deposit64(0, 48, 16, ld_code2(env, s, pc));
+ op = extract64(insn, 56, 8);
ilen = get_ilen(op);
switch (ilen) {
case 2:
- insn = insn << 48;
break;
case 4:
- insn = ld_code4(env, s, pc) << 32;
+ insn = deposit64(insn, 32, 16, ld_code2(env, s, pc + 2));
break;
- case 6:
- insn = (insn << 48) | (ld_code4(env, s, pc + 2) << 16);
+ case 6:
+ insn = deposit64(insn, 16, 32, ld_code4(env, s, pc + 2));
break;
default:
g_assert_not_reached();
--
2.30.2
