On 08.10.21 22:38, Eric Farman wrote:
According to the Principles of Operation, the SIGP Set Architecture
order will return Incorrect State if some CPUs are not stopped, but
only if the CZAM facility is not present. If it is, the order will
return Invalid Parameter because the architecture mode c
On 08.10.21 22:38, Eric Farman wrote:
When building a Stop IRQ to pass to KVM, we should incorporate
the flags if handling the SIGP Stop and Store Status order.
With that, KVM can reject other orders that are submitted for
the same CPU while the operation is fully processed.
Signed-off-by: Eric
Hi,
> > I guess the main question is who is using the ROM/BIOS sources in the
> > tarballs, and would this 2-step process work for those users? If there
> > are distros relying on them then maybe there are some more logistics to
> > consider since the make-release downloads are both time-consumi
virito-mem currently relies on having a single sparse memory region (anon
mmap, mmaped file, mmaped huge pages, mmap shmem) per VM. Although we can
share memory with other processes, sharing with other VMs is not intended.
Instead of actually mmaping parts dynamically (which can be quite
expensive
Kevin Wolf writes:
[...]
> What I had in mind was using the schema to generate the necessary code,
> using the generic keyval parser everywhere, and just providing a hook
> where the QDict could be modified after the keyval parser and before the
> visitor. Most command line options would not hav
Hi Markus,
On 2021/10/11 13:26, Markus Armbruster wrote:
Yanan Wang writes:
Functionally smp_parse() is only called once and in one place
i.e. machine_set_smp, the possible second place where it'll be
called should be some unit tests if any.
Actually we are going to introduce an unit test fo
On 06/10/2021 09.25, Thomas Huth wrote:
On 05/10/2021 23.53, BALATON Zoltan wrote:
[...]
Maybe these 405 boards in QEMU ran with modified firmware where the memory
detection was patched out but it seems to detect the RAM so I wonder where
it gets that from. Maybe by reading the SDRAM controller
Hi Eduardo,
Ping for this minor change.
On 8/27/2021 2:48 PM, Chenyi Qiang wrote:
Because core-capability releated features are model-specific and KVM
won't support it, remove the core-capability in CPU model to avoid the
warning message.
Signed-off-by: Chenyi Qiang
---
target/i386/cpu.c |
Am 11.10.21 um 09:09 schrieb David Hildenbrand:
On 08.10.21 22:38, Eric Farman wrote:
When building a Stop IRQ to pass to KVM, we should incorporate
the flags if handling the SIGP Stop and Store Status order.
With that, KVM can reject other orders that are submitted for
the same CPU while the
On Mon, Oct 11 2021, Halil Pasic wrote:
> The virtio specification virtio-v1.1-cs01 states: "Transitional devices
> MUST detect Legacy drivers by detecting that VIRTIO_F_VERSION_1 has not
> been acknowledged by the driver." This is exactly what QEMU as of 6.1
> has done relying solely on VIRTIO_
On 11.10.21 10:40, Christian Borntraeger wrote:
Am 11.10.21 um 09:09 schrieb David Hildenbrand:
On 08.10.21 22:38, Eric Farman wrote:
When building a Stop IRQ to pass to KVM, we should incorporate
the flags if handling the SIGP Stop and Store Status order.
With that, KVM can reject other orde
On 08.10.21 08:28, Emanuele Giuseppe Esposito wrote:
There are some warnings and errors that we either miss or
are new in pylint. Anyways, test 297 of qemu-iotests fails
because of that, so we need to fix it.
All these fixes involve just indentation or additional spaces
added.
Signed-off-by: Em
On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
> This device is part of a superio/ISA bridge chip and IRQs from it are
> routed to an ISA interrupt set by the Interrupt Line PCI config
> register. Change uhci_update_irq() to allow this and use it from
> vt82c686-uhci-pci.
Hmm, sho
On 11/10/2021 11:29, Hanna Reitz wrote:
On 08.10.21 08:28, Emanuele Giuseppe Esposito wrote:
There are some warnings and errors that we either miss or
are new in pylint. Anyways, test 297 of qemu-iotests fails
because of that, so we need to fix it.
All these fixes involve just indentation or
Richard Henderson writes:
> Define as 0 for all tcg hosts. Put this in a separate header,
> because we'll want this in places that do not ordinarily have
> access to all of tcg/tcg.h.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Richard Henderson writes:
> Create a new function to combine a CPUTLBEntry addend
> with the guest address to form a host address.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
On Fri, Oct 8, 2021 at 11:18 PM Jean-Philippe Brucker
wrote:
>
> On Tue, Oct 05, 2021 at 11:45:42AM -0400, Michael S. Tsirkin wrote:
> > Looks like this can not be applied yet because the bypass bit
> > isn't in yet. what's up with that?
>
> The boot-bypass bit isn't a hard dependency for this ser
On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/10/21 15:24, BALATON Zoltan wrote:
Hello,
I'm trying to fix shutdown and reboot on pegasos2 which uses ACPI as
part of the VIA VT8231 (similar to and modelled in hw/isa/vt82c686b.c)
and found that the guest writes to ACPI PM1aCNT register
Richard Henderson writes:
> When using reserved_va, which is the default for a 64-bit host
> and a 32-bit guest, set guest_base_signed_addr32 if requested
> by TCG_TARGET_SIGNED_ADDR32, and the executable layout allows.
>
> Signed-off-by: Richard Henderson
> ---
> include/exec/cpu-all.h | 4
On Mon, 11 Oct 2021, Gerd Hoffmann wrote:
On Tue, Oct 05, 2021 at 03:12:05PM +0200, BALATON Zoltan wrote:
This device is part of a superio/ISA bridge chip and IRQs from it are
routed to an ISA interrupt set by the Interrupt Line PCI config
register. Change uhci_update_irq() to allow this and use
Richard Henderson writes:
> AArch64 has both sign and zero-extending addressing modes, which
> means that either treatment of guest addresses is equally efficient.
> Enabling this for AArch64 gives us testing of the feature in CI.
So which guests front ends will exercise this backend? I realis
On 21.09.21 16:28, Eric Blake wrote:
Use consistent capitalization, and fix a missed line (we duplicate the
qemu-img synopses in too many places).
Fixes: 1899bf4737 (qemu-img: Add -F shorthand to convert)
Signed-off-by: Eric Blake
---
docs/tools/qemu-img.rst | 2 +-
qemu-img-cmds.hx|
On Mon, Oct 11, 2021 at 09:21:30AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > > I guess the main question is who is using the ROM/BIOS sources in the
> > > tarballs, and would this 2-step process work for those users? If there
> > > are distros relying on them then maybe there are some more logisti
On 11.10.21 11:58, Emanuele Giuseppe Esposito wrote:
On 11/10/2021 11:29, Hanna Reitz wrote:
On 08.10.21 08:28, Emanuele Giuseppe Esposito wrote:
There are some warnings and errors that we either miss or
are new in pylint. Anyways, test 297 of qemu-iotests fails
because of that, so we need to
On Fri, Oct 08, 2021 at 09:20:35AM +0200, Emanuele Giuseppe Esposito wrote:
>
> > > +/*
> > > + * Global state (GS) API. These functions run under the BQL lock.
> > > + *
> > > + * If a function modifies the graph, it also uses drain and/or
> > > + * aio_context_acquire/release to be sure it has u
From: NDNF
This patch adds the ability to generate files in drcov format.
Primary goal this script is to have coverage
logfiles thatwork in Lighthouse.
Problems:
- The path to the executable file is not specified.
- base, end, entry take incorrect values.
(Lighthouse + IDA Pro anywa
On Fri, Oct 08, 2021 at 12:48:26PM +0200, Emanuele Giuseppe Esposito wrote:
>
>
> On 07/10/2021 16:54, Stefan Hajnoczi wrote:
> > On Tue, Oct 05, 2021 at 10:32:14AM -0400, Emanuele Giuseppe Esposito wrote:
> > > The job API will be handled separately in another serie.
> > >
> > > Signed-off-by:
The basic SGX did not enable numa for SGX EPC sections, which
result in all EPC sections located in numa node 0. This patch
enable SGX numa function in the guest and the EPC section can
work with RAM as one numa node.
The Guest kernel related log:
[0.009981] ACPI: SRAT: Node 0 PXM 0 [mem 0x180
Libvirt need get the detailed host SGX EPC capabilities to support
numa function. Libvirt can decide how to allocate host EPC sections
to guest numa from host numa info.
(QEMU) query-sgx-capabilities
{"return": {"sgx": true, "sgx2": true, "sgx1": true, "sections": \
[{"index": 0, "size": 170708172
Add the MEMORY_DEVICE_INFO_KIND_SGX_EPC case for SGX numa info
with 'info numa' command in the monitor.
Signed-off-by: Yang Zhong
---
hw/core/numa.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/core/numa.c b/hw/core/numa.c
index 510d096a88..1aa05dcf42 100644
--- a/hw/core/numa.c
The basic SGX patches were merged into Qemu release, the left NUMA
function for SGX should be enabled. The patch1 implemented the SGX NUMA
ACPI to enable NUMA in the SGX guest. Since Libvirt need detailed host
SGX EPC sections info to decide how to allocate EPC sections for SGX NUMA
guest, the SGXE
This patch can enable numa support for 'info sgx' command
in the monitor, which can show detailed SGX EPC sections
info.
(qemu) info sgx
SGX support: enabled
SGX1 support: enabled
SGX2 support: enabled
FLC support: enabled
SECTION #0: size=67108864
SECTION #1: size=29360128
The QMP interfa
The SGXEPCSection list added into SGXInfo to show the multiple
SGX EPC sections detailed info, not the total size like before.
Signed-off-by: Yang Zhong
---
qapi/misc-target.json | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/qapi/misc-target.json b/qapi
Add the SGX numa reference command and how to check if
SGX numa is support or not with multiple EPC sections.
Signed-off-by: Yang Zhong
---
docs/system/i386/sgx.rst | 31 +++
1 file changed, 27 insertions(+), 4 deletions(-)
diff --git a/docs/system/i386/sgx.rst b/doc
* Stefan Reiter (s.rei...@proxmox.com) wrote:
> Adds support for the "-xS" parameter type, where "-x" denotes a flag
> name and the "S" suffix indicates that this flag is supposed to take an
> arbitrary string parameter.
>
> These parameters are always optional, the entry in the qdict will be
> om
With this patch hot-plugged pci devices will only be visible to the
guest if the guests hotplug driver has enabled slot power.
This should fix the hot-plug race which one can hit when hot-plugging
a pci device at boot, while the guest is in the middle of the pci bus
scan.
Signed-off-by: Gerd Hoff
Refuse to push the attention button in case the guest is busy with some
hotplug operation (as indicated by the power indicator blinking).
Signed-off-by: Gerd Hoffmann
---
hw/pci/pcie.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 4a52c250615e..c4
In case the slot is powered off (and the power indicator turned off too)
we can unplug right away, without round-trip to the guest.
Also clear pending attention button press, there is nothing to care
about any more.
Signed-off-by: Gerd Hoffmann
---
hw/pci/pcie.c | 10 ++
1 file changed,
Gerd Hoffmann (6):
pci: implement power state
pcie: implement slow power control for pcie root ports
pcie: add power indicator blink check
pcie: factor out pcie_cap_slot_unplug()
pcie: fast unplug when slot power is off
pcie: expire pending delete
include/hw/pci/pci.h | 2 ++
inc
Add an expire time for pending delete, once the time is over allow
pressing the attention button again.
This makes pcie hotplug behave more like acpi hotplug, where one can
try sending an 'device_del' monitor command again in case the guest
didn't respond to the first attempt.
Signed-off-by: Gerd
This allows to power off pci devices. In "off" state the devices will
not be visible. No pci config space access, no pci bar access, no dma.
Default state is "on", so this patch (alone) should not change behavior.
Use case: Allows hotplug controllers implement slot power. Hotplug
controllers
No functional change.
Signed-off-by: Gerd Hoffmann
---
hw/pci/pcie.c | 35 +--
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index c455f92e16bf..70fc11ba4c7d 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -497,6 +
On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
> On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
> > On 10/10/21 15:24, BALATON Zoltan wrote:
> > > Hello,
> > >
> > > I'm trying to fix shutdown and reboot on pegasos2 which uses ACPI as
> > > part of the VIA VT8231 (similar to a
On Sat, 9 Oct 2021 17:24:01 +0200
Markus Armbruster wrote:
> I noticed -cpu help printing enough trailing spaces to make the output
> at least 84 characters wide. Looks ugly unless the terminal is wider.
> Ugly or not, trailing spaces are stupid.
>
> The culprit is this line in x86_cpu_list_en
The following changes since commit ca61fa4b803e5d0abaf6f1ceb690f23bb78a4def:
Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211006' into
staging (2021-10-06 12:11:14 -0700)
are available in the Git repository at:
https://gitlab.com/stefanha/qemu.git tags/block-pull-request
for
From: Stefano Garzarella
Commit 1793ad0247 ("iothread: add aio-max-batch parameter") added
a new parameter (aio-max-batch) to IOThread and used PollParamInfo
structure to handle it.
Since it is not a parameter of the polling mechanism, we rename the
structure to a more generic IOThreadParamInfo.
From: Stefano Garzarella
Commit 0445409d74 ("iothread: generalize
iothread_set_param/iothread_get_param") moved common code to set and
get IOThread parameters in two new functions.
These functions are called inside callbacks, so we don't need to use an
opaque pointer. Let's replace `void *opaque
On Mon, Sep 13, 2021 at 04:35:24PM +0100, Stefan Hajnoczi wrote:
> It was reported that enabling SafeStack reduces IOPS significantly
> (>25%) with the following fio benchmark on virtio-blk using a NVMe host
> block device:
>
> # fio --rw=randrw --bs=4k --iodepth=64 --runtime=1m --direct=1 \
>
On Mon, Oct 11, 2021 at 02:05:04PM +0200, Gerd Hoffmann wrote:
> Add an expire time for pending delete, once the time is over allow
> pressing the attention button again.
>
> This makes pcie hotplug behave more like acpi hotplug, where one can
> try sending an 'device_del' monitor command again in
Using the U-Boot firmware, we can check that at least the serial console
of the ppc405 boards is still usable.
Signed-off-by: Thomas Huth
---
Based-on: 20211006071140.565952-1-th...@redhat.com
tests/acceptance/ppc_405.py | 40 +
1 file changed, 40 insertions
On Mon, Oct 11, 2021 at 10:10:36AM +0200, Thomas Huth wrote:
> On 06/10/2021 09.25, Thomas Huth wrote:
> > On 05/10/2021 23.53, BALATON Zoltan wrote:
> > [...]
> > > Maybe these 405 boards in QEMU ran with modified firmware where the
> > > memory detection was patched out but it seems to detect the
The error message claims the parameter is invalid:
$ qemu-system-x86_64 -object qom-type=nonexistent
qemu-system-x86_64: -object qom-type=nonexistent: Invalid parameter
'nonexistent'
What's wrong is actually the *value* 'nonexistent'. Improve the
message to
qemu-system-x86_64: -obj
FWIW, there's an applesmc driver in the Linux kernel, and it exposes
many of the keys and values stored on the chip under
/sys/devices/platform/applesmc.768 (or at least it *used* to back when
I last checked).
My idea at the time was to get this driver to also expose the value of
OSK0,1, so that u
On Mon, 11 Oct 2021 08:19:01 -0400
"Michael S. Tsirkin" wrote:
> On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
> > On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
> > > On 10/10/21 15:24, BALATON Zoltan wrote:
> > > > Hello,
> > > >
> > > > I'm trying to fix shutdown and
On 10/11/21 14:59, Thomas Huth wrote:
> Using the U-Boot firmware, we can check that at least the serial console
> of the ppc405 boards is still usable.
>
> Signed-off-by: Thomas Huth
> ---
> Based-on: 20211006071140.565952-1-th...@redhat.com
>
> tests/acceptance/ppc_405.py | 40 ++
On 06.10.21 11:27, Paolo Bonzini wrote:
This makes it possible to see what is happening, even if the output of
"make check-block" is not sent to a tty (for example if it is sent to
grep or tee).
Signed-off-by: Paolo Bonzini
---
tests/qemu-iotests/testrunner.py | 1 +
1 file changed, 1 insert
On 10/11/21 15:15, Markus Armbruster wrote:
> The error message claims the parameter is invalid:
>
> $ qemu-system-x86_64 -object qom-type=nonexistent
> qemu-system-x86_64: -object qom-type=nonexistent: Invalid parameter
> 'nonexistent'
>
> What's wrong is actually the *value* 'nonexiste
On Mon, 11 Oct 2021, Michael S. Tsirkin wrote:
On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/10/21 15:24, BALATON Zoltan wrote:
Hello,
I'm trying to fix shutdown and reboot on pegasos2 which uses ACPI as
part of the VI
On 11/10/2021 11.20, David Gibson wrote:
On Mon, Oct 11, 2021 at 10:10:36AM +0200, Thomas Huth wrote:
On 06/10/2021 09.25, Thomas Huth wrote:
On 05/10/2021 23.53, BALATON Zoltan wrote:
[...]
Maybe these 405 boards in QEMU ran with modified firmware where the
memory detection was patched out bu
On Mon, Oct 11, 2021 at 03:27:44PM +0200, BALATON Zoltan wrote:
> On Mon, 11 Oct 2021, Michael S. Tsirkin wrote:
> > On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
> > > On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
> > > > On 10/10/21 15:24, BALATON Zoltan wrote:
> > > > > He
On 06/10/2021 11.26, Marc Hartmayer wrote:
Check if the provided kernel command line exceeds the maximum size of the s390x
Linux kernel command line size, which is 896 bytes.
Reported-by: Sven Schnelle
Signed-off-by: Marc Hartmayer
---
hw/s390x/ipl.c | 12 +++-
1 file changed, 11 in
On Mon, 11 Oct 2021, Gabriel L. Somlo wrote:
FWIW, there's an applesmc driver in the Linux kernel, and it exposes
many of the keys and values stored on the chip under
/sys/devices/platform/applesmc.768 (or at least it *used* to back when
I last checked).
My idea at the time was to get this drive
On Mon, 11 Oct 2021, Michael S. Tsirkin wrote:
On Mon, Oct 11, 2021 at 03:27:44PM +0200, BALATON Zoltan wrote:
On Mon, 11 Oct 2021, Michael S. Tsirkin wrote:
On Mon, Oct 11, 2021 at 12:13:55PM +0200, BALATON Zoltan wrote:
On Mon, 11 Oct 2021, Philippe Mathieu-Daudé wrote:
On 10/10/21 15:24, B
On Thu, 7 Oct 2021 19:27:49 +0530
Ani Sinha wrote:
> commit d7346e614f4ec ("acpi: x86: pcihp: add support hotplug on multifunction
> bridges")
> added ACPI hotplug descriptions for cold plugged bridges for functions other
> than 0. For all other devices, the ACPI hotplug descriptions are limite
On Thu, 7 Oct 2021 19:27:48 +0530
Ani Sinha wrote:
> We are adding a new unit test to cover the acpi hotplug support in q35 for
> multi-function bridges. This test uses a new table DSDT.multi-bridge.
> We need to allow changes in DSDT acpi table for addition of this new
> unit test.
>
> Signed-
On Thu, 7 Oct 2021 19:27:50 +0530
Ani Sinha wrote:
> We added a new unit test for testing acpi hotplug on multifunction bridges in
> q35 machines. Here, we update the DSDT table gloden master blob for this unit
> test.
>
> The test adds the following devices to qemu and then checks the changes
ping?
在 2021/10/2 19:45, Jiaxun Yang 写道:
Jiaxun Yang (3):
hw/mips/boston: Massage memory map information
hw/mips/boston: Allow loading elf kernel and dtb
hw/mips/boston: Add FDT generator
hw/mips/boston.c | 348 +++
1 file changed, 320 ins
On 13.09.21 15:04, Thomas Weißschuh wrote:
VMDK files support an attribute that represents the version of the guest
tools that are installed on the disk.
This attribute is used by vSphere before a machine has been started to
determine if the VM has the guest tools installed.
This is important whe
On Mon, Oct 11, 2021 at 4:59 AM Stefan Hajnoczi wrote:
> On Mon, Oct 11, 2021 at 09:21:30AM +0200, Gerd Hoffmann wrote:
> > Hi,
> >
> > > > I guess the main question is who is using the ROM/BIOS sources in the
> > > > tarballs, and would this 2-step process work for those users? If
> there
> >
On Mon, 11 Oct 2021 15:40:07 +0200, bala...@eik.bme.hu wrote:
> I guess a frequent use case for running macOS guests with keys from host
> would be on hosts running macOS too so a solution that works both on macOS
> and Linux might be better than a Linux specific one which then needs
> another w
On Tue, 5 Oct 2021 10:38:04 +0200
Eric Auger wrote:
> Upgrade the IORT table from B to E.b specification
> revision (ARM DEN 0049E.b).
>
> Signed-off-by: Eric Auger
with nit below fixed:
Reviewed-by: Igor Mammedov
>
> ---
>
> v1 -> v2:
> - Fix Revision value for ITS node and SMMUv3 node
>
On Tue, 5 Oct 2021 10:38:05 +0200
Eric Auger wrote:
> Re-generate reference blobs with rebuild-expected-aml.sh.
commit message should have diff old vs new,
if dis is the same/similar for various variants,
it's fine to provide only one variant diff here.
>
> Signed-off-by: Eric Auger
> ---
>
Thomas Huth writes:
> On 06/10/2021 11.26, Marc Hartmayer wrote:
>> Check if the provided kernel command line exceeds the maximum size of the
>> s390x
>> Linux kernel command line size, which is 896 bytes.
>>
>> Reported-by: Sven Schnelle
>> Signed-off-by: Marc Hartmayer
>> ---
>> hw/s390x/
Hi Hanna,
> -Original Message-
> From: Hanna Reitz
> Sent: Monday, October 11, 2021 4:09 PM
> Subject: Re: [PATCH v2] vmdk: allow specification of tools version
>
> On 13.09.21 15:04, Thomas Weißschuh wrote:
> > VMDK files support an attribute that represents the version of the
> > guest
On Fri, Oct 1, 2021 at 12:20 AM Stefan Hajnoczi wrote:
> On Thu, Sep 30, 2021 at 03:57:49PM +, Eldon Stegall wrote:
> > Hello!
> > I'd be happy to help with this. I'm mostly a consumer of QEMU, but
> > greatly appreciate all the work this community has done, and was able
> > to contribute a l
* Stefan Reiter (s.rei...@proxmox.com) wrote:
> It is possible to specify more than one VNC server on the command line,
> either with an explicit ID or the auto-generated ones à la "default",
> "vnc2", "vnc3", ...
>
> It is not possible to change the password on one of these extra VNC
> displays t
Kevin Wolf writes:
> ERRP_GUARD() makes debugging easier by making sure that &error_abort
> still fails at the real origin of the error instead of
> error_propagate().
>
> Signed-off-by: Kevin Wolf
Yes, please!
Reviewed-by: Markus Armbruster
On Tue, 5 Oct 2021 10:53:12 +0200
Eric Auger wrote:
> Add a 'preserve_config' field in struct GPEXConfig and
> if set generate the DSM #5 for preserving PCI boot configurations.
> The DSM presence is needed to expose RMRs.
here should be pointers to spec and location within it
where it says pre
On 10/11/21 3:28 AM, Alex Bennée wrote:
Richard Henderson writes:
AArch64 has both sign and zero-extending addressing modes, which
means that either treatment of guest addresses is equally efficient.
Enabling this for AArch64 gives us testing of the feature in CI.
So which guests front ends
On 10/10/21 9:30 PM, WANG Xuerui wrote:
@@ -92,6 +93,9 @@ static inline size_t sizeof_tlb(CPUTLBDescFast *fast)
static inline uintptr_t g2h_tlbe(const CPUTLBEntry *tlb, target_ulong gaddr)
{
+if (TCG_TARGET_SIGNED_ADDR32 && TARGET_LONG_BITS == 32) {
It seems this branch's direction s
On 10/11/21 3:22 AM, Alex Bennée wrote:
Richard Henderson writes:
When using reserved_va, which is the default for a 64-bit host
and a 32-bit guest, set guest_base_signed_addr32 if requested
by TCG_TARGET_SIGNED_ADDR32, and the executable layout allows.
Signed-off-by: Richard Henderson
---
On Mon, Oct 11, 2021 at 08:28:34AM -0600, Warner Losh wrote:
> On Mon, Oct 11, 2021 at 4:59 AM Stefan Hajnoczi wrote:
>
> > On Mon, Oct 11, 2021 at 09:21:30AM +0200, Gerd Hoffmann wrote:
> > > Hi,
> > >
> > > > > I guess the main question is who is using the ROM/BIOS sources in the
> > > > > ta
With -m32, size_t is generally only a uint32_t. That makes clang
complain that in the assertion
assert(qiov->size <= INT64_MAX);
the range of the type of qiov->size (size_t) is too small for any of its
values to ever exceed INT64_MAX.
Cast qiov->size to uint64_t to silence clang.
Fixes: f7ef
On Mon, Oct 11, 2021 at 03:51:01PM +0200, BALATON Zoltan wrote:
> > ... but given we did not previously do the read, maybe we should keep
> > it that way at least for the time being.
>
> How do you know there was no read before this write? Did you check it? I've
> only added a printf in the write
On Fri, 8 Oct 2021 16:26:22 +0100
Jean-Philippe Brucker wrote:
> On Wed, Oct 06, 2021 at 10:12:15AM +0200, Igor Mammedov wrote:
> > On Fri, 1 Oct 2021 18:33:56 +0100
> > Jean-Philippe Brucker wrote:
> >
> > > Create empty data files and allow updates for the upcoming VIOT tests.
> > >
> > >
We use INDEX_op_insn_start to make the start of instruction
boundaries. If we don't do it in the .insn_start hook things get
confused especially now plugins want to use that marking to identify
the start of instructions and will bomb out if it sees instrumented
ops before the first instruction boun
On Mon, Oct 11, 2021 at 04:03:01PM +0100, Dr. David Alan Gilbert wrote:
> * Stefan Reiter (s.rei...@proxmox.com) wrote:
> > It is possible to specify more than one VNC server on the command line,
> > either with an explicit ID or the auto-generated ones à la "default",
> > "vnc2", "vnc3", ...
> >
On Mon, Oct 11, 2021 at 05:50:31PM +0200, Hanna Reitz wrote:
> With -m32, size_t is generally only a uint32_t. That makes clang
> complain that in the assertion
>
> assert(qiov->size <= INT64_MAX);
>
> the range of the type of qiov->size (size_t) is too small for any of its
> values to ever ex
Hi,
> > So while I'm all for making things a little more independent,
> > let's not do it in a way that makes life difficult for downstreams.
> > There are more there than just a couple of big distro builders.
>
> I think this is fine. Firmware blobs aren't needed to build QEMU, only
> to run t
On Mon, Oct 11, 2021 at 07:15:49PM +0800, Yang Zhong wrote:
> The basic SGX did not enable numa for SGX EPC sections, which
> result in all EPC sections located in numa node 0. This patch
> enable SGX numa function in the guest and the EPC section can
> work with RAM as one numa node.
>
> The Gues
On 04.10.21 14:02, David Hildenbrand wrote:
#1 is a preparation for improved error reporting, #2 adds support for
MADV_POPULATE_WRITE, #3 cleans up the code to avoid global variables and
prepare for concurrency, #4 and #5 optimize thread handling, #6 makes
os_mem_prealloc() safe to be called from
On Mon, Oct 11, 2021 at 07:15:51PM +0800, Yang Zhong wrote:
> The SGXEPCSection list added into SGXInfo to show the multiple
> SGX EPC sections detailed info, not the total size like before.
>
> Signed-off-by: Yang Zhong
> ---
> qapi/misc-target.json | 19 +--
> 1 file changed, 1
In two places in sev.c we use malloc+free to manage memory for small
constant struct variables. Modify this to use local variables.
This small series can be applied on top of master or on top of Phil's
Housekeeping SEV series [1].
[1]
https://lore.kernel.org/qemu-devel/20211007161716.453984-1-p
The struct kvm_sev_launch_measure has a constant and small size, and
therefore we can use a regular local variable for it instead of
allocating and freeing heap memory for it.
Signed-off-by: Dov Murik
---
target/i386/sev.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
d
The struct kvm_sev_launch_start has a constant and small size, and
therefore we can use a regular local variable for it instead of
allocating and freeing heap memory for it.
Signed-off-by: Dov Murik
---
target/i386/sev.c | 23 ++-
1 file changed, 10 insertions(+), 13 deletion
If we warn about the block size being smaller than the default, we skip
some alignment checks.
This can currently only fail on x86-64, when specifying a block size of
1 MiB, however, we detect the THP size of 2 MiB.
Fixes: 228957fea3a9 ("virtio-mem: Probe THP size to determine default block
size
Hi Haiwei,
On Mon, Oct 11, 2021 at 06:10:07PM +0800, Haiwei Li wrote:
[...]
> Gave up waiting for root file system device. Common problems:
> - Boot args (cat /proc/cmdline)
>- Check rootdelay= (did the system wait long enough?)
> - Missing modules (cat /proc/modules; ls /dev)
> ALERT! UUI
In memory_region_access_valid() invalid accesses are logged to help
debugging but the log message does not say if it was a read or write.
Log that too to better identify the access causing the problem.
Signed-off-by: BALATON Zoltan
---
softmmu/memory.c | 20 ++--
1 file changed,
Playing with memory_region_is_mapped(), I realized that memory regions
mapped via an alias behave a little bit "differently", as they don't have
their ->container set.
* memory_region_is_mapped() will never succeed for memory regions mapped
via an alias
* memory_region_to_address_space(), memory_
memory_region_is_mapped() is the wrong check, we actually want to check
whether the backend is already marked mapped.
For example, memory regions mapped via an alias, such as NVDIMMs,
currently don't make memory_region_is_mapped() return "true". As the
machine is initialized before any memory devi
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