On Mon, Oct 11, 2021 at 10:10:36AM +0200, Thomas Huth wrote: > On 06/10/2021 09.25, Thomas Huth wrote: > > On 05/10/2021 23.53, BALATON Zoltan wrote: > > [...] > > > Maybe these 405 boards in QEMU ran with modified firmware where the > > > memory detection was patched out but it seems to detect the RAM so I > > > wonder where it gets that from. Maybe by reading the SDRAM > > > controller DCRs ppc4xx_sdram_init() sets up. Then I'm not sure what > > > it needs the SPD for, I forgot how this worked on sam460ex. Maybe > > > for the speed calibration, so could be it detects ram by reading > > > DCRs then tries to get SPD data and that's where it stops as i2c is > > > not emulated on taihu. This could be confirmed by checking what it > > > pokes with -d guest_errors that shows accesses to missing devices > > > but don't know where 405 has the i2c controller and if it's the same > > > as newer SoCs. If so that could be reused and an i2c bus could be > > > added with the SPD data like in sam460ex to make u-boot happy or you > > > could skip this in u-boot. > > > > FWIW, I've just tried the latter (skipping the sdram init in u-boot), > > and indeed, I can get to the u-boot prompt now. > [...]> I've also attached the patch with my modifications to u-boot. > > FYI, the changes can now be found on this branch here: > > https://gitlab.com/huth/u-boot/-/commits/taihu > > I also added a gitlab-CI file, so you can now download the u-boot.bin as an > artifact from the corresponding pipeline, e.g.: > > https://gitlab.com/huth/u-boot/-/jobs/1667201028
Thanks.
Are you going to send a v2 of your proposed deprecation patches? If
you do can you please CC me explicitly. I only scan qemu-ppc once a
week or so, and it goes into a different folder. If I'm CCed I'll
notice and respond to it faster.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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