Hi Zhijian,
On Mon, Aug 23, 2021 at 4:41 AM lizhij...@fujitsu.com
wrote:
>
>
>
> On 22/08/2021 16:53, Marcel Apfelbaum wrote:
> > Hi
> >
> > On Sat, Jul 31, 2021 at 5:00 PM Li Zhijian wrote:
> >> Previously, for the fsdax mem-backend-file, it will register failed with
> >> Operation not supporte
On Sat, Aug 21, 2021 at 3:59 AM Richard Henderson
wrote:
>
> Reviewed-by: Bin Meng
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/insn_trans/trans_rvi.c.inc | 36 +
> 1 file changed, 19 insertions(+), 17 deletions(-)
>
Simplify range invalidation which can avoid to iterate over all
iotlb entries multi-times. For instance invalidations patterns like
"invalidate 32 4kB pages starting from 0xffacd000" need to iterate over
all iotlb entries 6 times (num_pages: 1, 2, 16, 8, 4, 1). It only needs
to iterate over all iot
I'm not sure I understand. We try to avoid writing to MMIO regions in
fuzz_dma_read_cb to avoid such false-positives. E.g. that's why we have
code to do address_space_translate and manually walk the AddressSpace
and verify that we are writing to RAM, before doing the actual
qtest_memwrite. There is
On 8/23/21 4:08 AM, Bin Meng wrote:
> At present when input clock is disabled, any character transmitted
> to tx fifo can still show on the serial line, which is wrong.
>
> Fixes: b636db306e06 ("hw/char/cadence_uart: add clock support")
> Signed-off-by: Bin Meng
> ---
>
> hw/char/cadence_uart.c
On 8/23/21 4:08 AM, Bin Meng wrote:
> Currently the clock/reset check is done in uart_receive(), but we
> can move the check to uart_can_receive() which is earlier.
>
> Signed-off-by: Bin Meng
>
> ---
>
> hw/char/cadence_uart.c | 11 ++-
> 1 file changed, 6 insertions(+), 5 deletions(-
On 20.08.21 23:24, Eric Blake wrote:
On Thu, Aug 19, 2021 at 12:25:01PM +0200, Hanna Reitz wrote:
This post explains when FUSE block exports are useful, how they work,
and that it is fun to export an image file on its own path so it looks
like your image file (in whatever format it was) is a raw
On 22.08.21 15:18, Thomas Huth wrote:
On 20/08/2021 09.56, Hanna Reitz wrote:
On 19.08.21 18:23, Stefan Hajnoczi wrote:
On Thu, Aug 19, 2021 at 12:25:01PM +0200, Hanna Reitz wrote:
This post explains when FUSE block exports are useful, how they work,
and that it is fun to export an image file
On 20.08.21 18:00, Philippe Mathieu-Daudé wrote:
On 8/20/21 5:53 PM, David Hildenbrand wrote:
On 20.08.21 17:52, Philippe Mathieu-Daudé wrote:
When Linux refuses to overcommit a seriously wild allocation we get:
$ qemu-system-i386 -m 4000
qemu-system-i386: cannot set up guest memor
On 20.08.21 22:16, Peter Xu wrote:
Phil,
On Fri, Aug 20, 2021 at 12:58:05PM +0200, Philippe Mathieu-Daudé wrote:
(qemu) info mtree
address-space: I/O
- (prio 0, i/o): io
address-space shared 9 times:
- cpu-memory-0
- cpu-memory-1
- c
CCing Marcel
On 23/08/2021 11:33, Li Zhijian wrote:
> Previous qemu are facing 2 problems when migrating a fsdax memory backend with
> RDMA protocol.
> (1) ibv_reg_mr failed with Operation not supported
> (2) requester(source) side could receive RNR NAK.
>
> For the (1), we can try to register m
CCing Marcel
On 23/08/2021 11:33, Li Zhijian wrote:
> Previously, for the fsdax mem-backend-file, it will register failed with
> Operation not supported. In this case, we can try to register it with
> On-Demand Paging[1] like what rpma_mr_reg() does on rpma[2].
>
> [1]:
> https://community.mell
CCing Marcel
On 23/08/2021 11:33, Li Zhijian wrote:
> The responder mr registering with ODP will sent RNR NAK back to
> the requester in the face of the page fault.
> -
> ibv_poll_cq wc.status=13 RNR retry counter exceeded!
> ibv_poll_cq wrid=WRITE RDMA!
> -
> ibv_advise_mr(3) hel
On 23/08/2021 10.30, Hanna Reitz wrote:
On 22.08.21 15:18, Thomas Huth wrote:
On 20/08/2021 09.56, Hanna Reitz wrote:
On 19.08.21 18:23, Stefan Hajnoczi wrote:
On Thu, Aug 19, 2021 at 12:25:01PM +0200, Hanna Reitz wrote:
This post explains when FUSE block exports are useful, how they work,
an
Hi Zhijian,
On Mon, Aug 23, 2021 at 11:42 AM lizhij...@fujitsu.com
wrote:
>
> CCing Marcel
>
>
> On 23/08/2021 11:33, Li Zhijian wrote:
> > Previously, for the fsdax mem-backend-file, it will register failed with
> > Operation not supported. In this case, we can try to register it with
> > On-De
Hi Zhijian,
On Mon, Aug 23, 2021 at 11:41 AM lizhij...@fujitsu.com
wrote:
>
> CCing Marcel
>
>
> On 23/08/2021 11:33, Li Zhijian wrote:
> > Previous qemu are facing 2 problems when migrating a fsdax memory backend
> > with
> > RDMA protocol.
> > (1) ibv_reg_mr failed with Operation not supporte
Per Peter Maydell [*]:
'info mtree' monitor command was designed on the assumption that
there's really only one or two interesting address spaces, and
with more recent developments that's just not the case any more.
Similarly about how the FlatView are sorted using a GHashTable,
sort the Ad
Per Peter Maydell [*]:
'info mtree' monitor command was designed on the assumption that
there's really only one or two interesting address spaces, and
with more recent developments that's just not the case any more.
Similarly about how the FlatView are sorted using a GHashTable,
sort the Ad
On 8/23/21 10:53 AM, Philippe Mathieu-Daudé wrote:
> Per Peter Maydell [*]:
>
> 'info mtree' monitor command was designed on the assumption that
> there's really only one or two interesting address spaces, and
> with more recent developments that's just not the case any more.
>
> Similarly
On Mon, Aug 23, 2021 at 11:00:03AM +0800, Yanan Wang wrote:
> There are two places describing the same thing about deprecation
> of invalid topologies of -smp CLI, so remove the duplicated one.
>
> Signed-off-by: Yanan Wang
> Reviewed-by: Cornelia Huck
> ---
> docs/about/removed-features.rst |
On Mon, Aug 23, 2021 at 11:00:04AM +0800, Yanan Wang wrote:
> There is a mixture of "since/removed in X.Y" vs "since/removed in X.Y.Z"
> in the subjects in deprecated.rst/removed-features.rst. It will be better
> to use an unified format. It seems unlikely that we will ever deprecate
> something in
On Mon, Aug 23, 2021 at 11:00:05AM +0800, Yanan Wang wrote:
> Commit 29e0447551
> (docs/about/removed-features: Document removed CLI options from QEMU v3.1)
> has recorded some CLI options as replaced/removed from QEMU v3.1, but one
> of the subjects has missed the release record. Let's fix it.
>
On Sun, Aug 22, 2021 at 03:44:39PM +0100, Marc Zyngier wrote:
> Although we probe for the IPA limits imposed by KVM (and the hardware)
> when computing the memory map, we still use the old style '0' when
> creating a scratch VM in kvm_arm_create_scratch_host_vcpu().
>
> On systems that are severel
The current SMMU v3 model only support PCI/PCIe devices, so we update it for
non-PCI/PCIe devices.
. Add independent IOMMU memory regions for non-PCI/PCIe devices
. Add SID value property setting for non-PCI/PCIe devices
. Add PL330 DMA controller into "virt" machine and connect with SMMU v3
"smmu_iommu_mr" function can't get MR according to SID for non PCI/PCIe devices.
So we replace "smmuv3_flush_config" with "g_hash_table_foreach_remove" based on
devices SID.
Signed-off-by: Chunming Li
Signed-off-by: Renwei Liu
---
hw/arm/smmuv3.c | 35 ++---
. Add sid-map property to store non PCI/PCIe devices SID
. Create IOMMU memory regions for non PCI/PCIe devices based on their SID
. Update SID getting strategy for PCI/PCIe and non PCI/PCIe devices
Signed-off-by: Chunming Li
Signed-off-by: Renwei Liu
---
hw/arm/smmuv3.c | 46
Add PL330 DMA controller to test SMMU v3 connection and function.
The default SID for PL330 is 1 but we test other values, it works well.
Signed-off-by: Chunming Li
Signed-off-by: Renwei Liu
---
hw/arm/virt.c | 92 ++-
include/hw/arm/virt.h | 1 +
On 23.08.21 10:54, Philippe Mathieu-Daudé wrote:
Per Peter Maydell [*]:
'info mtree' monitor command was designed on the assumption that
there's really only one or two interesting address spaces, and
with more recent developments that's just not the case any more.
Similarly about how t
. Add "smmuv3_sidmap" to set non PCI/PCIe devices SID value
. Pass non PCI/PCIe devices SID value to SMMU v3 model creation
. Store SMMU v3 device in virtual machine then non PCI/PCIe can get its
memory region later
Signed-off-by: Chunming Li
Signed-off-by: Renwei Liu
---
hw/arm/virt.c
On Mon, 23 Aug 2021 at 09:40, David Hildenbrand wrote:
> Not opposed to printing the size, although I doubt that it will really
> stop similar questions/problems getting raised.
The case that triggered this was somebody thinking
-m took a byte count, so very likely that an error message
saying "y
On Mon, 23 Aug 2021 at 10:20, David Hildenbrand wrote:
>
> On 23.08.21 10:54, Philippe Mathieu-Daudé wrote:
> > +static void mtree_print_as(gpointer key, gpointer value, gpointer
> > user_data)
> > +{
> > +MemoryRegion *mr = key;
> > +GSList *as_same_root_mr_list = value;
> > +struct
On 23.08.21 11:23, Peter Maydell wrote:
On Mon, 23 Aug 2021 at 09:40, David Hildenbrand wrote:
Not opposed to printing the size, although I doubt that it will really
stop similar questions/problems getting raised.
The case that triggered this was somebody thinking
-m took a byte count, so ver
On 23.08.21 11:28, Peter Maydell wrote:
On Mon, 23 Aug 2021 at 10:20, David Hildenbrand wrote:
On 23.08.21 10:54, Philippe Mathieu-Daudé wrote:
+static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
+{
+MemoryRegion *mr = key;
+GSList *as_same_root_mr_list = val
Am 22.08.21 um 23:02 schrieb Ilya Dryomov:
On Tue, Aug 10, 2021 at 3:41 PM Peter Lieven wrote:
the qemu rbd driver currently lacks support for bdrv_co_block_status.
This results mainly in incorrect progress during block operations (e.g.
qemu-img convert with an rbd image as source).
This patch
On Mon, Aug 23, 2021 at 4:14 PM Philippe Mathieu-Daudé wrote:
>
> On 8/23/21 4:08 AM, Bin Meng wrote:
> > At present when input clock is disabled, any character transmitted
> > to tx fifo can still show on the serial line, which is wrong.
> >
> > Fixes: b636db306e06 ("hw/char/cadence_uart: add clo
Hi,
On Fri, Aug 20, 2021 at 3:07 PM Philippe Mathieu-Daudé
wrote:
>
> Cc'ing Mauro to double-check.
>
> On 8/20/21 2:12 PM, Peter Maydell wrote:
> > On Wed, 18 Aug 2021 at 13:10, Gerd Hoffmann wrote:
> >>
> >> Security fix. Sorry for the last-minute patch, I had completely
> >> forgotten this o
Annoying problem when stubs take over module symbols.
See https://gitlab.com/qemu-project/qemu/-/issues/553
Philippe Mathieu-Daudé (2):
hw/display: Restrict virtio-gpu-udmabuf stubs to !Linux
ui/console: Restrict udmabuf_fd() to Linux
include/ui/console.h |
When using qemu configured with --enabled-modules, the
generic stubs are used instead of the module symbols:
qemu-system-x86_64: -device virtio-vga,blob=on: cannot enable blob resources
without udmabuf
Restrict the stubs to Linux and only link them when
CONFIG_VIRTIO_GPU is disabled (only the
Signed-off-by: Philippe Mathieu-Daudé
---
include/ui/console.h | 2 ++
ui/udmabuf.c | 11 ---
ui/meson.build | 6 --
3 files changed, 6 insertions(+), 13 deletions(-)
diff --git a/include/ui/console.h b/include/ui/console.h
index b30b63976a5..3be21497a2e 100644
--- a/
On 8/23/21 11:35 AM, David Hildenbrand wrote:
> On 23.08.21 11:28, Peter Maydell wrote:
>> On Mon, 23 Aug 2021 at 10:20, David Hildenbrand wrote:
>>>
>>> On 23.08.21 10:54, Philippe Mathieu-Daudé wrote:
+static void mtree_print_as(gpointer key, gpointer value, gpointer
user_data)
+{
From: Stefan Reiter
The following sequence can produce a race condition that results in
responses meant for different clients being sent to the wrong one:
(QMP, no OOB)
1) client A connects
2) client A sends 'qmp_capabilities'
3) 'qmp_dispatch' runs in coroutine, schedules out to
'do_qmp_disp
On 8/23/21 11:29 AM, David Hildenbrand wrote:
> On 23.08.21 11:23, Peter Maydell wrote:
>> On Mon, 23 Aug 2021 at 09:40, David Hildenbrand wrote:
>>> Not opposed to printing the size, although I doubt that it will really
>>> stop similar questions/problems getting raised.
>>
>> The case that trigg
On Mon, 23 Aug 2021 at 10:59, Mauro Matteo Cascella wrote:
>
> Hi,
>
> On Fri, Aug 20, 2021 at 3:07 PM Philippe Mathieu-Daudé
> wrote:
> >
> > Cc'ing Mauro to double-check.
> >
> > On 8/20/21 2:12 PM, Peter Maydell wrote:
> > > On Wed, 18 Aug 2021 at 13:10, Gerd Hoffmann wrote:
> > >>
> > >> Sec
On 23.08.21 12:12, Philippe Mathieu-Daudé wrote:
On 8/23/21 11:29 AM, David Hildenbrand wrote:
On 23.08.21 11:23, Peter Maydell wrote:
On Mon, 23 Aug 2021 at 09:40, David Hildenbrand wrote:
Not opposed to printing the size, although I doubt that it will really
stop similar questions/problems
On Fri, 20 Aug 2021 at 18:12, Peter Maydell wrote:
>
> In the SSE decode function gen_sse(), we combine a byte
> 'b' and a value 'b1' which can be [0..3], and switch on them:
>b |= (b1 << 8);
>switch (b) {
>...
>default:
>unknown_op:
>gen_unknown_opcode(env, s);
>
On 8/23/21 12:24 PM, David Hildenbrand wrote:
> On 23.08.21 12:12, Philippe Mathieu-Daudé wrote:
>> On 8/23/21 11:29 AM, David Hildenbrand wrote:
>>> On 23.08.21 11:23, Peter Maydell wrote:
On Mon, 23 Aug 2021 at 09:40, David Hildenbrand
wrote:
> Not opposed to printing the size, alt
On Sun, Aug 22, 2021 at 1:04 PM John Snow wrote:
>
>
> On Thu, Aug 19, 2021 at 1:39 PM G S Niteesh Babu
> wrote:
>
>> Added a draft of AQMP TUI.
>>
>> Implements the follwing basic features:
>> 1) Command transmission/reception.
>> 2) Shows events asynchronously.
>> 3) Shows server status in the
On Wed, 11 Aug 2021 at 10:10, ~archi42 wrote:
>
> From: Sebastian Meyer
>
> This includes the changes suggested by Philippe.
> I kept the `-S` in the command line. The user shall
> use that instead of `wait=on`.
>
> Signed-off-by: Sebastian Meyer
Thanks; I've applied this to target-arm.next for
On 8/23/21 11:57 AM, Bin Meng wrote:
> On Mon, Aug 23, 2021 at 4:14 PM Philippe Mathieu-Daudé
> wrote:
>>
>> On 8/23/21 4:08 AM, Bin Meng wrote:
>>> At present when input clock is disabled, any character transmitted
>>> to tx fifo can still show on the serial line, which is wrong.
>>>
>>> Fixes:
On 8/23/21 12:39 PM, Peter Maydell wrote:
> On Wed, 11 Aug 2021 at 10:10, ~archi42 wrote:
>>
>> From: Sebastian Meyer
>>
>> This includes the changes suggested by Philippe.
>> I kept the `-S` in the command line. The user shall
>> use that instead of `wait=on`.
>>
>> Signed-off-by: Sebastian Meye
The page sizes supported by IOMMU may not match the CPU page size.
For example, the CPU page size is 16KB, but ARM SMMU may not support
16KB. So it is inappropriate to use qemu_real_host_page_mask in
region_add/region_del.
The vfio iommu page sizes exposed via VFIO_IOMMU_GET_INFO. So use
the small
This series include patches as below:
Patch 1:
- Add a trace point to informe users when a MMIO RAM section less than minimum
size
Patch 2:
- Fix address alignment in region_add/regiondel with vfio iommu smallest page
size
Kunkun Jiang (2):
vfio/common: Add trace point when a MMIO RAM sectio
I recently did some tests about the 82599 NIC, and found a strange
scenario. The MSIX-Table size of this NIC is 0x30 and the offset
in Bar 3(64KB) is 0x0. And CPU page size is 64KB. The region_add()
will return early at 'int128_ge((int128_make64(iova), llend))' and
hasn't any message. Let's add a t
10.08.2021 17:55, Hanna Reitz wrote:
On 04.08.21 11:37, Vladimir Sementsov-Ogievskiy wrote:
We'll need a possibility to set compress and use_copy_range options
after initialization of the state. So make corresponding part of
block_copy_state_new() separate and public.
Signed-off-by: Vladimir Se
From: Klaus Jensen
Address 0x0 is a valid address. Fix the admin submission and completion
queue address validation to not error out on this.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 8
hw/nvme/trace-events | 2 --
2 files changed, 10 deletions(-)
diff --git a/hw/nvme/c
20.08.2021 16:21, Hanna Reitz wrote:
On 24.07.21 15:38, Vladimir Sementsov-Ogievskiy wrote:
There is no conflict and no dependency if we have parallel writes to
different subclusters of one cluster when cluster itself is already
allocated. So, relax extra dependency.
Measure performance:
First,
This new version is based on upstream v6.1.0-rc4.
Now all patches in the series have been reviewed (tagged with R-b/A-b).
Description:
This series introduces some fixes and improvement for the SMP parsing.
Behavior of specifying a CPU topology parameter as zero was implicitly
allowed but undocumen
* James Bottomley (j...@linux.ibm.com) wrote:
> On Thu, 2021-08-19 at 15:28 +0100, Dr. David Alan Gilbert wrote:
> > * James Bottomley (j...@linux.ibm.com) wrote:
> > > On Thu, 2021-08-19 at 09:22 +0100, Dr. David Alan Gilbert wrote:
> [...]
> > > > I think it really does have to cope with migratio
In the SMP configuration, we should either provide a topology
parameter with a reasonable value (greater than zero) or just
omit it and QEMU will compute the missing value.
The users shouldn't provide a configuration with any parameter
of it specified as zero (e.g. -smp 8,sockets=0) which could
po
To pave the way for the functional improvement in later patches,
make some refactor/cleanup for the smp parsers, including using
local maxcpus instead of ms->smp.max_cpus in the calculation,
defaulting dies to 0 initially like other members, cleanup the
sanity check for dies.
We actually also fix
Now that all the possible topology parameters are integrated in struct
CpuTopology, tweak the order of topology members to be "cpus/sockets/
dies/cores/threads/maxcpus" for readability and consistency. We also
tweak the comment by adding explanation of dies parameter.
Signed-off-by: Yanan Wang
Re
We have two requirements for a valid SMP configuration:
the product of "sockets * cores * threads" must represent all the
possible cpus, i.e., max_cpus, and then must include the initially
present cpus, i.e., smp_cpus.
So we only need to ensure 1) "sockets * cores * threads == maxcpus"
at first an
We are currently using maxcpus to calculate the omitted sockets
but using cpus to calculate the omitted cores/threads. This makes
cmdlines like:
-smp cpus=8,maxcpus=16
-smp cpus=8,cores=4,maxcpus=16
-smp cpus=8,threads=2,maxcpus=16
work fine but the ones like:
-smp cpus=8,sockets=2,maxcpus=
Currently we directly calculate the omitted cpus based on the given
incomplete collection of parameters. This makes some cmdlines like:
-smp maxcpus=16
-smp sockets=2,maxcpus=16
-smp sockets=2,dies=2,maxcpus=16
-smp sockets=2,cores=4,maxcpus=16
not work. We should probably set the value of
In the real SMP hardware topology world, it's much more likely that
we have high cores-per-socket counts and few sockets totally. While
the current preference of sockets over cores in smp parsing results
in a virtual cpu topology with low cores-per-sockets counts and a
large number of sockets, whic
Currently the only difference between smp_parse and pc_smp_parse
is the support of dies parameter and the related error reporting.
With some arch compat variables like "bool dies_supported", we can
make smp_parse generic enough for all arches and the PC specific
one can be removed.
Making smp_pars
In the sanity-check of smp_cpus and max_cpus against mc in function
machine_set_smp(), we are now using ms->smp.max_cpus for the check
but using current_machine->smp.max_cpus in the error message.
Tweak this by uniformly using the local ms.
Signed-off-by: Yanan Wang
Reviewed-by: Andrew Jones
Rev
Add 6.2 machine types for arm/i440fx/q35/s390x/spapr.
Signed-off-by: Yanan Wang
Acked-by: David Gibson
Reviewed-by: Andrew Jones
Reviewed-by: Cornelia Huck
Reviewed-by: Pankaj Gupta
---
hw/arm/virt.c | 9 -
hw/core/machine.c | 3 +++
hw/i386/pc.c
Now we have a generic smp parser for all arches, and there will
not be any other arch specific ones, so let's remove the callback
from MachineClass and call the parser directly.
Signed-off-by: Yanan Wang
Reviewed-by: Andrew Jones
---
hw/core/machine.c | 3 +--
include/hw/boards.h | 5 -
2
Put both sanity-check of the input SMP configuration and sanity-check
of the output SMP configuration uniformly in the generic parser. Then
machine_set_smp() will become cleaner, also all the invalid scenarios
can be tested only by calling the parser.
Signed-off-by: Yanan Wang
Reviewed-by: Andrew
Now we have a common structure SMPCompatProps used to store information
about SMP compatibility stuff, so we can also move smp_prefer_sockets
there for cleaner code.
No functional change intended.
Signed-off-by: Yanan Wang
Acked-by: David Gibson
Reviewed-by: Andrew Jones
---
hw/arm/virt.c
I think the check in fuzz_dma_read_cb() is buggy because it doesn't
consider when the write address is not in the mmio region but can
overlap. For example, the mmio region is 0xe000 to 0xe0001000, and
the write address is 0xd000 (not ram) and length is 0x2000. In this
case, the address_spac
Add a QEMU unit test for the parsing of given SMP configuration.
Since all the parsing logic is in generic function smp_parse(),
this test passes different SMP configurations to the function
and compare the parsing result with what is expected.
In the test, all possible collections of the topology
On 210823 2034, Qiuhao Li wrote:
> I think the check in fuzz_dma_read_cb() is buggy because it doesn't
> consider when the write address is not in the mmio region but can
> overlap. For example, the mmio region is 0xe000 to 0xe0001000, and
> the write address is 0xd000 (not ram) and length
We are going to introduce an unit test for the parser smp_parse()
in hw/core/machine.c, but now machine.c is only built in softmmu.
In order to solve the build dependency on the smp parsing code and
avoid building unrelated stuff for the unit tests, move the related
code from machine.c into a new
On 08/22/21 17:09, Ani Sinha wrote:
> Hi :
>
> All of you have contributed to vmgenid device at some point.
> Unfortunately, this code currently has no maintainers. I had looked into
> this feature as a part of another project for a previous company, hence
> noticed it. Will any of you would want
On 8/23/21 2:27 PM, Yanan Wang wrote:
> We have two requirements for a valid SMP configuration:
> the product of "sockets * cores * threads" must represent all the
> possible cpus, i.e., max_cpus, and then must include the initially
> present cpus, i.e., smp_cpus.
>
> So we only need to ensure 1)
On Mon, Aug 23, 2021 at 6:43 PM Philippe Mathieu-Daudé wrote:
>
> On 8/23/21 11:57 AM, Bin Meng wrote:
> > On Mon, Aug 23, 2021 at 4:14 PM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> On 8/23/21 4:08 AM, Bin Meng wrote:
> >>> At present when input clock is disabled, any character transmitted
> >>
On 8/23/21 2:27 PM, Yanan Wang wrote:
> Currently the only difference between smp_parse and pc_smp_parse
> is the support of dies parameter and the related error reporting.
> With some arch compat variables like "bool dies_supported", we can
> make smp_parse generic enough for all arches and the PC
On 8/23/21 3:14 PM, Bin Meng wrote:
> On Mon, Aug 23, 2021 at 6:43 PM Philippe Mathieu-Daudé
> wrote:
>>
>> On 8/23/21 11:57 AM, Bin Meng wrote:
>>> On Mon, Aug 23, 2021 at 4:14 PM Philippe Mathieu-Daudé
>>> wrote:
On 8/23/21 4:08 AM, Bin Meng wrote:
> At present when input clock
Aha! Nice patch.
My fault. I will search first next time :)
Thanks.
Qiuhao Li
On Mon, 2021-08-23 at 08:41 -0400, Alexander Bulekov wrote:
> On 210823 2034, Qiuhao Li wrote:
> > I think the check in fuzz_dma_read_cb() is buggy because it doesn't
> > consider when the write address is not in the
Back from my summer break, please excuse the delay.
Jonah Palmer writes:
> On 8/7/21 8:35 AM, Markus Armbruster wrote:
>> QAPI schema review only.
>>
>> Jonah Palmer writes:
>>
>>> From: Laurent Vivier
>>>
>>> This new command lists all the instances of VirtIODevice with
>>> their path and vir
Daniel Henrique Barboza writes:
> On 8/7/21 11:06 AM, Markus Armbruster wrote:
>> Daniel Henrique Barboza writes:
>>
>>> Linux Kernel 5.12 is now unisolating CPU DRCs in the device_removal
>>> error path, signalling that the hotunplug process wasn't successful.
>>> This allow us to send a DEVIC
Eduardo Habkost writes:
> On Wed, Aug 11, 2021 at 9:44 AM Thomas Huth wrote:
>>
>> On 11/08/2021 15.40, Eduardo Habkost wrote:
>> > On Wed, Aug 11, 2021 at 2:10 AM Thomas Huth wrote:
>> >>
>> >> On 10/08/2021 20.56, Eduardo Habkost wrote:
>> >>> On Sat, Aug 07, 2021 at 04:22:42PM +0200, Markus
On Mon, Aug 23, 2021 at 02:42:03PM +1000, Alistair Francis wrote:
> On Mon, Aug 23, 2021 at 12:09 PM Bin Meng wrote:
> >
> > As of today, when booting upstream U-Boot for Xilinx Zynq, the UART
> > does not receive anything. Debugging shows that the UART input clock
> > frequency is zero which prev
On 210823 2123, Qiuhao Li wrote:
> Aha! Nice patch.
>
> My fault. I will search first next time :)
If you are interested in testing fuzzing code and you want to
automatically be cc-ed when something changes, you can send a patch
adding yourself to reviewers in the Fuzzing section of MAINTAINERS
-
On Mon, Aug 23, 2021 at 02:43:26PM +1000, Alistair Francis wrote:
> On Mon, Aug 23, 2021 at 12:11 PM Bin Meng wrote:
> >
> > At present when input clock is disabled, any character transmitted
> > to tx fifo can still show on the serial line, which is wrong.
> >
> > Fixes: b636db306e06 ("hw/char/ca
QEMU cannot write directly to the memory of memory-encrypted guests;
this breaks normal RAM-load in the migration target. Instead, QEMU
asks a migration helper running on an auxiliary vcpu in the guest to
restore encrypted pages as they were received from the source to a
specific GPA.
The migrati
The gpa_inside_migration_helper_shared_area will be used to skip
migrating RAM pages that are used by the migration helper at the target.
Signed-off-by: Dov Murik
---
migration/confidential-ram.h | 2 ++
migration/confidential-ram.c | 6 ++
2 files changed, 8 insertions(+)
diff --git a/migr
This command forces a running VM into a migrate-incoming state. When
using guest-assisted migration (for confidential guests), the target
must be started so that its memory has the necessary code for the
migration helper. After it is ready we can start receiving the incoming
migration connection.
When saving RAM pages of a confidential guest, check whether a page is
encrypted. If it is, ask the in-guest migration helper to encrypt the
page for transmission.
This patch forces the use of in-guest migration handler instead of the
PSP-based SEV migration; this is just a temporary example. TO
Add a function to reset the mirror vcpu so it'll start directly at the
entry point of the migration handler.
Note: In the patch below the GDT and EIP values are hard-coded to fit
the OVMF migration handler entry point implementation we currently have.
These values can be exposed in the OVMF GUID t
If we don't exclude it there's a hang when stopping the VM during
migration.
Signed-off-by: Dov Murik
---
target/i386/kvm/kvm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 6b20917fa5..04bbc89b48 100644
--- a/target/i3
The post_load function crashed when we were loading the device state in
to an already-running guest. This was because an existing memory region
as not deleted in ich9_lpc_rcba_update.
Signed-off-by: Dov Murik
---
hw/isa/lpc_ich9.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --
QEMU cannot read the memory of memory-encrypted guests, which is
required for sending RAM to the migration target. Instead, QEMU asks a
migration helper running on an auxiliary vcpu in the guest to extract
pages from memory; these pages are encrypted with a transfer key that is
known to the source
The start-migration-handler QMP command starts the mirror vcpu directly
at the migration handler entry point.
This is a temporary workaround to start-up (resume) the mirror vcpu
which runs the in-guest migration handler (both on the source and the
target).
A proper solution would be to start it a
Migrating these memory region hangs the in-guest migration handler.
Signed-off-by: Dov Murik
---
migration/ram.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/migration/ram.c b/migration/ram.c
index 2d5889f795..f0df6780fb 100644
--- a/migration/ram.c
+++ b/migration/
Fix is added to check for reserved value in select field for
namespace attachment
Signed-off-by: Naveen Nagar
Signed-off-by: Klaus Jensen
cc: Minwoo Im
---
hw/nvme/ctrl.c | 13 +
include/block/nvme.h | 5 +
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git
When loading encrypted RAM pages of a confidential guest, ask the
in-guest migration helper to decrypt the incoming page and place it
correctly in the guest memory at the appropriate address. This way the
page's plaintext content remains inaccessible to the host.
Signed-off-by: Dov Murik
---
mi
To resolve the issue to debug switchable targets, this serias introduces
basic infrastructure for gdbstub and enable support for ARM and RISC-V
targets.
For example, now there is no problem to debug an big-enadian aarch64 target
on x86 host.
$ qemu-system-aarch64 -gdb tcp::1234,endianness=big .
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