On 10/02/2021 22:51, Philippe Mathieu-Daudé wrote:
Hi Mark,
On 2/9/21 8:29 PM, Mark Cave-Ayland wrote:
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 28
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index e7c
Hi,
This patch series add support for eMMC cards. This work was previosly
submitted by Vincent, rebased few changes on top.
Cedric & Joel has helped to added boot partition access support. I
expect them to make a follow-up series to use it with aspeed machines.
Present series adds eMMC support t
From: Vincent Palatin
Add new block device type.
Signed-off-by: Vincent Palatin
[SPB: Rebased over 5.1 version]
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
blockdev.c| 1 +
include/sysemu/blockdev.h | 1 +
2 files changed, 2
From: Joel Stanley
This assumes a specially constructued image:
dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M
dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc
dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K
cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img
Add support to Power up the card and send response r3 in case of eMMC.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 57fff89..e3738b2 100644
--- a/hw/sd/s
eMMC is expected to be in idle-state post CMD1. Ready state is an
intermediate stage which we don't come across in Device identification
mode.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/sd/sd.c b/hw/s
From: Vincent Palatin
The parameters mimick a real 4GB eMMC, but it can be set to various
sizes.
Signed-off-by: Vincent Palatin
[SPB: Rebased the patch over qemu 5.1,
Mark eMMC to support all timing modes]
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Joel Stanley
Signed-off-by: Cédric
switch operation in eMMC card updates the ext_csd register to
request changes in card operations. Here we implement similar
sequence but requests are mostly dummy and make no change.
Implement SWITCH_ERROR if the write operation extends goes beyond length
of ext_csd.
Signed-off-by: Sai Pavan Bodd
Add CMD35 and CMD36 which sets the erase start and end.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 236f2b8..7aab647 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1544,6 +1544,7
ACMD41 is not applicable for eMMC.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 90359f6..236f2b8 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1729,6 +1729,9 @@ static sd_rsp_ty
OCR.CARD_CAPACITY field is only valid for sd cards, So skip it for eMMC.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index a75fa1c..57fff89 100644
--- a/hw/sd/sd.c
++
On 2/10/21 3:20 PM, Edgar E. Iglesias wrote:
From: "Edgar E. Iglesias"
Use nr_apu_cpus in favor of hard coding 2.
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Luc Michel
---
hw/arm/xlnx-versal.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/xlnx-versa
From: Joel Stanley
The userdata size is derived from the file the user passes on the
command line, but we must take into account the boot areas.
Signed-off-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/sd/sd.c b/hw/
eMMC cards support tuning sequence for entering HS200 mode.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 47 +++
1 file changed, 47 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 7925174..90359f6 100644
-
CID structure is little different for eMMC, w.r.t to product name and
manufacturing date.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 52 +++-
1 file changed, 35 insertions(+), 17 deletions(-)
diff --git a/hw/
Eduardo Habkost writes:
> On Wed, Feb 10, 2021 at 04:56:06PM +, Daniel P. Berrangé wrote:
>> On Wed, Feb 10, 2021 at 05:40:12PM +0100, Vitaly Kuznetsov wrote:
>> > Changes since v3:
>> > - Make 'hv-default' override 'hv-*' options which were already set
>> > (e.g. 'hv-feature=on,hv-default
From: Cédric Le Goater
Add user friendly macros for EXT_CSD register.
Signed-off-by: Cédric Le Goater
[spb: Rebased over versal emmc series,
updated commit message]
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sd.c | 54 +++-
hw/sd/sdmmc-internal.h | 97 +
Embedded device slots should be allowed as support of eMMC is available.
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sdhci.c | 4
1 file changed, 4 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 8ffa539..771212a 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -99,10 +99,6 @@
virtio devices support separate iothreads waiting for
events from file descriptors. These are asynchronous
events that can't be recorded and replayed, therefore
this patch disables ioeventfd for all devices when
record or replay is enabled.
Signed-off-by: Pavel Dovgalyuk
---
hw/virtio/virtio-pci
Configuring SDHCI-0 to act as eMMC controller.
Signed-off-by: Sai Pavan Boddu
---
hw/arm/xlnx-versal-virt.c | 16 +++-
hw/arm/xlnx-versal.c | 14 --
2 files changed, 23 insertions(+), 7 deletions(-)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
On Feb 11 12:37, Keith Busch wrote:
> On Wed, Feb 10, 2021 at 08:06:46AM +0100, Klaus Jensen wrote:
> > From: Gollu Appalanaidu
> >
> > Add support for marking blocks invalid with the Write Uncorrectable
> > command. Block status is tracked in a (non-persistent) bitmap that is
> > checked on all
On Thu, 11 Feb 2021 11:34:53 +0300
Pavel Dovgalyuk wrote:
> virtio devices support separate iothreads waiting for
> events from file descriptors. These are asynchronous
> events that can't be recorded and replayed, therefore
> this patch disables ioeventfd for all devices when
> record or replay
Hi
On Fri, Jan 29, 2021 at 1:00 PM lma--- via wrote:
>
> The guest-get-vcpus returns incorrect vcpu info in case we hotunplug vcpus(not
> the last one).
> e.g.:
> A VM has 4 VCPUs: cpu0 + 3 hotunpluggable online vcpus(cpu1, cpu2 and cpu3).
> Hotunplug cpu2, Now only cpu0, cpu1 and cpu3 are prese
Hello,
On Wed, Feb 10, 2021 at 11:27 PM Alistair Francis wrote:
>
> On Tue, Feb 9, 2021 at 2:55 AM Bin Meng wrote:
> >
> > At the end of sdhci_send_command(), it starts a data transfer if
> > the command register indicates a data is associated. However the
> > data transfer should only be initia
Also add Damien as a reviewer.
Signed-off-by: Luc Michel
---
MAINTAINERS | 11 +++
1 file changed, 11 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e6f1eca30f..67ad14ce14 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2850,10 +2850,21 @@ M: Bin Meng
S: Supported
F: pc-bi
Beraldo, thanks for the script.
However, I can't reproduce the bug using it. I've got the newest QEMU from the
repository, and it never hangs in this scenario.
But there are some problems in other runs with more complex tasks.
--
You received this bug notification because you are a member of qe
On 11.02.2021 11:44, Cornelia Huck wrote:
On Thu, 11 Feb 2021 11:34:53 +0300
Pavel Dovgalyuk wrote:
virtio devices support separate iothreads waiting for
events from file descriptors. These are asynchronous
events that can't be recorded and replayed, therefore
this patch disables ioeventfd for
Pavel Dovgalyuk writes:
> virtio devices support separate iothreads waiting for
> events from file descriptors. These are asynchronous
> events that can't be recorded and replayed, therefore
> this patch disables ioeventfd for all devices when
> record or replay is enabled.
Does it always have
On 11/02/21 09:56, Pavel Dovgalyuk wrote:
That's right.
It seems, that ioeventfd is used in virtio-ccw, virtio-mmio, and
virtio-pci. The second one is related to KVM only, right?
No, it's used for TCG as well (with ARM "-M virt" or x86 "-M microvm").
Paolo
And the first one should be updat
Acked-by: Damien Hedde
On 2/11/21 9:53 AM, Luc Michel wrote:
> Also add Damien as a reviewer.
>
> Signed-off-by: Luc Michel
> ---
> MAINTAINERS | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e6f1eca30f..67ad14ce14 100644
> --- a/MAINTAI
* Connor Kuehl (cku...@redhat.com) wrote:
> On 2/10/21 1:06 PM, James Bottomley wrote:
> > On Wed, 2021-02-10 at 12:46 -0600, Connor Kuehl wrote:
> > > Right, I didn't mean to include cbitpos in consideration for this.
> > > I'm only interested in supplying the session, policy, and certificate
> >
On Wed, Feb 10, 2021 at 02:40:17PM -0800, Doug Evans wrote:
> On Wed, Feb 10, 2021 at 8:49 AM Daniel P. Berrangé
> wrote:
>
> > On Wed, Feb 10, 2021 at 08:31:40AM -0800, Doug Evans wrote:
> > > On Wed, Feb 10, 2021 at 1:31 AM Daniel P. Berrangé
> > > wrote:
> > >
> > > > On Tue, Feb 09, 2021 at
Thomas Huth writes:
> Since Travis changed their policies, travis-ci.org will soon become
> completely useless for the QEMU project. We should now really make sure
> that we move the remaining tests as good as possible to the gitlab-CI
> instead.
Queued to testing/next, thanks.
--
Alex Benné
On Thu, Feb 11, 2021 at 09:30:53AM +0100, Vitaly Kuznetsov wrote:
> Eduardo Habkost writes:
>
> > On Wed, Feb 10, 2021 at 04:56:06PM +, Daniel P. Berrangé wrote:
> >> On Wed, Feb 10, 2021 at 05:40:12PM +0100, Vitaly Kuznetsov wrote:
> >> > Changes since v3:
> >> > - Make 'hv-default' override
Daniel P. Berrangé writes:
> On Thu, Feb 11, 2021 at 09:30:53AM +0100, Vitaly Kuznetsov wrote:
>> Eduardo Habkost writes:
>>
>> > On Wed, Feb 10, 2021 at 04:56:06PM +, Daniel P. Berrangé wrote:
>> >> On Wed, Feb 10, 2021 at 05:40:12PM +0100, Vitaly Kuznetsov wrote:
>> >> > Changes since v3:
On 09.02.2021 23:31, Peter Xu wrote:
On Tue, Feb 09, 2021 at 03:09:28PM -0500, Peter Xu wrote:
Hi, David, Andrey,
On Tue, Feb 09, 2021 at 08:06:58PM +0100, David Hildenbrand wrote:
Hi,
just stumbled over this, quick question:
I recently played with UFFD_WP and notices that write protection i
10.02.2021 18:07, Kevin Wolf wrote:
Am 27.11.2020 um 15:45 hat Vladimir Sementsov-Ogievskiy geschrieben:
Now, bdrv_node_check_perm() is called only with fresh cumulative
permissions, so its actually "refresh_perm".
Move permission calculation to the function. Also, drop unreachable
error messag
Hi Klaus,
On 09.02.21 08:30, Klaus Jensen wrote:
From: Minwoo Im
In NVMe, namespace is being attached to process I/O. We register NVMe
namespace to a controller via nvme_register_namespace() during
nvme_ns_setup(). This is main reason of receiving NvmeCtrl object
instance to this function to
On 2/11/21 9:53 AM, Luc Michel wrote:
[if possible duplicate subject line]
> Also add Damien as a reviewer.
>
> Signed-off-by: Luc Michel
Thanks guys for stepping in!
Reviewed-by: Philippe Mathieu-Daudé
> ---
> MAINTAINERS | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --gi
On 2/11/21 5:54 AM, Thomas Huth wrote:
> Use clang-10, so we can also use the --enable-tsan configure
> option instead of only passing the flag via --extra-cflags.
Maybe worth commenting the new job is now restricted to a subset
of targets, but linux-user is also covered?
> Reviewed-by: Alex Benn
On Tue, Feb 09, 2021 at 07:02:01PM +, Dr. David Alan Gilbert (git) wrote:
> +static uint64_t vhost_user_slave_handle_vring_host_notifier(
> +struct vhost_dev *dev,
> + VhostUserVringArea *area,
> + int fd)
Indentation looks off. Only worth changing i
* Klaus Jensen (i...@irrelevant.dk) wrote:
> On Feb 11 04:52, Minwoo Im wrote:
> > nvme_inject_state command is to give a controller state to be.
> > Human Monitor Interface(HMP) supports users to make controller to a
> > specified state of:
> >
> > normal: Normal state (no inj
Hi Richard,
thank you for your feedback.
> From: Richard Henderson
> Sent: Wednesday, February 10, 2021 20:02
> To: David Brenken
> On 2/10/21 12:26 AM, David Brenken wrote:
> > From: Andreas Konopik
> >
> > Hello together,
> >
> > we have fixed a few conditions leading to incorrect intermedi
On Tue, Feb 09, 2021 at 07:02:02PM +, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Route the uint64 payload from message replies on the slave back up
> through vu_process_message_reply and to the callers.
>
> Signed-off-by: Dr. David Alan Gilbert
> ---
> subproj
On 2/11/21 8:53 AM, Mark Cave-Ayland wrote:
> On 10/02/2021 22:33, Philippe Mathieu-Daudé wrote:
>
>> On 2/9/21 8:29 PM, Mark Cave-Ayland wrote:
>>> This simplifies reading the STC register value without having to
>>> manually shift
>>> each individual 8-bit value.
>>
>> If possible repeat the sub
On Wed, Feb 3, 2021 at 9:40 PM Cleber Rosa wrote:
>
> Currently the path of the ssh public key is being set, but its
> content is obviously what's needed.
>
> Signed-off-by: Cleber Rosa
Reviewed-by: Marc-André Lureau
> ---
> tests/acceptance/avocado_qemu/__init__.py | 4 +++-
> 1 file changed
Hi,
> I notice that as well as handling surface_bits_per_pixel()
> possibly returning 8, 15, 16, 24, these devices also seem to
> check for the possibility it returns 0 (presumably meaning
> "no surface" or "no surface yet" ?).
Depends a bit on how the surface is created.
When using host memor
On 2/11/21 9:01 AM, Mark Cave-Ayland wrote:
> On 10/02/2021 22:51, Philippe Mathieu-Daudé wrote:
>
>> Hi Mark,
>>
>> On 2/9/21 8:29 PM, Mark Cave-Ayland wrote:
>>> Signed-off-by: Mark Cave-Ayland
>>> ---
>>> hw/scsi/esp.c | 28
>>> 1 file changed, 20 insertions(+),
On Tue, Feb 09, 2021 at 07:02:03PM +, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Allow a daemon implemented with libvhost-user to accept an
> element with pointers to memory that aren't in the mapping table.
> The daemon might have some special way to deal with s
On 2/10/21 11:10 PM, Alex Bennée wrote:
> From: Richard Henderson
>
> This also means we don't need an extra declaration of
> the structure in hw/core/cpu.h.
>
> Signed-off-by: Richard Henderson
> Signed-off-by: Alex Bennée
> Reviewed-by: Alex Bennée
> Message-Id: <20210208233906.479571-2-ric
On 2/10/21 11:10 PM, Alex Bennée wrote:
> From: Richard Henderson
>
> Move the code from accel/tcg/translate-all.c to target/mips/cpu.c.
>
> Signed-off-by: Richard Henderson
> Signed-off-by: Alex Bennée
> Reviewed-by: Alex Bennée
> Message-Id: <20210208233906.479571-4-richard.hender...@linaro
On 2/10/21 5:28 PM, Alex Bennée wrote:
>
> Claudio Fontana writes:
>
> s/btp/bpt/ in subject line...
>
>> Signed-off-by: Claudio Fontana
>> ---
>> target/i386/tcg/helper-tcg.h | 3 +
>> target/i386/tcg/bpt_helper.c | 275 -
>> target/i386/tcg/
On 13:20 Tue 09 Feb , Peter Maydell wrote:
> The Clock framework allows users to specify a callback which is
> called after the clock's period has been updated. Some users need to
> also have a callback which is called before the clock period is
> updated.
>
> As the first step in adding supp
On 13:20 Tue 09 Feb , Peter Maydell wrote:
> Add a clock_ns_to_ticks() function which does the opposite of
> clock_ticks_to_ns(): given a duration in nanoseconds, it returns the
> number of clock ticks that would happen in that time. This is useful
> for devices that have a free running counte
On 13:20 Tue 09 Feb , Peter Maydell wrote:
> Add a new callback event type ClockPreUpdate, which is called on
> period changes before the period is updated.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Luc Michel
> ---
> docs/devel/clocks.rst | 9 -
> include/hw/clock.h| 1 +
On Tue, Feb 09, 2021 at 07:02:05PM +, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG'
> and the data structure 'virtio_pci_cap64' to go with it.
> They allow defining shared memory regions with sizes and
On Wed, Feb 3, 2021 at 9:47 PM Cleber Rosa wrote:
>
> Signed-off-by: Cleber Rosa
Reviewed-by: Marc-André Lureau
> ---
> docs/devel/testing.rst | 26 ++
> 1 file changed, 26 insertions(+)
>
> diff --git a/docs/devel/testing.rst b/docs/devel/testing.rst
> index 209f9d817
On Thu, Feb 11, 2021 at 10:34:15AM +0100, Vitaly Kuznetsov wrote:
> Daniel P. Berrangé writes:
>
> > On Thu, Feb 11, 2021 at 09:30:53AM +0100, Vitaly Kuznetsov wrote:
> >> Eduardo Habkost writes:
> >>
> >> > On Wed, Feb 10, 2021 at 04:56:06PM +, Daniel P. Berrangé wrote:
> >> >> On Wed, Feb
On 2/10/21 11:10 PM, Alex Bennée wrote:
> From: Richard Henderson
>
> Create a hook in which to split out the mips and
> sh4 ifdefs from cpu_io_recompile.
>
> [AJB: s/stoped/stopped/]
>
> Signed-off-by: Richard Henderson
> Signed-off-by: Alex Bennée
> Reviewed-by: Alex Bennée
> Message-Id: <
On 2/10/21 11:10 PM, Alex Bennée wrote:
> The insn plugin has a simple heuristic to detect if an instruction is
> detected running twice in a row. Check the plugin log after the run
> and pass accordingly.
>
> Signed-off-by: Alex Bennée
> Message-Id: <20210209182749.31323-13-alex.ben...@linaro.or
Hi
On Wed, Feb 3, 2021 at 10:07 PM Cleber Rosa wrote:
>
> It's questionable wether it's necessary to create one brand new pair
whether
> for each test. It's not questionable that it takes less time and
> resources to just use the keys available at "tests/keys" that exist
> for that exact reaso
On Wed, Feb 3, 2021 at 9:51 PM Cleber Rosa wrote:
>
> Even though there are qtest based tests for hotplugging CPUs (from
> which this test took some inspiration from), this one adds checks
> from a Linux guest point of view.
>
> It should also serve as an example for tests that follow a similar
>
On 2/10/21 11:10 PM, Alex Bennée wrote:
> From: Richard Henderson
>
> Move the code from accel/tcg/translate-all.c to target/sh4/cpu.c.
>
> Signed-off-by: Richard Henderson
> Signed-off-by: Alex Bennée
> Reviewed-by: Alex Bennée
> Message-Id: <20210208233906.479571-5-richard.hender...@linaro.
Philippe Mathieu-Daudé writes:
> On 2/10/21 11:10 PM, Alex Bennée wrote:
>> From: Richard Henderson
>>
>> This also means we don't need an extra declaration of
>> the structure in hw/core/cpu.h.
>>
>> Signed-off-by: Richard Henderson
>> Signed-off-by: Alex Bennée
>> Reviewed-by: Alex Benné
On Tue, Feb 09, 2021 at 07:02:04PM +, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Add virtio-fs definitions to libvhost-user
>
> Signed-off-by: Dr. David Alan Gilbert
> ---
> subprojects/libvhost-user/libvhost-user.c | 41 +++
> subprojects/
On Tue, Feb 09, 2021 at 07:02:06PM +, Dr. David Alan Gilbert (git) wrote:
> @@ -46,6 +51,26 @@ static void vhost_user_fs_pci_realize(VirtIOPCIProxy
> *vpci_dev, Error **errp)
> }
>
> qdev_realize(vdev, BUS(&vpci_dev->bus), errp);
> +cachesize = dev->vdev.conf.cache_size;
> +
>
On 13:20 Tue 09 Feb , Peter Maydell wrote:
> Use the new clock_ns_to_ticks() function in npcm7xx_timer where
> appropriate.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Luc Michel
> ---
> hw/timer/npcm7xx_timer.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
Hi Alex,
On 2/10/21 11:10 PM, Alex Bennée wrote:
> When we exit a block under icount with instructions left to execute we
> might need a shorter than normal block to take us to the next
> deterministic event. Instead of creating a throwaway block on demand
> we use the existing compile flags mecha
Philippe Mathieu-Daudé writes:
> Travis-CI seems to have enforced memory limit on containers,
> and the 'GCC check-tcg' job started to fail on AArch64 [*]:
>
> [2041/3679] Compiling C++ object libcommon.fa.p/disas_nanomips.cpp.o
> FAILED: libcommon.fa.p/disas_nanomips.cpp.o
> {standard in
On Tue, Feb 09, 2021 at 07:02:07PM +, Dr. David Alan Gilbert (git) wrote:
> diff --git a/docs/interop/vhost-user.rst b/docs/interop/vhost-user.rst
> index d6085f7045..1deedd3407 100644
> --- a/docs/interop/vhost-user.rst
> +++ b/docs/interop/vhost-user.rst
> @@ -1432,6 +1432,26 @@ Slave message
On 2/10/21 11:10 PM, Alex Bennée wrote:
> This is just a simple test to count the instructions executed by a
> kernel. However a later test will detect a failure condition when
> icount is enabled.
>
> Signed-off-by: Alex Bennée
> Message-Id: <20210209182749.31323-7-alex.ben...@linaro.org>
> ---
On 2/11/21 11:07 AM, Claudio Fontana wrote:
> On 2/10/21 5:28 PM, Alex Bennée wrote:
>>
>> Claudio Fontana writes:
>>
>> s/btp/bpt/ in subject line...
>>
>>> Signed-off-by: Claudio Fontana
>>> ---
>>> target/i386/tcg/helper-tcg.h | 3 +
>>> target/i386/tcg/bpt_helper.c
On Feb 11 10:53, Alexander Graf wrote:
> Hi Klaus,
>
> On 09.02.21 08:30, Klaus Jensen wrote:
> > From: Minwoo Im
> >
> > In NVMe, namespace is being attached to process I/O. We register NVMe
> > namespace to a controller via nvme_register_namespace() during
> > nvme_ns_setup(). This is main r
Hi
On Wed, Feb 3, 2021 at 9:41 PM Cleber Rosa wrote:
>
> This is intende to be replaced by a bump to Avocado 85.0, to be
> released by Feb 8 2021.
>
> Latest master contains an improvement to "avocado.utils.vmimage" that
> let's it download older Fedora images from the archive locations.
> That a
On Wed, 10 Feb 2021 at 00:02, Richard Henderson
wrote:
>
> Changes for v6:
> * Drop the change to probe_access. The cpu_untagged_addr function
> isn't correct, since that's specifically for syscalls. The uses
> of probe_access in target/arm/ are already done with clean addresses.
> *
On Thu, 11 Feb 2021 at 10:12, Gerd Hoffmann wrote:
> > I notice that as well as handling surface_bits_per_pixel()
> > possibly returning 8, 15, 16, 24, these devices also seem to
> > check for the possibility it returns 0 (presumably meaning
> > "no surface" or "no surface yet" ?).
>
> Depends a b
Hi,
I got the following error with the or1k_sim image
(acceptance-system-centos job):
https://gitlab.com/philmd/qemu/-/jobs/1022309593
(09/55) tests/acceptance:BootLinuxConsole.test_or1k_sim: INTERRUPTED
22:50:22 DEBUG| CPU: OpenRISC-13 (revision 8) @20 MHz
...
22:50:23 DEBUG| console [ttyS0] en
From: Klaus Jensen
Moving namespace registration to the nvme-ns realization function had
the unintended side-effect of breaking legacy namespace registration.
Fix this.
Fixes: 15d024d4aa9b ("hw/block/nvme: split setup and register for namespace")
Reported-by: Alexander Graf
Cc: Minwoo Im
Signe
On Tue, Feb 09, 2021 at 07:02:08PM +, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Fill in definitions for map, unmap and sync commands.
>
> Signed-off-by: Dr. David Alan Gilbert
> with fix by misono.tomoh...@fujitsu.com
> ---
> hw/virtio/vhost-user-fs.c | 115 +
Patchew URL:
https://patchew.org/QEMU/1612923021-19746-1-git-send-email-bmeng...@gmail.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1612923021-19746-1-git-send-email-bmeng...@gmail.com
Subject: [PATCH v3] hw/net
Patchew URL:
https://patchew.org/QEMU/2021021223.884088-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 2021021223.884088-1-richard.hender...@linaro.org
Subject: [PATCH v6 00/31]
Patchew URL: https://patchew.org/QEMU/20210210152859.25920-1-cfont...@suse.de/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210210152859.25920-1-cfont...@suse.de
Subject: [RFC v17 00/14] i386 cleanup PART 2
=== TES
Patchew URL:
https://patchew.org/QEMU/20210209153757.1653598-1-epere...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210209153757.1653598-1-epere...@redhat.com
Subject: [RFC v2 0/7] vDPA shadow virtqueu
Patchew URL: https://patchew.org/QEMU/20210210174122.410690-1-muell...@fb.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210210174122.410690-1-muell...@fb.com
Subject: [PATCH v2] target/arm: Correctly initialize
Patchew URL: https://patchew.org/QEMU/20210210234334.3750022-1-f4...@amsat.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210210234334.3750022-1-f4...@amsat.org
Subject: [RFC PATCH] target/mips/cp0_timer: Use new
Patchew URL:
https://patchew.org/QEMU/1612925152-20913-1-git-send-email-bmeng...@gmail.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1612925152-20913-1-git-send-email-bmeng...@gmail.com
Subject: [PATCH v2] target
Patchew URL:
https://patchew.org/QEMU/20210209182749.31323-1-alex.ben...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210209182749.31323-1-alex.ben...@linaro.org
Subject: [PATCH v1 00/12] fix plugins d
On 09/02/21 18:58, Daniel P. Berrangé wrote:
On Tue, Feb 09, 2021 at 06:45:41PM +0100, Paolo Bonzini wrote:
Adjust the timeouts for the longest running tests. These are the
times that I measured and the corresponding timeouts. For generic
qtests, the target that reported the longest runtime is
Patchew URL:
https://patchew.org/QEMU/20210210082650.5516-1-david.bren...@efs-auto.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210210082650.5516-1-david.bren...@efs-auto.org
Subject: [PATCH 0/1] tricore: fixe
On 2/11/21 12:25 PM, no-re...@patchew.org wrote:
> Patchew URL:
> https://patchew.org/QEMU/20210210234334.3750022-1-f4...@amsat.org/
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Type: series
> Message-id: 20210210234334.375
On Tue, 9 Feb 2021 at 01:55, Doug Evans wrote:
>
> This is a 10/100 ethernet device that has several features.
> Only the ones needed by the Linux driver have been implemented.
> See npcm7xx_emc.c for a list of unimplemented features.
>
> Doug Evans (3):
> hw/net: Add npcm7xx emc model
> hw/ar
On Wed, 10 Feb 2021 at 14:20, Edgar E. Iglesias
wrote:
>
> From: "Edgar E. Iglesias"
>
> This is a minor clean-up making it a little easier to play around
> with different CPU configurations.
>
> Cheers,
> Edgar
>
> Edgar E. Iglesias (1):
> hw/arm: versal: Use nr_apu_cpus in favor of hard codin
On Wed, 10 Feb 2021 at 18:05, Daniel Müller via wrote:
>
> When working with performance monitoring counters, we look at
> MDCR_EL2.HPMN as part of the check whether a counter is enabled. This
> check fails, because MDCR_EL2.HPMN is reset to 0, meaning that no
> counters are "enabled" for < EL2.
>
On 11/02/21 09:58, Alex Bennée wrote:
virtio devices support separate iothreads waiting for
events from file descriptors. These are asynchronous
events that can't be recorded and replayed, therefore
this patch disables ioeventfd for all devices when
record or replay is enabled.
Does it always ha
On 2/11/21 10:53 AM, Alexander Graf wrote:
> Hi Klaus,
>
> On 09.02.21 08:30, Klaus Jensen wrote:
>> From: Minwoo Im
>>
>> In NVMe, namespace is being attached to process I/O. We register NVMe
>> namespace to a controller via nvme_register_namespace() during
>> nvme_ns_setup(). This is main rea
On Feb 11 12:40, Philippe Mathieu-Daudé wrote:
> On 2/11/21 10:53 AM, Alexander Graf wrote:
> > Hi Klaus,
> >
> > On 09.02.21 08:30, Klaus Jensen wrote:
> >> From: Minwoo Im
> >>
> >> In NVMe, namespace is being attached to process I/O. We register NVMe
> >> namespace to a controller via nvme_re
On 2/11/21 11:39 AM, Philippe Mathieu-Daudé wrote:
> On 2/11/21 11:07 AM, Claudio Fontana wrote:
>> On 2/10/21 5:28 PM, Alex Bennée wrote:
>>>
>>> Claudio Fontana writes:
>>>
>>> s/btp/bpt/ in subject line...
>>>
Signed-off-by: Claudio Fontana
---
target/i386/tcg/helper-tcg.h
From: Andreas Konopik
Hello together,
we have fixed a few conditions leading to incorrect intermediate code
generation.
Andreas Konopik (1):
tricore: fixed faulty conditions for extr and imask
target/tricore/translate.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
--
2.30
From: Andreas Konopik
Signed-off-by: Andreas Konopik
Signed-off-by: Georg Hofstetter
Signed-off-by: David Brenken
---
target/tricore/translate.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 7752630ac1
On Feb 11 11:49, Minwoo Im wrote:
> On 21-01-27 14:15:05, Klaus Jensen wrote:
> > From: Klaus Jensen
> >
> > For most commands, when issuing an AIO, the BlockAIOCB is stored in the
> > NvmeRequest aiocb pointer when the AIO is issued. The purpose of storing
> > this is to allow the AIO to be canc
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