> From: Peter Xu
> Sent: Friday, February 5, 2021 11:31 PM
>
> > >
> > >
> > >> or virtio-iommu
> > >> since dev-iotlb (or PCIe ATS)
> > >
> > >
> > > We may need to add this in the future.
> > added Jean-Philippe in CC
>
> So that's the part I'm unsure about.. Since everybody is cced so maybe g
Am 07.02.21 um 04:45 schrieb Richard Henderson:
On 2/6/21 11:38 AM, Stefan Weil wrote:
I am still searching what caused this detoriation. My first suspect was thread
local storage, but that wasn't it. Do you have any idea?
No, but since it's 1/3 of a complete patch set, I don't care to investi
Travis-CI seems to have enforced memory limit on containers,
and the 'GCC check-tcg' job started to fail on AArch64 [*]:
[2041/3679] Compiling C++ object libcommon.fa.p/disas_nanomips.cpp.o
FAILED: libcommon.fa.p/disas_nanomips.cpp.o
{standard input}: Assembler messages:
{standard input}:5
This patch adds 7 more model-specific registers to be usable while remote
debugging in gdb. Accessing these registers can for example be useful for
tracing Linux Systemcalls.
Signed-off-by: Dominik Glöß
---
Adding registers to GDB like this works fine for now. Should there
arise the need to add
Hi qemu developer,
I have a question that does qume support cname as host to attach rbd device?
When I want to do that, it return a error:
/# virsh attach-device virtlet-228fa0ac-d53a-tess-node-c7nww disk_vde.yaml
error: Failed to attach device from disk_vde.yaml
error: internal error: unable to ex
Hi, Kevin,
On Sun, Feb 07, 2021 at 09:04:55AM +, Tian, Kevin wrote:
> > From: Peter Xu
> > Sent: Friday, February 5, 2021 11:31 PM
> >
> > > >
> > > >
> > > >> or virtio-iommu
> > > >> since dev-iotlb (or PCIe ATS)
> > > >
> > > >
> > > > We may need to add this in the future.
> > > added Jea
At present when building qemu-ppce500 the following warnings are seen:
= WARNING ==
This board does not use CONFIG_DM. CONFIG_DM will be
compulsory starting with the v2020.01 release.
Failure to update may result in board removal.
UPD include/generated
On Fri, Feb 05, 2021 at 04:08:26PM -0500, Programmingkid wrote:
>
>
> > On Feb 5, 2021, at 3:49 PM, Michael S. Tsirkin wrote:
> >
> > On Fri, Feb 05, 2021 at 03:25:00PM -0500, Programmingkid wrote:
> >> Hi, I'm noticing that my Windows XP Service Pack 3 VM is causing
> >> qemu-system-i386 to e
Hi Peter,
On Sat, Feb 6, 2021 at 11:28 PM Peter Maydell wrote:
>
> On Sat, 6 Feb 2021 at 14:38, Bin Meng wrote:
> >
> > From: Xuzhou Cheng
> >
> > ZynqMP QSPI supports SPI transfer using DMA mode, but currently this
> > is unimplemented. When QSPI is programmed to use DMA mode, QEMU will
> > cr
Hello Everyone,
So here is v4.
Regards,
Lukas Straub
Changes:
v4:
-use new yank api that finally has been merged
-cleanup the test a bit by using numbers instead of "hosta" and "hostb"
-resource-agent: Don't set master-score to 0 on invalid configuration
v3:
-resource-agent: Don't determine
This introduces a generic function to pick qemu utility binaries
from the build dir, system or via test parameter.
Signed-off-by: Lukas Straub
---
tests/acceptance/avocado_qemu/__init__.py | 15 +++
1 file changed, 15 insertions(+)
diff --git a/tests/acceptance/avocado_qemu/__init__
Optionally install the resouce-agent so it gets picked up by
pacemaker.
Signed-off-by: Lukas Straub
---
configure | 7 +++
meson.build | 5 +
meson_options.txt | 2 ++
3 files changed, 14 insertions(+)
diff --git a/configure b/configure
index a34f91171d..54fc7e533f 100755
Replace duplicate code with pick_qemu_util.
Signed-off-by: Lukas Straub
---
tests/acceptance/boot_linux.py | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/tests/acceptance/boot_linux.py b/tests/acceptance/boot_linux.py
index 1da4a53d6a..38029f8c70 100644
--- a/tes
Add high-level test relying on the colo resource-agent to test
all failover cases while checking guest network connectivity.
Signed-off-by: Lukas Straub
---
scripts/colo-resource-agent/crm_master | 44 ++
scripts/colo-resource-agent/crm_resource | 12 +
tests/acceptance/colo.py
Introduce a resource agent which can be used to manage qemu COLO
in a pacemaker cluster.
Signed-off-by: Lukas Straub
---
scripts/colo-resource-agent/colo | 1527 ++
1 file changed, 1527 insertions(+)
create mode 100755 scripts/colo-resource-agent/colo
diff --git a/s
Signed-off-by: Lukas Straub
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8d8b0bf966..d04567aa4d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2773,6 +2773,12 @@ F: net/colo*
F: net/filter-rewriter.c
F: net/filter-mirror.c
+COLO reso
Am 04.02.21 um 02:44 schrieb Richard Henderson:
This requires adjusting where arguments are stored.
Place them on the stack at left-aligned positions.
Adjust the stack frame to be at entirely positive offsets.
Signed-off-by: Richard Henderson
---
[...]
diff --git a/tcg/tci.c b/tcg/tci.c
inde
Hello all,
I am Niteesh, a junior student(3rd year) pursuing Electronics and
Communication
engineering. I was also a GSoC student for RTEMS last year. My main area of
interest is low-level development (OS, Emulators, Hardware design, etc).
I wanted to start contributing from last year itself but
On 10/22/20 2:08 PM, Peter Maydell wrote:
> Commit ef96e3ae9698d6 in January 2019 removed the last user of the
> VMSTATE_FLOAT64* macros. These were used by targets which defined
> their floating point register file as an array of 'float64'.
Similar candidate: VMSTATE_CPUDOUBLE_ARRAY()
> We used
On 2/7/21 8:25 AM, Stefan Weil wrote:
>> +#include "qemu-common.h"
>> +#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */
>> +#include "exec/cpu_ldst.h"
>> +#include "tcg/tcg-op.h"
>> +#include "qemu/compiler.h"
>> +#include
>> +
>
>
> ffi.h is not found on macOS with Homebrew.
>
> This c
"Michael S. Tsirkin" writes:
>
>
> I queued this but there's a lot of code duplication with this.
> Further, the use of g_strdup adds unnecessary dynamic memory
> management where it's not needed.
> I'd prefer
> - a new struct AcpiBuildOem including the correct strings
> - use sizeof of field
The more I look at this, the more I think it may be a macOS bug
underneath.
I've tested OpenBSD as a guest on a Debian AWS instance running 4.2.1 - all is
fine.
I've tested OpenBSD as a guest on a FreeBSD AWS instance running whatever is in
ports and all is fine.
Also others are having trouble:
On 2/7/21 2:50 AM, Stefan Weil wrote:
> Your latest code from the rth7680/tci-next branch is twice as fast as my code
> with BIOS boot and qemu-x86_64 on sparc64. That's great.
>
> With that code I don't get any BIOS output at all when running qemu-i386.
> That's not so good.
>
> Did I test the c
On Sun, Feb 07, 2021 at 08:23:33PM +0200, Marian Postevca wrote:
> "Michael S. Tsirkin" writes:
>
> >
> >
> > I queued this but there's a lot of code duplication with this.
> > Further, the use of g_strdup adds unnecessary dynamic memory
> > management where it's not needed.
> > I'd prefer
> > -
On Sun, 7 Feb 2021 at 17:10, Philippe Mathieu-Daudé wrote:
>
> On 10/22/20 2:08 PM, Peter Maydell wrote:
> > Commit ef96e3ae9698d6 in January 2019 removed the last user of the
> > VMSTATE_FLOAT64* macros. These were used by targets which defined
> > their floating point register file as an array o
On Sun, 7 Feb 2021 at 17:41, Richard Henderson
wrote:
>
> On 2/7/21 8:25 AM, Stefan Weil wrote:
> >> +#include "qemu-common.h"
> >> +#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */
> >> +#include "exec/cpu_ldst.h"
> >> +#include "tcg/tcg-op.h"
> >> +#include "qemu/compiler.h"
> >> +#inclu
On 2/7/21 11:52 AM, Peter Maydell wrote:
> On Sun, 7 Feb 2021 at 17:41, Richard Henderson
> wrote:
>>
>> On 2/7/21 8:25 AM, Stefan Weil wrote:
+#include "qemu-common.h"
+#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */
+#include "exec/cpu_ldst.h"
+#include "tcg/tcg-op.h
On 28/01/2021 22:17, Mark Cave-Ayland wrote:
This patchset contains a couple of minor updates to QEMU's Fifo8 implementation
conceived whilst working on the next revision of the ESP series.
Patch 1 has already been reviewed on-list whilst patch 2 adds a new
VMSTATE_FIFO8_TEST macro which is req
On 07.02.21 21:12, Richard Henderson wrote:
> On 2/7/21 11:52 AM, Peter Maydell wrote:
>> On Sun, 7 Feb 2021 at 17:41, Richard Henderson
>> wrote:
>>>
>>> On 2/7/21 8:25 AM, Stefan Weil wrote:
> +#include "qemu-common.h"
> +#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */
> +#i
From: Klaus Jensen
A Write Zeroes commands should not be counted in either the 'Data Units
Written' or in 'Host Write Commands' SMART/Health Information Log page.
Signed-off-by: Klaus Jensen
---
hw/block/nvme.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.
From: Klaus Jensen
Introduce NvmeSg and try to deal with that pesky qsg/iov duality that
haunts all the memory-related functions.
Signed-off-by: Klaus Jensen
---
hw/block/nvme.h | 8 ++-
hw/block/nvme.c | 171
2 files changed, 90 insertions(+)
From: Klaus Jensen
The 'len' member of the nvme_compare_ctx struct is redundant since the
same information is available in the 'iov' member.
Signed-off-by: Klaus Jensen
---
hw/block/nvme.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block
From: Klaus Jensen
Fix missing sign inversion.
Signed-off-by: Klaus Jensen
---
hw/block/nvme.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index e4a01cf9edc5..29902038d618 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -1150,7 +1
From: Klaus Jensen
The nvme_dma function doesn't just do DMA (QEMUSGList-based) memory transfers;
it also handles QEMUIOVector copies.
Introduce the NvmeTxDirection enum and rename to nvme_tx. Remove mapping
of PRPs/SGLs from nvme_tx and instead assert that they have been mapped
previously. This
From: Klaus Jensen
This is RFC v2 of a series that adds support for metadata and end-to-end
data protection.
First, on the subject of metadata, in v1, support was restricted to
extended logical blocks, which was pretty trivial to implement, but
required special initialization and broke DULBE. In
From: Klaus Jensen
Add support for metadata in the form of extended logical blocks as well
as a separate buffer of data. The new `ms` nvme-ns device parameter
specifies the size of metadata per logical block in bytes. The `mset`
nvme-ns device parameter controls whether metadata is transfered as
From: Klaus Jensen
The PRP and SGL mapping functions does not have any particular need for
the entire NvmeRequest as a parameter. Clean it up.
Signed-off-by: Klaus Jensen
---
hw/block/nvme.c | 61 ++-
hw/block/trace-events | 4 +--
2 files changed
From: Klaus Jensen
Add support for namespaces formatted with protection information. The
type of end-to-end data protection (i.e. Type 1, Type 2 or Type 3) is
selected with the `pi` nvme-ns device parameter. If the number of
metadata bytes is larger than 8, the `pil` nvme-ns device parameter may
On 07.02.21 19:37, Richard Henderson wrote:
> On 2/7/21 2:50 AM, Stefan Weil wrote:
>> Your latest code from the rth7680/tci-next branch is twice as fast as my code
>> with BIOS boot and qemu-x86_64 on sparc64. That's great.
>>
>> With that code I don't get any BIOS output at all when running qemu-
The following changes since commit 5b19cb63d9dfda41b412373b8c9fe14641bcab60:
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210205' into
staging (2021-02-05 22:59:12 +)
are available in the Git repository at:
git://github.com/mcayland/qemu.git tags/qemu-spar
Rewrite the existing VMSTATE_FIFO8 macro to use VMSTATE_FIFO8_TEST as per the
standard pattern in include/migration/vmstate.h.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Peter Maydell
Message-Id: <20210128221728.14887-3-mark.cave-ayl...@ilande.co.uk>
---
include/qemu/fifo8.h | 16 ++--
Developer errors are better represented with assert() rather than abort(). Also
improve the strictness of the checks by using range checks within the assert()
rather than converting the existing equality checks to inequality checks.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Claudio Fontana
Re
Hi,
I wondered why changing something in "tcg/tcg.h" would trigger
rebuilding the whole tree and figured the inclusion in
"exec/cpu_ldst.h".
By making tlb_addr_write() static to accel/tcg/cputlb.c we can
remove the "tcg/tcg.h" inclusion and reduce the number of objects
to rebuild.
I added tlb_as
Keep MMU functions in "exec/cpu_ldst.h", and move TLB functions
to "exec/exec-all.h". As tlb_addr_write() is only called in
accel/tcg/cputlb.c, make move it there as a static function.
Doing so we removed the "tcg/tcg.h" dependency on "exec/cpu_ldst.h".
Signed-off-by: Philippe Mathieu-Daudé
---
Commit 14f944063af ("target-m68k: add cas/cas2 ops") introduced
use of typedef/prototypes declared in "tcg/tcg.h" without including
it. This was not a problem because "tcg/tcg.h" is pulled in by
"exec/cpu_ldst.h". To be able to remove this header there, we
first need to include it here in op_helper
Since commit 262a69f4282 ("osdep.h: Prohibit disabling assert()
in supported builds") we can not build QEMU with assert() disabled.
tcg_debug_assert() does nothing until QEMU is configured with
--enable-debug-tcg.
Since there is no obvious logic whether to use tcg_debug_assert()
or assert() for f
Commit 83be6b54123 ("Fix MSA instructions LD. on big endian
host") introduced use of typedef/prototypes declared in "tcg/tcg.h"
without including it. This was not a problem because "tcg/tcg.h" is
pulled in by "exec/cpu_ldst.h". To be able to remove this header
there, we first need to include it her
Commit 3468b59e18b ("tcg: enable multiple TCG contexts in softmmu")
introduced use of typedef/prototypes declared in "tcg/tcg.h" without
including it. This was not a problem because "tcg/tcg.h" is pulled
in by "exec/cpu_ldst.h". To be able to remove this header there, we
first need to include it he
Refactor debug code as tlb_assert_iotlb_entry_for_ptr_present() helper.
Signed-off-by: Philippe Mathieu-Daudé
---
What this code does is out of my league, but refactoring it allow
keeping tlb_addr_write() local to accel/tcg/cputlb.c in the next
patch.
---
include/exec/exec-all.h | 9 +
On 2/7/21 11:57 PM, Philippe Mathieu-Daudé wrote:
> Keep MMU functions in "exec/cpu_ldst.h", and move TLB functions
> to "exec/exec-all.h". As tlb_addr_write() is only called in
> accel/tcg/cputlb.c, make move it there as a static function.
>
> Doing so we removed the "tcg/tcg.h" dependency on "ex
Since v1:
- Do not move tlb_vaddr_to_host()
Hi,
I wondered why changing something in "tcg/tcg.h" would trigger
rebuilding the whole tree and figured the inclusion in
"exec/cpu_ldst.h".
By making tlb_addr_write() static to accel/tcg/cputlb.c we can
remove the "tcg/tcg.h" inclusion and reduce the
Commit 83be6b54123 ("Fix MSA instructions LD. on big endian
host") introduced use of typedef/prototypes declared in "tcg/tcg.h"
without including it. This was not a problem because "tcg/tcg.h" is
pulled in by "exec/cpu_ldst.h". To be able to remove this header
there, we first need to include it her
Commit 14f944063af ("target-m68k: add cas/cas2 ops") introduced
use of typedef/prototypes declared in "tcg/tcg.h" without including
it. This was not a problem because "tcg/tcg.h" is pulled in by
"exec/cpu_ldst.h". To be able to remove this header there, we
first need to include it here in op_helper
Since commit 262a69f4282 ("osdep.h: Prohibit disabling assert()
in supported builds") we can not build QEMU with assert() disabled.
tcg_debug_assert() does nothing until QEMU is configured with
--enable-debug-tcg.
Since there is no obvious logic whether to use tcg_debug_assert()
or assert() for f
Commit 3468b59e18b ("tcg: enable multiple TCG contexts in softmmu")
introduced use of typedef/prototypes declared in "tcg/tcg.h" without
including it. This was not a problem because "tcg/tcg.h" is pulled
in by "exec/cpu_ldst.h". To be able to remove this header there, we
first need to include it he
Refactor debug code as tlb_assert_iotlb_entry_for_ptr_present() helper.
Signed-off-by: Philippe Mathieu-Daudé
---
What this code does is out of my league, but refactoring it allow
keeping tlb_addr_write() local to accel/tcg/cputlb.c in the next
patch.
---
include/exec/exec-all.h | 9 +
Keep MMU functions in "exec/cpu_ldst.h", and move TLB functions
to "exec/exec-all.h". As tlb_addr_write() is only called in
accel/tcg/cputlb.c, make move it there as a static function.
Doing so we removed the "tcg/tcg.h" dependency on "exec/cpu_ldst.h".
Signed-off-by: Philippe Mathieu-Daudé
---
On Tue, 2021-01-26 at 13:15 +0100, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Firstly, if zoned.max_active is non-zero, zoned.max_open must be less
> than or equal to zoned.max_active.
>
> Secondly, if only zones.max_active is set, we have to explicitly set
> zones.max_open or we end up with a
Implicitly and Explicitly Open zones can be closed by Close Zone
management function. This got broken by a recent commit and now such
commands fail with Invalid Zone State Transition status.
Modify nvm_zrm_close() function to make Close Zone work correctly.
Signed-off-by: Dmitry Fomichev
Fixes:
P J P 于2021年2月2日周二 下午9:23写道:
>
> From: Prasad J Pandit
>
> While processing SCSI i/o requests in mptsas_process_scsi_io_request(),
> the Megaraid emulator appends new MPTSASRequest object 'req' to
> the 's->pending' queue. In case of an error, this same object gets
> dequeued in mptsas_free_reque
Changes since v2:
* 20-something patches are now upstream.
* Increase testing timeout for tci.
* Gitlab testing for tci w/ 32-bit host.
r~
Richard Henderson (70):
gdbstub: Fix handle_query_xfer_auxv
tcg: Split out tcg_raise_tb_overflow
tcg: Manage splitwx in tc_ptr_to_region_tree by
The main problem was that we were treating a guest address
as a host address with a mere cast.
Use the correct interface for accessing guest memory. Do not
allow offset == auxv_len, which would result in an empty packet.
Fixes: 51c623b0de1 ("gdbstub: add support to Xfer:auxv:read: packet")
Signe
Use explicit casts for ext8s opcodes.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 25 -
1 file changed, 4 insertions(+), 21 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index c44a4aec7b..25db479e62 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -57,13 +57,6 @@ static
Use explicit casts for ext16u opcodes, and allow truncation
to happen with the store for st16 opcodes, and with the call
for bswap16 opcodes.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 28 +++-
1 file changed, 7 insertions(+), 21 deletions(-)
diff --git a/tcg/tci.c
Allow other places in tcg to restart with a smaller tb.
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 63a12b197b..bbe3dcee03 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -346,6 +346,12 @@ stati
The use in tcg_tb_lookup is given a random pc that comes from the pc
of a signal handler. Do not assert that the pointer is already within
the code gen buffer at all, much less the writable mirror of it.
Fixes: db0c51a3803
Signed-off-by: Richard Henderson
---
For TCI, this indicates a bug in ha
These operations are always available under different names:
INDEX_op_ext_i32_i64 and INDEX_op_extu_i32_i64, so we remove
no code with the ifdef.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 4
1 file changed, 4 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index cdfd9b7af8..1819652c
Use explicit casts for ext16s opcodes.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 26 --
1 file changed, 4 insertions(+), 22 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 547be0c2f0..d2bfcb3c93 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -57,13 +57,6 @@ stati
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
cases that are identical between 32-bit and 64-bit hosts.
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target.c.inc | 204 ++-
1 file changed, 73 insertions(+), 131 deletions(-)
diff --git a/tcg/tci/tc
Use explicit casts for ext32s opcodes.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 20 ++--
1 file changed, 2 insertions(+), 18 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 72ec63e18e..9c8395397a 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -57,13 +57,6 @@ static tcg_
This includes bswap16 and bswap32.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 22 --
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 1819652c5a..c979215332 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -652,15 +652,15 @@ uintptr_t
Use explicit casts for ext32u opcodes, and allow truncation
to happen for other users.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 122 --
1 file changed, 54 insertions(+), 68 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index d2bfcb3c
Use explicit casts for ext8u opcodes, and allow truncation
to happen with the store for st8 opcodes.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 23 +--
1 file changed, 5 insertions(+), 18 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index fb3c97aaf1..c44a4aec7b 1006
This includes add, sub, mul, and, or, xor.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 83 +--
1 file changed, 25 insertions(+), 58 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 0246e663a3..894e87e1b0 100644
--- a/tcg/tci.c
+++ b/
Begin splitting out functions that do pure argument decode,
without actually loading values from the register set.
This means that decoding need not concern itself between
input and output registers. We can assert that the register
number is in range during decode, so that it is safe to
simply de
This includes ext8s, ext8u, ext16s, ext16u.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 44
1 file changed, 8 insertions(+), 36 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 894e87e1b0..cdfd9b7af8 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@
In all cases restricted to 64-bit hosts, tcg_read_r is
identical. We retain the 64-bit symbol for the single
case of INDEX_op_qemu_st_i64.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 93 +--
1 file changed, 42 insertions(+), 51 deletions(
Signed-off-by: Richard Henderson
---
tcg/tci.c | 29 +
1 file changed, 5 insertions(+), 24 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index c979215332..225cb698e8 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -404,7 +404,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_ex
Signed-off-by: Richard Henderson
---
tcg/tci.c | 154 --
1 file changed, 57 insertions(+), 97 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 0bc5294e8b..1736234bfd 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -191,6 +191,14 @@ static void t
In the next patches, we want to use tci_read_r to return
the raw register number. So rename the existing function,
which returns the register value, to tci_read_rval.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 192 +++---
1 file changed, 96
Signed-off-by: Richard Henderson
---
tcg/tci.c | 67 +--
1 file changed, 31 insertions(+), 36 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index be298ae39d..0bc5294e8b 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -184,6 +184,13 @@ static tcg_ta
Signed-off-by: Richard Henderson
---
tcg/tci.c | 23 +--
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 1736234bfd..86625061f1 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -207,6 +207,15 @@ static void tci_args_rrs(const uint8_t **tb_p
Signed-off-by: Richard Henderson
---
tcg/tci.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 86625061f1..8bc9dd27b0 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -184,6 +184,11 @@ static tcg_target_ulong tci_read_label(const uint8_t
**tb_ptr
Signed-off-by: Richard Henderson
---
tcg/tci.c | 31 ---
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 0301ee63a7..84d77855ee 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -258,6 +258,17 @@ static void tci_args_rc(const uin
Signed-off-by: Richard Henderson
---
tcg/tci.c | 38 +++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 5cc05fa554..92b13829c3 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -452,30 +452,30 @@ uintptr_t QEMU_DISABLE_CFI tc
Signed-off-by: Richard Henderson
---
tcg/tci.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 8bc9dd27b0..692b95b5c2 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -221,6 +221,19 @@ static void tci_args_rrrc(const uint8_t **tb
Signed-off-by: Richard Henderson
---
tcg/tci.c | 52
1 file changed, 32 insertions(+), 20 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 692b95b5c2..1e2f78a9f9 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -212,6 +212,15 @@ static void tci_
We are currently using the "natural" size routine, which
uses 64-bits on a 64-bit host. The TCGMemOpIdx operand
has 11 bits, so we can safely reduce to 32-bits.
Signed-off-by: Richard Henderson
---
tcg/tci.c| 8
tcg/tci/tcg-target.c.inc | 4 ++--
2 files changed, 6 inse
Signed-off-by: Richard Henderson
---
tcg/tci.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 84d77855ee..cb24295cd9 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -237,6 +237,15 @@ static void tci_args_rrrc(const uint8_t **tb_ptr,
}
Do not emit a uint64_t, but a tcg_target_ulong, aka uintptr_t.
This reduces the size of the constant on 32-bit hosts.
The assert for label != NULL has to be removed because that
is a valid value for exit_tb.
Signed-off-by: Richard Henderson
---
tcg/tci.c| 13 -
tcg/tc
Convert to indirect jumps, as it's less complicated.
Then we just have a pointer to the tb address at which
the chain is stored, from which we read.
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target.h | 11 +++
tcg/tci.c| 8 +++-
tcg/tci/tcg-target.c.inc |
This performs the size check while reading the arguments,
which means that we don't have to arrange for it to be
done after the operation. Which tidies all of the branches.
Signed-off-by: Richard Henderson
---
tcg/tci.c | 87 ++-
1 file change
As the only call-clobbered regs for TCI, these should
receive the least priority.
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target.c.inc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index 4dae09deda..53edc50a3b
Signed-off-by: Richard Henderson
---
tcg/tci.c | 38 ++
1 file changed, 22 insertions(+), 16 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 1e2f78a9f9..5cc05fa554 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -121,16 +121,6 @@ static int32_t tci_read_s32(co
Signed-off-by: Richard Henderson
---
tcg/tci.c | 147 ++
1 file changed, 81 insertions(+), 66 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index ddc138359b..a1846825ea 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -66,22 +66,18 @@ tci_write_reg(
This function is unused. It's not even the disassembler,
which is print_insn_tci, located in disas/tci.c.
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target.h | 2 --
tcg/tci/tcg-target.c.inc | 10 --
2 files changed, 12 deletions(-)
diff --git a/tcg/tci/tcg-target.h b/tcg/tc
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target.c.inc | 84 +++-
1 file changed, 39 insertions(+), 45 deletions(-)
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index 050d514853..707f801099 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b
Use the correct set of asserts during code generation.
We do not require the first input to overlap the output;
the existing interpreter already supported that.
Split out tci_args_rrrbb in the translator.
Use the deposit32/64 functions rather than inline expansion.
Signed-off-by: Richard Henderso
Actually print arguments as opposed to simply the opcodes
and, uselessly, the argument counts. Reuse all of the helpers
developed as part of the interpreter.
Signed-off-by: Richard Henderson
---
meson.build | 2 +-
include/tcg/tcg-opc.h | 2 -
disas/tci.c | 61 -
The current setting is much too pessimistic. Indicating only
the one or two registers that are actually assigned after a
call should avoid unnecessary movement between the register
array and the stack array.
Signed-off-by: Richard Henderson
---
tcg/tci/tcg-target.c.inc | 10 --
1 file c
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