On Fri, Jan 15, 2021 at 9:20 AM Jason Wang wrote:
>
>
> On 2021/1/15 上午5:16, Andrew Melnychenko wrote:
> > From: Andrew
> >
> > When RSS is enabled the device tries to load the eBPF program
> > to select RX virtqueue in the TUN. If eBPF can be loaded
> > the RSS will function also with vhost (wor
On 10/01/2021 11.02, Volker Rümelin wrote:
Fill the remaining sample buffer with silence. To fill it with
zeroes is wrong for unsigned samples because this is silence
with a DC bias.
Signed-off-by: Volker Rümelin
---
audio/sdlaudio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
d
>
> If you want to see an example of a branch new vhost-user daemon being
>> built up from scratch see my recent virtio-rpmb series. The first few
>> patches of in-QEMU code will be the same boilerplate either way I think:
>>
>> https://patchew.org/QEMU/20200925125147.26943-1-alex.ben...@linaro.o
On Fri, Jan 15, 2021 at 02:59:02AM +0100, Igor Mammedov wrote:
> On Wed, 13 Jan 2021 07:09:56 -0500
> "Michael S. Tsirkin" wrote:
>
> > On Tue, Dec 22, 2020 at 06:39:29PM -0500, Igor Mammedov wrote:
> > >
> > > Series implements support for 'onboard' naming scheme for network
> > > interfaces (1
On Fri, Jan 15, 2021 at 04:09:36PM +0100, Philippe Mathieu-Daudé wrote:
> This test fails when QEMU is built without the virtio-scsi device,
> restrict it to its availability.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Michael S. Tsirkin
Are you merging this with rest of patchset
The following changes since commit f8e1d8852e393b3fd524fb005e38590063d99bc0:
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20210112-1' into staging (2021-01-12
21:23:25 +)
are available in the Git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git t
From: Laszlo Ersek
virtio-fs qualifies as a bootable device minimally under OVMF, but
currently the necessary "bootindex" property is missing. Add the property.
Expose the property only in the PCI device, for now. There is no boot
support for virtiofs on s390x (ccw) for the time being [1] [2], s
From: Roman Kagan
When the slot is in steady powered-off state and the device is being
removed, there's no need to press the attention button. Nor is it
mandated by the Standard Hot-Plug Controller Specification, Rev. 1.0.
Moreover it confuses the guest, Linux in particular, as it assumes that
From: Jiahui Cen
Acked-by: Igor Mammedov
Signed-off-by: Jiahui Cen
Message-Id: <20210114100643.10617-2-cenjia...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/qtest/bios-tables-test-allowed-diff.h | 5 +
1 file changed, 5 insertions(+)
diff --gi
From: Jiahui Cen
No matter whether the pxb is enabled or not, the CONFIG_PXB macro in test
would keep undefined. And since pxb is now enabled for ARM Virt machine
by default, let's enable pxb unit-test by removing the CONFIG_PXB.
Acked-by: Igor Mammedov
Signed-off-by: Jiahui Cen
Message-Id: <2
From: Jiahui Cen
AML needs Address Translation offset to describe how a bridge translates
addresses accross the bridge when using an address descriptor, and
especially on ARM, the translation offset of pio resource is usually
non zero.
Therefore, it's necessary to pass offset for pio, mmio32, mm
From: Jiahui Cen
Commit fe1127da11 ("unit-test: Add the binary file and clear diff.h") does
not use the up-to-date expected file for pxb for ARM virt.
Fix the expected DSDT.pxb file.
Full diff of changed file disassembly:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
-
From: Jiahui Cen
There may be some differences in pci resource assignment between guest os
and firmware.
Eg. A Bridge with Bus [d2]
-+-[:d2]---01.0-[d3]01.0
where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit, non-pref)
[size=256]
[d3:01.00] is a PCI Device w
From: Jiahui Cen
Exclude the resources of extra root bridges from PCI0's _CRS. Otherwise,
the resource windows would overlap in guest, and the IO resource window
would fail to be registered.
Acked-by: Igor Mammedov
Signed-off-by: Jiahui Cen
Message-Id: <20210114100643.10617-6-cenjia...@huawei.
From: Jiahui Cen
PXB is now supported on ARM, so let's compile for arm_virt machine.
Acked-by: Igor Mammedov
Signed-off-by: Jiahui Cen
Message-Id: <20210114100643.10617-7-cenjia...@huawei.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/pci-bridge/Kconfig | 2 +-
From: Jiahui Cen
A new _DSM #5 method is added.
Update expected DSDT files accordingly, and re-enable their testing.
Full diff of changed files disassembly:
tests/data/acpi/microvm/DSDT.pcie.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/da
ping
http://patchwork.ozlabs.org/project/qemu-devel/patch/60aa0765-53dd-43d1-a3d2-75f177852...@vodafonemail.de/
Hi!
I’d like to remind you to this trivial patch to get ioclt(…, SIOCGIFCONF, …)
working properly on 64 bit target architectures.
Bye
Stefan
pinghttp://patchwork.ozlabs.org/project/qemu-devel/patch/60aa0765-53dd-43d1-a3d2-75f177852...@vodafonemail.de/
Hi!I’d like to remind you to this trivial patch to get ioclt(…, SIOCGIFCONF, …) working properly on 64 bit target architectures.ByeStefan
Hello,
This patch series introduces NVMe subsystem device to support multi-path
I/O in NVMe device model. Two use-cases are supported along with this
patch: Multi-controller, Namespace Sharing.
V1 RFC has been discussed with Klaus and Keith, I really appreciate them
for this patch series to have
nvme_ns_init_zoned() has no use for given NvmeCtrl object.
Signed-off-by: Minwoo Im
---
hw/block/nvme-ns.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index 274eaf61b721..32662230130b 100644
--- a/hw/block/nvme-ns.c
+++ b/hw/blo
Volatile Write Cache(VWC) feature is set in nvme_ns_setup() in the
initial time. This feature is related to block device backed, but this
feature is controlled in controller level via Set/Get Features command.
This patch removed dependency between nvme and nvme-ns to manage the VWC
flag value.
nvme_ns_setup() finally does not have nothing to do with NvmeCtrl
instance.
Signed-off-by: Minwoo Im
---
hw/block/nvme-ns.c | 4 ++--
hw/block/nvme-ns.h | 2 +-
hw/block/nvme.c| 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index
In NVMe, namespace is being attached to process I/O. We register NVMe
namespace to a controller via nvme_register_namespace() during
nvme_ns_setup(). This is main reason of receiving NvmeCtrl object
instance to this function to map the namespace to a controller.
To make namespace instance more i
To support multi-path in QEMU NVMe device model, We need to have NVMe
subsystem hierarchy to map controllers and namespaces to a NVMe
subsystem.
This patch introduced a simple nvme-subsys device model. The subsystem
will be prepared with subsystem NQN with provided in
nvme-subsys device:
ex)
Removed no longer used aregument NvmeCtrl object in nvme_ns_init_blk().
Signed-off-by: Minwoo Im
---
hw/block/nvme-ns.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/block/nvme-ns.c b/hw/block/nvme-ns.c
index c403cd36b6bd..fc42ae184e01 100644
--- a/hw/block/nvme-ns.c
nvme controller(nvme) can be mapped to a NVMe subsystem(nvme-subsys).
This patch maps a controller to a subsystem by adding a parameter
'subsys' to the nvme device.
To map a controller to a subsystem, we need to put nvme-subsys first and
then maps the subsystem to the controller:
-device nvme-s
Added Controller Multi-path I/O and Namespace Sharing Capabilities
(CMIC) field to support multi-controller in the following patches.
This field is in Identify Controller data structure in [76].
Signed-off-by: Minwoo Im
---
include/block/nvme.h | 4
1 file changed, 4 insertions(+)
diff --
We have nvme-subsys and nvme devices mapped together. To support
multi-controller scheme to this setup, controller identifier(id) has to
be managed. Earlier, cntlid(controller id) used to be always 0 because
we didn't have any subsystem scheme that controller id matters.
This patch introduced 'c
Added Namespace Multi-path I/O and Namespace Sharing Capabilities (NMIC)
field to support shared namespace from controller(s).
This field is in Identify Namespace data structure in [30].
Signed-off-by: Minwoo Im
---
include/block/nvme.h | 4
1 file changed, 4 insertions(+)
diff --git a/in
nvme-ns device is registered to a nvme controller device during the
initialization in nvme_register_namespace() in case that 'bus' property
is given which means it's mapped to a single controller.
This patch introduced a new property 'subsys' just like the controller
device instance did to map a n
When using GCC 10.2 configured with --extra-cflags=-Os, we get:
softmmu/physmem.c: In function ‘address_space_translate_for_iotlb’:
softmmu/physmem.c:643:26: error: ‘notifier’ may be used uninitialized in this
function [-Werror=maybe-uninitialized]
643 | notifier->active = true;
On 15/01/21 08:56, Gan Qixin wrote:
When compiling qemu-fuzz-i386 on aarch64 host, clang reported the following
error:
../util/cacheflush.c:38:44: error: value size does not match register size
specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
asm volatile("mrs\t%0, ct
On Sun, 17 Jan 2021 at 16:07, Philippe Mathieu-Daudé wrote:
>
> When using GCC 10.2 configured with --extra-cflags=-Os, we get:
>
> softmmu/physmem.c: In function ‘address_space_translate_for_iotlb’:
> softmmu/physmem.c:643:26: error: ‘notifier’ may be used uninitialized in
> this function [-
On 02/12/20 10:02, Paolo Bonzini wrote:
This series switches -object, -M and -accel from QemuOpts to keyval.
Monitor commands device_add and netdev_add are also switched to keyval,
though -device and -netdev for now are not.
Along the way, the syntax of keyval and QemuOpts becomes more consisten
Hi,
I've prepared some patches to have KVM-only builds.
Some patches are generic - well kind of, instead they are
TCG specific =) - so I'm sending them as a separate series.
Please review,
Phil.
Philippe Mathieu-Daudé (6):
accel/tcg: Make cpu_gen_init() static
accel/tcg: Restrict tb_flush_j
tb_gen_code() is only called within TCG accelerator,
declare it locally.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/internal.h| 5 +
include/exec/exec-all.h | 5 -
accel/tcg/cpu-exec.c| 1 +
accel/tcg/user-exec.c | 1 +
4 files changed, 7 insertions(+), 5 deletions(-)
Watchpoint funtions use cpu_restore_state() which is only
available when TCG accelerator is built. Restrict them
to TCG.
Signed-off-by: Philippe Mathieu-Daudé
---
RFC because we could keep that code by adding an empty
stub for cpu_restore_state(), but it is unclear as
the function is name
tb_flush_jmp_cache() is only called within TCG accelerator,
declare it locally.
Signed-off-by: Philippe Mathieu-Daudé
---
We could also inline it in cputlb.c, the single user.
---
accel/tcg/internal.h | 16
include/exec/exec-all.h | 3 ---
accel/tcg/cputlb.c| 1
cpu_gen_init() is TCG specific, only used in tcg/translate-all.c.
No need to export it to other accelerators, declare it statically.
Signed-off-by: Philippe Mathieu-Daudé
---
We could also inline the 1-line call..
---
include/exec/exec-all.h | 2 --
accel/tcg/translate-all.c | 2 +-
2 files ch
As cpu_io_recompile() is only called within TCG accelerator
in cputlb.c, declare it locally.
Signed-off-by: Philippe Mathieu-Daudé
---
RFC because not sure if other accelerator could implement this.
---
accel/tcg/internal.h| 2 ++
include/exec/exec-all.h | 1 -
2 files changed, 2 insertions(
On 1/16/21 11:38 PM, Alistair Francis wrote:
> On Sat, Jan 16, 2021 at 2:32 PM Philippe Mathieu-Daudé
> wrote:
>>
>> On 1/16/21 12:00 AM, Alistair Francis wrote:
>>> We were accidently passing RISCVHartArrayState by value instead of
>>> pointer. The type is 824 bytes long so let's correct that an
cpu_loop_exit*() functions are declared in accel/tcg/cpu-exec-common.c,
and are not available when TCG accelerator is not built. Add stubs so
linking without TCG succeed.
Problematic files:
- hw/semihosting/console.c in qemu_semihosting_console_inc()
- hw/ppc/spapr_hcall.c in h_confer()
- hw/s390
On 1/17/21 5:47 PM, Peter Maydell wrote:
> On Sun, 17 Jan 2021 at 16:07, Philippe Mathieu-Daudé wrote:
>>
>> When using GCC 10.2 configured with --extra-cflags=-Os, we get:
>>
>> softmmu/physmem.c: In function ‘address_space_translate_for_iotlb’:
>> softmmu/physmem.c:643:26: error: ‘notifier’
When building with GCC 10.2 configured with --extra-cflags=-Os, we get:
softmmu/physmem.c: In function ‘address_space_translate_for_iotlb’:
softmmu/physmem.c:643:26: error: ‘notifier’ may be used uninitialized in this
function [-Werror=maybe-uninitialized]
643 | notifier->active =
On 7/9/20 9:14 PM, Peter Maydell wrote:
> On Fri, 3 Jul 2020 at 21:19, Philippe Mathieu-Daudé wrote:
>>
>> When built with --enable-qdev-debug, QEMU displays warnings
>> listing devices missing migration state:
>>
>> $ qemu-system-arm -S -M spitz
>> qemu-system-arm: warning: missing migration
On 17/01/21 18:04, Philippe Mathieu-Daudé wrote:
When building with GCC 10.2 configured with --extra-cflags=-Os, we get:
softmmu/physmem.c: In function ‘address_space_translate_for_iotlb’:
softmmu/physmem.c:643:26: error: ‘notifier’ may be used uninitialized in
this function [-Werror=mayb
Public bug reported:
When trying to reproduce a bug someone reported on an actual AMD K10[1], I
tried to directly throw `qemu_x86-64 -cpu
phenom path/to/wrongly-labelled-instruction-set/gcc 1.c` at the problem, but
failed to get an "illegal instruction" as expected. A quick investigation
rev
On 15/01/21 16:09, Philippe Mathieu-Daudé wrote:
|The TPM tests are failing, and no further tests are run, making the
rest of the testsuite pointless:|
Just use -k when running tests, it's a good idea in general.
Paolo
On 11/11/20 10:18 AM, Philippe Mathieu-Daudé wrote:
> On 11/10/20 4:35 PM, Daniel P. Berrangé wrote:
>> On Tue, Nov 10, 2020 at 01:16:06PM +0100, Philippe Mathieu-Daudé wrote:
>>> The EDK2 jobs use the 'changes' keyword, which "makes it
>>> possible to define if a job should be created based on fil
On 1/17/21 7:47 PM, Paolo Bonzini wrote:
> On 15/01/21 16:09, Philippe Mathieu-Daudé wrote:
>> |The TPM tests are failing, and no further tests are run, making the
>> rest of the testsuite pointless:|
>
> Just use -k when running tests, it's a good idea in general.
Yes, this used to be the defaul
Since v1:
- Tried to address Dave and Daniel comments
- Added Peter R-b
- Handle GPEX device
This is a proof-of-concept after chatting with Peter Maydell
on IRC last year.
Introduce the vmstate_no_state_to_migrate structure, and
a reference to it: vmstate_qdev_no_state_to_migrate.
Use this refere
Add vmstate_qdev_no_state_to_migrate, which is simply a
pointer to vmstate_no_state_to_migrate. This way all
qdev devices (including "hw/qdev-core.h") don't have to
include "migration/vmstate.h".
Signed-off-by: Philippe Mathieu-Daudé
---
Unresolved issues:
https://www.mail-archive.com/qemu-devel
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/split-irq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/core/split-irq.c b/hw/core/split-irq.c
index 3b90af2
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/armsse-cpuid.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/misc/armsse-cpuid.c b/hw/misc/armsse-cpuid.c
index d58138dc28c..61251d538b9 1
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Add a more descriptive comment to keep a clear separation
between static property vs runtime changeable.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/intc/arm_gicv2m.c | 2 ++
1 file changed, 2 in
'vmstate_dummy' is special and only used for user-mode. Rename
it to something more specific.
It was introduced restricted to user-mode in commit c71c3e99b8
("Add a vmstate_dummy struct for CONFIG_USER_ONLY") but this
restriction was later removed in commit 6afc14e92ac ("migration:
Fix warning caus
The TYPE_BITBAND device doesn't have fields to migrate.
Be explicit by using vmstate_qdev_no_state_to_migrate.
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
---
v2: Reworded (Peter)
---
hw/arm/armv7m.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/armv7m.c b/hw/a
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/iotkit-sysinfo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/misc/iotkit-sysinfo.c b/hw/misc/iotkit-sysinfo.c
index b2dcfc4376c..8bb9a2e
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/aspeed_soc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 7eefd54ac07..b503d32fef6 100644
---
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Add a more descriptive comment to keep a clear separation
between static property vs runtime changeable.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/cpu/a9mpcore.h | 3 ++-
hw/cpu/a9mpcor
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/nubus/mac-nubus-bridge.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/nubus/mac-nubus-bridge.c b/hw/nubus/mac-nubus-bridge.c
index 7c329300b82
User-mode wants an empty vmstate for the CPUs. We can
use the generic vmstate_no_state_to_migrate object which
is the same.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/core/cpu.h | 2 +-
include/migration/vmstate.h | 3 ---
stubs/vmstate.c | 9 -
3 files change
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/cpu/cluster.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c
index e444b7c29d1..95653a643ad 100644
--- a/hw/cpu
These devices don't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Add a more descriptive comment to keep a clear separation
between static property vs runtime changeable.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/arm/bcm2836.h | 5 +++--
hw/arm/bc
TYPE_GPEX_HOST does not have internal state to migrate.
Its only interesting state is in the GPEXRootState, which
is a TYPE_GPEX_ROOT_DEVICE which migrates itself.
Explicit there is nothing to migrate by using the special
vmstate_qdev_no_state_to_migrate.
Signed-off-by: Philippe Mathieu-Daudé
---
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Add a more descriptive comment to keep a clear separation
between static property vs runtime changeable.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/arm/msf2-soc.h | 11 ++-
hw/ar
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Add a more descriptive comment to keep a clear separation
between static property vs runtime changeable.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/usb/hcd-ohci.h | 2 ++
hw/usb/hcd-ohci.c | 1 +
These devices don't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Add a more descriptive comment to keep a clear separation
between static property vs runtime changeable.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sparc64/sun4u.c | 6 +-
1 file changed, 5
This device doesn't have fields to migrate. Be explicit
by using vmstate_qdev_no_state_to_migrate.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/unimp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/misc/unimp.c b/hw/misc/unimp.c
index 6cfc5727f0b..e5ede95c124 100644
--- a/hw/misc/u
When built with --enable-qdev-debug, QEMU displays warnings
listing devices missing migration state:
$ qemu-system-arm -S -M spitz
qemu-system-arm: warning: missing migration state for type:
'pxa270-c0-arm-cpu'
qemu-system-arm: warning: missing migration state for type: 'serial'
qemu-syst
Add a name and end marker to the vmstate_user_mode_cpu_dummy variable.
Reported-by: Dr. David Alan Gilbert
Signed-off-by: Philippe Mathieu-Daudé
---
stubs/vmstate.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/stubs/vmstate.c b/stubs/vmstate.c
index f561f9f39bd..1d0
Signed-off-by: Alexander Bulekov
---
docs/devel/fuzzing.rst | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/docs/devel/fuzzing.rst b/docs/devel/fuzzing.rst
index 8792358854..b9bb07988b 100644
--- a/docs/devel/fuzzing.rst
+++ b/docs/devel/fuzzing.rst
@@ -119,7 +119,7 @@ Ad
This is useful for building reproducers. Instead checking the code or
the QEMU_FUZZ_ARGS, the arguments are at the top of the crash log.
Signed-off-by: Alexander Bulekov
---
tests/qtest/fuzz/fuzz.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/tests/qtest/fuzz/f
Patch 1 enables generic-fuzzer configs to setup resources (such as temp
directories) at runtime.
Patch 2 adds some documentation about OSS-Fuzz (including the feature
added in Patch 1)
Patch 3 adds two virtio-9p generic-fuzz configs. Once of these configs
leverages the capability added in Patch 1
For some device configurations, it is useful to configure some
resources, and adjust QEMU arguments at runtime, prior to fuzzing. This
patch adds an "argfunc" to generic the generic_fuzz_config. When
specified, it is responsible for configuring the resources and returning
a string containing the co
Signed-off-by: Alexander Bulekov
---
docs/devel/fuzzing.rst | 26 ++
1 file changed, 26 insertions(+)
diff --git a/docs/devel/fuzzing.rst b/docs/devel/fuzzing.rst
index 6096242d99..8792358854 100644
--- a/docs/devel/fuzzing.rst
+++ b/docs/devel/fuzzing.rst
@@ -181,6 +181,
virtio-9p devices are often used to expose a virtual-filesystem to the
guest. There have been some bugs reported in this device, such as
CVE-2018-19364, and CVE-2021-20181. We should fuzz this device
This patch adds two virtio-9p configurations:
* One with the widely used -fsdev local driver. Thi
Fix outdated paths in documentation and log some useful information.
Alexander Bulekov (2):
docs/fuzz: fix pre-meson path
fuzz: log the arguments used to initialize QEMU
docs/devel/fuzzing.rst | 5 ++---
tests/qtest/fuzz/fuzz.c | 11 ++-
2 files changed, 12 insertions(+), 4 deletio
вс, 17 янв. 2021 г., 20:26 Philippe Mathieu-Daudé :
> These devices don't have fields to migrate. Be explicit
> by using vmstate_qdev_no_state_to_migrate.
>
> Add a more descriptive comment to keep a clear separation
> between static property vs runtime changeable.
>
Nice, thanks for this!
> Si
** Changed in: qemu
Status: New => In Progress
** Changed in: qemu
Assignee: (unassigned) => Richard Henderson (rth)
--
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https://bugs.launchpad.net/bugs/1912065
Title:
Segfau
pull-riscv-to-apply-20210117-3
for you to fetch changes up to a8259b53230782f5e0a0d66013655c4ed5d71b7e:
riscv: Pass RISCVHartArrayState by pointer (2021-01-16 14:34:46 -0800)
First RISC-V PR for 6.0
This PR:
- Fixes some issue
From: Atish Patra
Currently, we place the DTB at 2MB from 4GB or end of DRAM which ever is
lesser. However, Linux kernel can address only 1GB of memory for RV32.
Thus, it can not map anything beyond 3GB (assuming 2GB is the starting address).
As a result, it can not process DT and panic if opensb
From: Bin Meng
SIFIVE_U_CPU is conditionally set to SIFIVE_U34 or SIFIVE_U54, hence
there is no need to use #idef to set the mc->default_cpu_type.
Signed-off-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Message-id: 20210109143637.29645-1-bmeng...@gmail.com
Si
From: Bin Meng
When write is disabled, the write to flash should be avoided
in flash_write8().
Fixes: 82a2499011a7 ("m25p80: Initial implementation of SPI flash device")
Signed-off-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Francisco Iglesias
Message-id: 1608688825-81519-1-
From: Xuzhou Cheng
Auto Address Increment (AAI) Word-Program is a special command of
SST flashes. AAI-WP allows multiple bytes of data to be programmed
without re-issuing the next sequential address location.
Signed-off-by: Xuzhou Cheng
Signed-off-by: Bin Meng
Reviewed-by: Francisco Iglesias
From: Sylvain Pelissier
Target description is not currently implemented in RISC-V
architecture. Thus GDB won't set it properly when attached.
The patch implements the target description response.
Signed-off-by: Sylvain Pelissier
Reviewed-by: Bin Meng
Reviewed-by: Alistair Francis
Reviewed-by:
From: Atish Patra
As per the privilege specification, any access from S/U mode should fail
if no pmp region is configured.
Signed-off-by: Atish Patra
Reviewed-by: Alistair Francis
Message-id: 20201223192553.332508-1-atish.pa...@wdc.com
Signed-off-by: Alistair Francis
---
target/riscv/pmp.h
From: Green Wan
Fix code coverage issues by checking return value and handling fail case
of blk_pread() and blk_pwrite(). Return default value 0xff if read fails.
Fixes: Coverity CID 1435959
Fixes: Coverity CID 1435960
Fixes: Coverity CID 1435961
Signed-off-by: Green Wan
Reviewed-by: Alistair F
We were accidently passing RISCVHartArrayState by value instead of
pointer. The type is 824 bytes long so let's correct that and pass it by
pointer instead.
Fixes: Coverity CID 1438099
Fixes: Coverity CID 1438100
Fixes: Coverity CID 1438101
Signed-off-by: Alistair Francis
Reviewed-by: Palmer Dabb
From: Bin Meng
In preparation to generate the CSR register list for GDB stub
dynamically, let's add the CSR name in the CSR function table.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Message-id: 1610427124-49887-3-git-send-email-bmeng...@gmail.com
Signed-off-by: Alistair Francis
--
From: Bin Meng
In preparation to generate the CSR register list for GDB stub
dynamically, change csr_ops[] to non-static so that it can be
referenced externally.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Message-id: 1610427124-49887-2-git-send-email-bmeng...@gmail.com
Signed-off-by
From: Bin Meng
At present QEMU RISC-V uses a hardcoded XML to report the feature
"org.gnu.gdb.riscv.csr" [1]. There are two major issues with the
approach being used currently:
- The XML does not specify the "regnum" field of a CSR entry, hence
consecutive numbers are used by the remote GDB cl
From: Bin Meng
Now that we have switched to generate the RISC-V CSR XML dynamically,
remove the built-in hardcoded XML files.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Message-id: 20210116054123.5457-3-bmeng...@gmail.com
Signed-off-by: Alistair Francis
---
.../targets/riscv32-lin
Hi Jiaxun,
On 1/14/21 2:31 AM, Jiaxun Yang wrote:
> loongson3_virt has KVM SMP support in kenrel.
> This patch adds TCG SMP support by enable IPI controller
> for machine.
>
> Note that TCG SMP can only support up to 4 CPUs as we
> didn't implement multi-node support.
>
> Signed-off-by: Jiaxun Y
On 1/17/21 11:46 PM, Philippe Mathieu-Daudé wrote:
> Hi Jiaxun,
>
> On 1/14/21 2:31 AM, Jiaxun Yang wrote:
>> loongson3_virt has KVM SMP support in kenrel.
>> This patch adds TCG SMP support by enable IPI controller
>> for machine.
>>
>> Note that TCG SMP can only support up to 4 CPUs as we
>> did
Patch 1 enables generic-fuzzer configs to setup resources (such as temp
directories) at runtime.
Patch 2 adds some documentation about OSS-Fuzz (including the feature
added in Patch 1)
Patch 3 adds two virtio-9p generic-fuzz configs. Once of these configs
leverages the capability added in Patch 1
Signed-off-by: Alexander Bulekov
---
docs/devel/fuzzing.rst | 26 ++
1 file changed, 26 insertions(+)
diff --git a/docs/devel/fuzzing.rst b/docs/devel/fuzzing.rst
index 6096242d99..8792358854 100644
--- a/docs/devel/fuzzing.rst
+++ b/docs/devel/fuzzing.rst
@@ -181,6 +181,
For some device configurations, it is useful to configure some
resources, and adjust QEMU arguments at runtime, prior to fuzzing. This
patch adds an "argfunc" to generic the generic_fuzz_config. When
specified, it is responsible for configuring the resources and returning
a string containing the co
virtio-9p devices are often used to expose a virtual-filesystem to the
guest. There have been some bugs reported in this device, such as
CVE-2018-19364, and CVE-2021-20181. We should fuzz this device
This patch adds two virtio-9p configurations:
* One with the widely used -fsdev local driver. Thi
在 2021/1/17 上午2:13, Philippe Mathieu-Daudé 写道:
Similarly to commits ae82adc8e29..7f93879e444, use the
translator_ld*() API introduced in commit 409c1a0bf0f
to fetch the code on the MIPS target.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Jiaxun Yang
---
target/mips/tlb_helper.c |
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