Hi Francisco,
On Sat, Dec 12, 2020 at 12:11 AM Francisco Iglesias
wrote:
>
> Hello Bin,
>
> On [2020 Dec 11] Fri 23:29:16, Bin Meng wrote:
> > Hi Francisco,
> >
> > On Fri, Dec 11, 2020 at 11:16 PM Francisco Iglesias
> > wrote:
> > >
> > > Hello Bin,
> > >
> > > On [2020 Dec 11] Fri 14:07:21, Bi
Hi Philippe,
[ My apologies for the late reply, somehow this thread was treated as spam. ]
On Thu, Nov 19, 2020 at 06:13:20PM +0100, Philippe Mathieu-Daudé wrote:
> Hi Maciej,
>
> On 11/19/20 5:45 PM, Maciej W. Rozycki wrote:
> > On Thu, 19 Nov 2020, Philippe Mathieu-Daudé wrote:
> >
> >> MIPS
From: Marc-André Lureau
Fix linking vhost-user binaries with with ./configure -static.
Fixes: 0df750e9d3a5fea5e1 ("libvhost-user: make it a meson subproject")
Reported-by: Peter Maydell
Signed-off-by: Marc-André Lureau
---
configure | 1 +
subprojects/libvhos
> -Original Message-
> From: Thomas Huth [mailto:th...@redhat.com]
> Sent: Friday, December 11, 2020 11:24 PM
> To: Peter Maydell ; qemu-devel@nongnu.org
> Cc: Chenqun (kuhn) ; Richard Henderson
> ; Paolo Bonzini
> Subject: [PATCH 12/12] configure: Compile with -Wimplicit-fallthrough=2
>
Hi bin,
On [2020 Dec 12] Sat 16:16:59, Bin Meng wrote:
> Hi Francisco,
>
> On Sat, Dec 12, 2020 at 12:11 AM Francisco Iglesias
> wrote:
> >
> > Hello Bin,
> >
> > On [2020 Dec 11] Fri 23:29:16, Bin Meng wrote:
> > > Hi Francisco,
> > >
> > > On Fri, Dec 11, 2020 at 11:16 PM Francisco Iglesias
>
On 12/11/20 9:41 PM, Eduardo Habkost wrote:
> On Fri, Dec 11, 2020 at 09:31:23AM +0100, Claudio Fontana wrote:
>> Signed-off-by: Claudio Fontana
>> Reviewed-by: Alex Bennée
>> ---
>> target/i386/{ => whpx}/whp-dispatch.h | 0
>> target/i386/{ => whpx}/whpx-cpus.h| 0
>> target/i386/{ => whpx
Hi Francisco,
On Sat, Dec 12, 2020 at 5:24 PM Francisco Iglesias
wrote:
>
> Hi bin,
>
> On [2020 Dec 12] Sat 16:16:59, Bin Meng wrote:
> > Hi Francisco,
> >
> > On Sat, Dec 12, 2020 at 12:11 AM Francisco Iglesias
> > wrote:
> > >
> > > Hello Bin,
> > >
> > > On [2020 Dec 11] Fri 23:29:16, Bin Me
On 12/11/20 9:02 PM, Eduardo Habkost wrote:
> On Fri, Dec 11, 2020 at 07:51:54PM +0100, Claudio Fontana wrote:
>> On 12/11/20 7:26 PM, Philippe Mathieu-Daudé wrote:
>>> On 12/11/20 7:22 PM, Richard Henderson wrote:
On 12/11/20 12:15 PM, Claudio Fontana wrote:
> Should I return this file to
On Fri, Nov 13, 2020 at 10:39:42AM +0100, Philippe Mathieu-Daudé wrote:
> On 2/27/19 3:00 PM, Aleksandar Markovic wrote:
> > From: Mateja Marjanovic
> >
> > Set up MMI code to be compiled only for TARGET_MIPS64. This is
> > needed so that GPRs are 64 bit, and combined with MMI registers,
> > they
On Sat, Nov 14, 2020 at 07:23:10PM +0100, Philippe Mathieu-Daudé wrote:
> Hi Fredrik and Aleksandar,
>
> On Fri, Jan 18, 2019 at 6:10 PM Aleksandar Markovic
> wrote:
> >
> > From: Fredrik Noring
> >
> > The 32 R5900 128-bit registers are split into two 64-bit halves:
> > the lower halves are the
On Sat, 12 Dec 2020 at 17:17, BALATON Zoltan wrote:
>
> On Sat, 12 Dec 2020, Peter Maydell wrote:
> > Switch the sam460ex board to directly creating and configuring the
> > UIC, rather than doing it via the old ppcuic_init() helper function.
> >
> > Signed-off-by: Peter Maydell
> > ---
> > hw/ppc
From: Eduardo Habkost
Signed-off-by: Eduardo Habkost
[claudio: wrapped in CONFIG_TCG]
Signed-off-by: Claudio Fontana
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 6 --
accel/tcg/cpu-exec.c
On Sat, 12 Dec 2020 at 17:43, BALATON Zoltan wrote:
> Interestingly the firmware does not use irqs at all, it just polls for
> them it seems. AROS and AmigaOS does seem to break though. With AROS I get
> this exception after your series but it's not very helpful:
> AmigaOS also fails to boot but
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
meson.build | 1 +
target/i386/cpu.h| 2 +-
target/i386/{ => kvm}/hyperv-proto.h | 0
target/i386/{ => kvm}/hyperv.h | 0
target/i386/{ => kvm}/kvm_i386.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
[claudio: moved cc_helper_template.h to tcg/ too]
Signed-off-by: Claudio Fontana
---
target/i386/{ => tcg}/cc_helper_template.h | 0
target/i386/{ => tcg}/bpt_helper.c | 0
target/i386/{ => tcg}/c
move away TCG-only code, make it compile only on TCG.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 8 +
accel/tcg/cpu-exec.c | 28 +
cpu.c | 70 --
On 12/12/20 12:22 AM, Pavel Dovgalyuk wrote:
> However, we can't cache them directly, because hash table can include only one
> block with the specific pc.
That's not true at all.
r~
make it a regular function.
Suggested-by: Richard Henderson
Signed-off-by: Claudio Fontana
---
target/i386/tcg/helper-tcg.h | 15 ++-
target/i386/tcg/misc_helper.c | 13 +
2 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/target/i386/tcg/helper-tcg.h b/ta
Le 07/11/2020 à 00:51, Peter Maydell a écrit :
> This series is 6.0 material really I think. It's a bit of cleanup
> prompted by a Coverity issue, CID 1421883. There are another half
> dozen or so similar issues, where Coverity is complaining that we
> allocate an array of qemu_irqs with qemu_all
From: Eduardo Habkost
Signed-off-by: Eduardo Habkost
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
---
accel/tcg/cpu-exec.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 890b88861a..64cba89356 100644
--- a/ac
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 18 --
hw/mips/jazz.c| 9 +++--
target/alpha/cpu.c| 2 +-
target/arm/cpu.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
target/i386/cpu.h | 1 +
target/i386/cpu-dump.c | 537
target/i386/helper.c| 514 --
target/i386/meson.build | 1
make it consistently SOFTMMU-only.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 17 +++--
target/alpha/cpu.c| 2 +-
target/arm/cpu.c
From: Eduardo Habkost
Signed-off-by: Eduardo Habkost
[claudio: wrapped in CONFIG_TCG]
Signed-off-by: Claudio Fontana
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 9 -
accel/tcg/cputlb.c
Signed-off-by: Claudio Fontana
Reviewed-by: Roman Bolshakov
Reviewed-by: Alex Bennée
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index d643f59e37..da29938c0b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -444,7 +444,6 @@ M: Cameron Esfahani
M:
cc->do_interrupt is in theory a TCG callback used in accel/tcg only,
to prepare the emulated architecture to take an interrupt as defined
in the hardware specifications,
but in reality the _do_interrupt style of functions in targets are
also occasionally reused by KVM to prepare the architecture s
Hello, this is version 12 of the cleanup (PART 1)
The series has been split into two separate parts,
and this is PART 1.
v11 -> v12:
* "cpu: Move synchronize_from_tb() to tcg_ops":
removed review tags, as there is currently a bunch of conflicting
requirements (Eduardo, Richard, Philippe).
From: Eduardo Habkost
The TCG-specific CPU methods will be moved to a separate struct,
to make it easier to move accel-specific code outside generic CPU
code in the future. Start by moving tcg_initialize().
The new CPUClass.tcg_opts field may eventually become a pointer,
but keep it an embedded
for now only TCG is allowed as an accelerator for riscv,
so remove the CONFIG_TCG use.
Signed-off-by: Claudio Fontana
Reviewed-by: Alistair Francis
---
target/riscv/cpu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a52e0ce4
Le 22/10/2020 à 22:29, Laurent Vivier a écrit :
> First patch is a cleanup patch.
>
> The second patch defines the vmstate structure for M68kCPU.
>
> I have tested the migration with my experimental machine virt-m68k.
>
> I didn't check if q800 machine type has all the needed vmstates
> for all
From: Eduardo Habkost
In the previous commits we made cpu_exec_* and debug_excp_handler
optional, so we can now remove these no-op handlers.
Signed-off-by: Eduardo Habkost
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
---
hw/core/cpu.c | 13
ll-request
for you to fetch changes up to ce00ff729ee8461dc94a1593d25ceda65d973d3c:
m68k: fix some comment spelling errors (2020-12-12 18:12:43 +0100)
m68k pull request 20201212
Fix for Coverity CID 1421883
Fix some comment spell
From: Eduardo Habkost
since tcg_cpu_ops.h is only included in cpu.h,
and as a standalone header it is not really useful,
as tcg_cpu_ops.h starts requiring cpu.h defines,
enums, etc, as well as (later on in the series),
additional definitions coming from memattr.h.
Therefore rename it to tcg_cpu_
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
target/i386/{ => whpx}/whp-dispatch.h | 0
target/i386/{ => whpx}/whpx-cpus.h| 0
target/i386/{ => whpx}/whpx-all.c | 0
target/i386/{ => whpx}/whpx-apic.c| 0
target/i386/{ => whpx}/whpx-cpus
On Sat, 12 Dec 2020, Peter Maydell wrote:
This patchseries converts the PPC UIC "Universal Interrupt
Controller" to a QOM device. My main reason for doing it is that
Thanks for doing this clean up.
this fixes a couple of long-standing trivial Coverity issues -- the
current ppcuic_init() func
From: Eduardo Habkost
Signed-off-by: Eduardo Habkost
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 2 --
accel/tcg/cpu-exec.c | 4 ++--
target/arm/cpu.c | 2 +-
target/i386/tcg/tcg-
Hi,
I'm experiencing a lot of choppiness in the video output when I pass
through my USB webcam to the guest using qemu-xhci as follows:
qemu-system-x86_64 -enable-kvm -hda arch-zoom.qcow2 -m 4G -vga virtio
-device qemu-xhci,id=xhci -device
usb-host,bus=xhci.0,hostdevice=/dev/bus/usb/002/004
My w
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
include/hw/core/cpu.h | 2 --
accel/tcg/cpu-exec.c | 4 ++--
target/alpha/cpu.c| 2 +-
target/arm/cpu.c | 4 ++--
target/arm/cpu_tcg.c
From: Eduardo Habkost
Move invocation of CPUClass.cpu_exec_*() to separate helpers,
to make it easier to refactor that code later.
Signed-off-by: Eduardo Habkost
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 23
to do this, we need to take code out of cpu.c and helper.c,
and also move some prototypes from cpu.h, for code that is
needed in tcg/xxx_helper.c, and which in turn is part of the
callbacks registered by the class initialization.
Therefore, do some shuffling of the parts of cpu.h that
are only rel
From: Eduardo Habkost
This will let us simplify the code that initializes CPU class
methods, when we move cpu_exec_*() to a separate struct.
Signed-off-by: Eduardo Habkost
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
---
accel/tcg/cpu-exec.c | 11 ---
1 file changed, 8 ins
Signed-off-by: Laurent Vivier
Message-Id: <20201022203000.1922749-3-laur...@vivier.eu>
---
target/m68k/cpu.h| 1 +
target/m68k/cpu.c| 193 ++-
target/m68k/fpu_helper.c | 10 +-
3 files changed, 198 insertions(+), 6 deletions(-)
diff --git a/
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
target/i386/{ => hax}/hax-cpus.h | 0
target/i386/{ => hax}/hax-i386.h | 6 +++---
target/i386/{ => hax}/hax-interface.h | 0
target/i386/{ => hax}/hax-posix.h | 0
target/i386/{ => hax}/hax
On Fri, Nov 20, 2020 at 10:08:44PM +0100, Philippe Mathieu-Daudé wrote:
> Add an entry for the TCG core related to Toshiba TXx9.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> Adding Fredrik Noring in case he wants to be notified of changes,
> patch conditional to his approval.
I may be able
From: zhaolichang
I found that there are many spelling errors in the comments of qemu/target/m68k.
I used spellcheck to check the spelling errors and found some errors in the
folder.
Signed-off-by: zhaolichang
Reviewed-by: David Edmondson
Reviewed-by: Philippe Mathieu-Daude
Reviewed-by: Laure
On Sat, 12 Dec 2020 at 18:27, BALATON Zoltan wrote:
>
> On Sat, 12 Dec 2020, Peter Maydell wrote:
> > Currently the PPC UIC ("Universal Interrupt Controller") is implemented
> > as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device
> > in hw/intc.
> >
> > The ppcuic_init() functi
On Sat, 12 Dec 2020, Peter Maydell wrote:
Currently the PPC UIC ("Universal Interrupt Controller") is implemented
as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device
in hw/intc.
The ppcuic_init() function is retained for the moment with its current
interface; in subsequent co
From: Peter Maydell
The handling of the GLUE (General Logic Unit) device is
currently open-coded. Make this into a proper QOM device.
This minor piece of modernisation gets rid of the free
floating qemu_irq array 'pic', which Coverity points out
is technically leaked when we exit the machine ini
From: Peter Maydell
The q800 board code connects both of the IRQ outputs of the ESCC
to the same pic[3] qemu_irq. Connecting two qemu_irqs outputs directly
to the same input is not valid as it produces subtly wrong behaviour
(for instance if both the IRQ lines are high, and then one goes
low, the
They are unused since the target has been converted to TCG.
Fixes: e1f3808e03f7 ("Convert m68k target to TCG.")
Signed-off-by: Laurent Vivier
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20201022203000.1922749-2-laur...@vivier.eu>
---
target/m68k/cpu.h | 4
1
Hi
On Fri, Dec 11, 2020 at 5:41 PM Philippe Mathieu-Daudé
wrote:
> On 12/11/20 2:33 PM, Peter Maydell wrote:
> > On Fri, 11 Dec 2020 at 13:13, Philippe Mathieu-Daudé
> wrote:
> >>
> >> Since commit efc6c07 ("configure: Add a test for the minimum compiler
> >> version"), QEMU explicitely depends
Le 09/10/2020 à 08:44, zhaolichang a écrit :
> I found that there are many spelling errors in the comments of
> qemu/target/m68k.
> I used spellcheck to check the spelling errors and found some errors in the
> folder.
>
> Signed-off-by: zhaolichang
> Reviewed-by: David Edmondson
> Reviewed-by:
On Thu, Dec 10, 2020 at 6:14 PM wrote:
> From: Marc-André Lureau
>
> QEMU requires Clang or GCC, that define and support __GNUC__ extensions.
>
> Signed-off-by: Marc-André Lureau
> ---
> include/qemu/compiler.h | 8 +---
> 1 file changed, 1 insertion(+), 7 deletions(-)
>
> diff --git a/inc
On Thu, Nov 19, 2020 at 04:45:29PM +, Maciej W. Rozycki wrote:
> On Thu, 19 Nov 2020, Philippe Mathieu-Daudé wrote:
>
> > MIPS o32 ABI on 64-bit CPUs looks like a ILP32-on-64bit data
> > model, allowing 64-bit arithmetic and data movement instructions.
> >
> > This is the default ABI used by
Hi Laurent,
On Sat, Dec 12, 2020 at 6:11 PM Laurent Vivier wrote:
> Le 09/10/2020 à 08:44, zhaolichang a écrit :
> > I found that there are many spelling errors in the comments of
> > qemu/target/m68k.
> > I used spellcheck to check the spelling errors and found some errors in the
> > folder.
>
On Sat, 12 Dec 2020, Peter Maydell wrote:
Switch the sam460ex board to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
Signed-off-by: Peter Maydell
---
hw/ppc/sam460ex.c | 70 ---
1 file change
On Sat, 12 Dec 2020, Peter Maydell wrote:
Currently the PPC UIC ("Universal Interrupt Controller") is implemented
as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device
in hw/intc.
The ppcuic_init() function is retained for the moment with its current
interface; in subsequent co
On Thu, 10 Dec 2020 at 13:50, wrote:
>
> From: Marc-André Lureau
>
> QEMU requires Clang or GCC, that define and support __GNUC__ extensions.
>
> Signed-off-by: Marc-André Lureau
> ---
> include/qemu/compiler.h | 8 +---
> 1 file changed, 1 insertion(+), 7 deletions(-)
Reviewed-by: Peter
Le 12/12/2020 à 18:56, Philippe Mathieu-Daudé a écrit :
> Hi Laurent,
>
> On Sat, Dec 12, 2020 at 6:11 PM Laurent Vivier wrote:
>> Le 09/10/2020 à 08:44, zhaolichang a écrit :
>>> I found that there are many spelling errors in the comments of
>>> qemu/target/m68k.
>>> I used spellcheck to check
Currently the GRLIB_IRQMP device is used in one place (the leon3
board), but instead of the device providing inbound gpio lines for
the board to wire up, the board code itself calls
qemu_allocate_irqs() with the handler function being a set_irq
function defined in the code for the device.
Patch on
On Sat, Dec 12, 2020 at 8:58 PM Laurent Vivier wrote:
> Le 12/12/2020 à 18:56, Philippe Mathieu-Daudé a écrit :
> > Hi Laurent,
> >
> > On Sat, Dec 12, 2020 at 6:11 PM Laurent Vivier wrote:
> >> Le 09/10/2020 à 08:44, zhaolichang a écrit :
> >>> I found that there are many spelling errors in the
The grlib.h header defines a set_pil_in_fn typedef which is never
used; remove it.
Signed-off-by: Peter Maydell
---
include/hw/sparc/grlib.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/hw/sparc/grlib.h b/include/hw/sparc/grlib.h
index e1d1beaa73f..2104f493f32 100644
--- a/includ
Patchew URL: https://patchew.org/QEMU/20201212155530.23098-1-cfont...@suse.de/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201212155530.23098-1-cfont...@suse.de
Subject: [PATCH v12 00/23] i386 cleanup PART 1
=== T
Currently the GRLIB_IRQMP device is used in one place (the leon3 board),
but instead of the device providing inbound gpio lines for the board
to wire up, the board code itself calls qemu_allocate_irqs() with
the handler function being a set_irq function defined in the code
for the device.
Refactor
On Fri, 11 Dec 2020 at 17:08, Kevin Wolf wrote:
>
> The following changes since commit b785d25e91718a660546a6550f64b3c543af7754:
>
> Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream'
> into staging (2020-12-11 13:50:35 +)
>
> are available in the Git repository at:
>
>
On 12/12/20 11:00 AM, Claudio Fontana wrote:
> On 12/11/20 9:02 PM, Eduardo Habkost wrote:
>> On Fri, Dec 11, 2020 at 07:51:54PM +0100, Claudio Fontana wrote:
>>> On 12/11/20 7:26 PM, Philippe Mathieu-Daudé wrote:
On 12/11/20 7:22 PM, Richard Henderson wrote:
> On 12/11/20 12:15 PM, Claudi
On Sat, 12 Dec 2020, Peter Maydell wrote:
Switch the sam460ex board to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
Signed-off-by: Peter Maydell
---
hw/ppc/sam460ex.c | 70 ---
1 file change
Public bug reported:
Hello,
Using hypervisor fuzzer, hyfuzz, I found an assertion failure through
am53c974 emulator.
A malicious guest user/process could use this flaw to abort the QEMU
process on the host, resulting in a denial of service.
This was found in version 5.2.0 (master)
qemu-system
On Sat, 12 Dec 2020 at 19:53, BALATON Zoltan wrote:
>
> On Sat, 12 Dec 2020, Peter Maydell wrote:
> > Switch the sam460ex board to directly creating and configuring the
> > UIC, rather than doing it via the old ppcuic_init() helper function.
> >
> > Signed-off-by: Peter Maydell
> > ---
> > hw/ppc
On Sat, 12 Dec 2020, Peter Maydell wrote:
On Sat, 12 Dec 2020 at 17:17, BALATON Zoltan wrote:
On Sat, 12 Dec 2020, Peter Maydell wrote:
Switch the sam460ex board to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
Signed-off-by: Peter
I installed Qemu 5.0.0 from Debian Buster backports and I still get this
error.
qemu_gl_create_compile_shader: compile vertex error
0:2(10): error: GLSL ES 3.00 is not supported. Supported versions are: 1.10,
1.20, and 1.00 ES
qemu_gl_create_compile_shader: compile fragment error
0:2(10): error
On Sat, 12 Dec 2020, Peter Maydell wrote:
On Sat, 12 Dec 2020 at 18:27, BALATON Zoltan wrote:
On Sat, 12 Dec 2020, Peter Maydell wrote:
Currently the PPC UIC ("Universal Interrupt Controller") is implemented
as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device
in hw/intc.
---
> m68k pull request 20201212
>
> Fix for Coverity CID 1421883
> Fix some comment spelling errors
> Add m68k vmstate
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/6.0
for any user-visible changes.
-- PMM
Public bug reported:
swtpm provides several interfaces for its emulated device: unix socket
(can be used by qemu), chardev. swtpm also provides TCP interface for
the device which is very convenient for testing as it does not require
root permissions.
It would be very useful to have QEMU to work w
On 201119 1706, Daniele Buono wrote:
> Thanks Alex,
> do you think you could also give it a try linking with LLD?
>
> just add --extra-ldflags="-fuse-ld=lld"
>
> I do see some small differences when moving from BFD ro LLD, but they should
> not be of importance. The position of the data.fuzz* is
On 201204 1806, Daniele Buono wrote:
> This patch adds a flag to enable/disable control flow integrity checks
> on indirect function calls.
> This feature only allows indirect function calls at runtime to functions
> with compatible signatures.
>
> This feature is only provided by LLVM/Clang, and
On 201204 1806, Daniele Buono wrote:
> Document how to compile with CFI and how to maintain CFI-safe code
>
> Signed-off-by: Daniele Buono
Reviewed-by: Alexander Bulekov
Thanks
> ---
> docs/devel/control-flow-integrity.rst | 137 ++
> 1 file changed, 137 insertions(+)
OSS-Fuzz reported this:
=== Reproducer ===
cat << EOF | ./qemu-system-i386 -display none \
-machine accel=qtest, -m 512M -machine q35 -nodefaults \
-device qemu-xhci,id=xhci -device usb-tablet,bus=xhci.0 \
-device usb-tablet -device usb-wacom-tablet -device usb-audio \
-qtest stdio
outl 0xcf8 0x80
Public bug reported:
affects qemu
=== Reproducer ===
cat << EOF |./qemu-system-i386 -display none -m 512M -machine q35 \
-device virtio-blk,drive=disk0 \
-drive file=null-co://,id=disk0,if=none,format=raw -qtest stdio
outl 0xcf8 0x8000181f
outl 0xcfc 0xa044d79
outl 0xcf8 0x80001802
outl 0xcf8 0
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