Am 23.10.2020 um 17:01 hat Greg Kurz geschrieben:
> If a BDS gets deleted during blk_drain_all(), it might miss a
> call to bdrv_do_drained_end(). This means missing a call to
> aio_enable_external() and the AIO context remains disabled for
> ever. This can cause a device to become irresponsive and
On Mon, 26 Oct 2020 14:26:59 +
Peter Maydell wrote:
> On Mon, 26 Oct 2020 at 13:37, Igor Mammedov wrote:
> > Peter Maydell wrote:
> > > Hmm, maybe, maybe not. The original design idea here was that
> > > the boot loader code took a structure defining only the things
> > > that the bootloa
From: Keith Busch
Let the user specify a specific namespace if they want to get access
stats for a specific namespace.
Signed-off-by: Keith Busch
Signed-off-by: Klaus Jensen
---
include/block/nvme.h | 1 +
hw/block/nvme.c | 63 +++-
2 files change
* Eric Blake (ebl...@redhat.com) wrote:
> Anywhere we create a list of just one item or by prepending items
> (typically because order doesn't matter), we can use the now-public
> macro. But places where we must keep the list in order by appending
> remain open-coded.
>
> Signed-off-by: Eric Blak
From: Klaus Jensen
If a command results in a non-zero status code, trace it.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Dmitry Fomichev
Signed-off-by: Klaus Jensen
Signed-off-by: Keith Busch
---
hw/block/nvme.c | 6 ++
hw/block/trace-events | 1 +
2 files changed, 7 insertio
Paolo Bonzini writes:
> qemu_semihosting_console_init uses semihosting.chardev which is set
> by qemu_semihosting_connect_chardevs. Thus qemu_semihosting_connect_chardevs
> has to be called first.
It looks like this is reverting 619985e9 ("semihosting: defer
connect_chardevs a little more to
From: Havard Skinnemoen
This allows us to reuse npcm7xx_timer_pause for the watchdog timer.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Havard Skinnemoen
Signed-off-by: Peter Maydell
---
hw/timer/npcm7xx_timer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a
From: Zenghui Yu
Ensure the vSMMUv3 will be restored before all PCIe devices so that DMA
translation can work properly during migration.
Signed-off-by: Zenghui Yu
Message-id: 20201019091508.197-1-yuzeng...@huawei.com
Acked-by: Eric Auger
Signed-off-by: Peter Maydell
---
hw/arm/smmuv3.c | 1 +
On Mon, Oct 26, 2020 at 05:45:37PM +1100, David Gibson wrote:
> On Fri, 23 Oct 2020 09:26:48 +0300
> Marcel Apfelbaum wrote:
>
> > Hi Michael,
> >
> > On Thu, Oct 22, 2020 at 6:01 PM Michael S. Tsirkin wrote:
> >
> > [...]
> > [...]
> > [...]
> > [...]
> > [...]
> > [...]
> >
27.10.2020 08:05, Eric Blake wrote:
'qemu-img map' provides a way to determine which extents of an image
come from the top layer vs. inherited from a backing chain. This is
useful information worth exposing over NBD. There is a proposal to
add a QMP command block-dirty-bitmap-populate which can
From: Dmitry Fomichev
Calculate the data shift value to report based on the set value of
logical_block_size device property.
In the process, use a local variable to calculate the LBA format
index instead of the hardcoded value 0. This makes the code more
readable and it will make it easier to ad
From: Philippe Mathieu-Daudé
It makes no sense to set enabled-cpus=0 on single core SoCs.
Reviewed-by: Luc Michel
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20201024170127.3592182-5-f4...@amsat.org
Signed-off-by: Peter Maydell
---
hw/arm/bcm2836.c | 15 +++
1 file changed,
On Mon, 26 Oct 2020 at 16:20, Dr. David Alan Gilbert (git)
wrote:
>
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit a46e72710566eea0f90f9c673a0f02da0064acce:
>
> Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20201026' into
> staging (2020-10-26 14:50:03 +)
From: Luc Michel
The CPRMAN (clock controller) was mapped at the watchdog/power manager
address. It was also split into two unimplemented peripherals (CM and
A2W) but this is really the same one, as shown by this extract of the
Raspberry Pi 3 Linux device tree:
watchdog@7e10 {
From: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Damien Hedde
Signed-off-by: Luc Michel
Tested-by: Guenter Roeck
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Peter Maydell
---
include/hw/clock.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/hw/clock.
On Mon, Oct 26, 2020 at 03:13:32PM +, Felipe Franciosi wrote:
> QEMU must be careful when loading device state off migration streams to
> prevent a malicious source from exploiting the emulator. Overdoing these
> checks has the side effect of allowing a guest to "pin itself" in cloud
> environm
From: Gollu Appalanaidu
The nvme_check_{sq,cq} functions check if the given queue identifer is
valid *and* that the queue exists. Thus, the function return value
cannot simply be inverted to check if the identifer is valid and that
the queue does *not* exist.
Replace the call with an OR'ed versi
Am 26.10.2020 um 17:58 hat Alberto Garcia geschrieben:
> I had to rebase the series due to conflicting changes on master. There
> are no other differences.
Thanks, applied to the block branch.
Kevin
From: "Dr. David Alan Gilbert"
Use of 0x%d - make up our mind as 0x%x
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Eric Auger
Message-id: 20201014193355.53074-1-dgilb...@redhat.com
Signed-off-by: Peter Maydell
---
hw/arm/trace-events | 2 +-
1 file cha
From: Shashi Mallela
Generic watchdog device model implementation as per ARM SBSA v6.0
Signed-off-by: Shashi Mallela
Message-id: 20201027015927.29495-2-shashi.mall...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
include/hw/watchdog/sbsa_gwdt.h | 79 +
hw/wa
On Oct 27 11:49, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Some devices might want to know the return value of dma_memory_rw, so
> pass it along instead of ignoring it.
>
> There are no existing users of the return value, so this patch should be
> safe.
>
> Signed-off-by: Klaus Jensen
> Rev
From: Richard Henderson
This is a bit clearer than open-coding some of this
with a bare c string.
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-9-richard.hender...@linaro.org
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Peter Maydell
---
linux-user/elfload.c | 37 +
The armv7m systick timer is a 24-bit decrementing, wrap-on-zero,
clear-on-write counter. Our current implementation has various
bugs and dubious workarounds in it (for instance see
https://bugs.launchpad.net/qemu/+bug/1872237).
We have an implementation of a simple decrementing counter
and we put
27.10.2020 08:05, Eric Blake wrote:
Allow the server to expose an additional metacontext to be requested
by savvy clients. qemu-nbd adds a new option -A to expose the
qemu:allocation-depth metacontext through NBD_CMD_BLOCK_STATUS; this
can also be set via QMP when using block-export-add.
qemu a
From: Philippe Mathieu-Daudé
Fix an unlikely memory leak in load_elf_image().
Fixes: bf858897b7 ("linux-user: Re-use load_elf_image for the main binary.")
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-5-richard.hender...@linaro.org
Mes
On Tue, 27 Oct 2020 at 01:59, Shashi Mallela wrote:
>
> This patch series adds watchdog timer support for SbsaQemu platform.
>
> The watchdog timer has been implemented first based on the generic
> watchdog timer specifications from ARM SBSA v6.0 and then used
> in the SbsaQemu reference platform
From: Richard Henderson
This is slightly clearer than just using strerror, though
the different forms produced by error_setg_file_open and
error_setg_errno isn't entirely convenient.
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-10-richard.hender...@linaro.org
Reviewed-by:
On Tue, 27 Oct 2020 at 08:55, Philippe Mathieu-Daudé wrote:
>
> Hi Peter,
>
> On 10/19/20 9:31 PM, Peter Maydell wrote:
> > On Mon, 19 Oct 2020 at 16:45, Peter Maydell
> > wrote:
> >>
> >> On Sat, 10 Oct 2020 at 14:57, Luc Michel wrote:
> >>>
> >>> v2 -> v3:
> >>> - patch 03: moved clock_new
From: Richard Henderson
The second loop uses a loop induction variable, and the first
does not. Transform the first to match the second, to simplify
a following patch moving code between them.
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-7-richard.hender...@linaro.org
Rev
Using the correct shared library suffix helps ;)
Signed-off-by: Gerd Hoffmann
---
configure | 1 +
1 file changed, 1 insertion(+)
diff --git a/configure b/configure
index 55e07c82dd93..6efae5fe129f 100755
--- a/configure
+++ b/configure
@@ -617,6 +617,7 @@ Darwin)
if test -z "$cpu" && test "
From: Thomas Huth
When compiling with -Werror=implicit-fallthrough, gcc complains about
missing fallthrough annotations in this file. Looking at the code,
the fallthrough is very likely intended here, so add some comments
to silence the compiler warnings.
Signed-off-by: Thomas Huth
Message-id:
On Mon, Oct 26, 2020 at 10:40:19AM -0400, Paolo Bonzini wrote:
> It is not needed, all the callers are just saving what was
> retrieved from -trace and trace_init_file can retrieve it
> on its own.
>
> Signed-off-by: Paolo Bonzini
> ---
> bsd-user/main.c | 6 ++
> linux
Signed-off-by: Markus Armbruster
---
docs/devel/qapi-code-gen.txt | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/docs/devel/qapi-code-gen.txt b/docs/devel/qapi-code-gen.txt
index c6438c6aa9..6906a06ad2 100644
--- a/docs/devel/qapi-code-gen.txt
+++ b/docs/devel/qapi-code
On 26/10/2020 16.12, Paolo Bonzini wrote:
> On 26/10/20 16:03, Daniele Buono wrote:
>> Hi Paolo,
>> I reorganized UASStatus to put uas_iu at the end and it works fine.
>> Unfortunately, this uncovered another part of the code with a similar
>> issue (variable sized type not at the end of the struct
From: Richard Henderson
For BTI, we need to know if the executable is static or dynamic,
which means looking for PT_INTERP earlier.
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-8-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
li
From: Richard Henderson
The kernel sets btype for the signal handler as if for a call.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-2-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
linux-user/aarch64/signal.c | 10 --
1
On Fri, Oct 23, 2020 at 09:26:48AM +0300, Marcel Apfelbaum wrote:
> Hi Michael,
>
> On Thu, Oct 22, 2020 at 6:01 PM Michael S. Tsirkin wrote:
>
> On Thu, Oct 22, 2020 at 05:50:51PM +0300, Marcel Apfelbaum wrote:
> >
> >
> > On Thu, Oct 22, 2020 at 5:33 PM Michael S. Tsirkin
>
/pull-bitmaps-2020-10-26'
into staging (2020-10-26 22:36:35 +)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20201027-1
for you to fetch changes up to 32bd322a0134ed89db00f2b9b3894982db3dedcb:
hw/timer/armv7m_systick:
On Tue, Oct 27, 2020 at 4:22 PM Markus Armbruster wrote:
> Signed-off-by: Markus Armbruster
>
Reviewed-by: Marc-André Lureau
---
> docs/devel/qapi-code-gen.txt | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/docs/devel/qapi-code-gen.txt b/docs/devel/qapi-code-g
From: Richard Henderson
Use the new generic support for NT_GNU_PROPERTY_TYPE_0.
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-12-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
linux-user/elfload.c | 48 +++
From: Hao Wu
The watchdog is part of NPCM7XX's timer module. Its behavior is
controlled by the WTCR register in the timer.
When enabled, the watchdog issues an interrupt signal after a pre-set
amount of cycles, and issues a reset signal shortly after that.
Reviewed-by: Tyrone Ting
Signed-off-b
On Tue, 27 Oct 2020 12:26:21 +0100
Thomas Huth wrote:
> On 26/10/2020 16.12, Paolo Bonzini wrote:
> > On 26/10/20 16:03, Daniele Buono wrote:
> >> Hi Paolo,
> >> I reorganized UASStatus to put uas_iu at the end and it works fine.
> >> Unfortunately, this uncovered another part of the code with
From: Richard Henderson
Fixing this now will clarify following patches.
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-6-richard.hender...@linaro.org
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Peter Maydell
---
linux-user/elfload.c | 12 +---
1 file change
From: Richard Henderson
This is generic support, with the code disabled for all targets.
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-11-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
linux-user/qemu.h| 4 ++
linux-user/el
From: Havard Skinnemoen
The NPCM730 and NPCM750 chips have a single USB host port shared between
a USB 2.0 EHCI host controller and a USB 1.1 OHCI host controller. This
adds support for both of them.
Testing notes:
* With -device usb-kbd, qemu will automatically insert a full-speed
hub, an
From: Richard Henderson
Transform the prot bit to a qemu internal page bit, and save
it in the page tables.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-3-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
include/exec/cpu-all.h
From: Richard Henderson
These are all of the defines required to parse
GNU_PROPERTY_AARCH64_FEATURE_1_AND, copied from binutils.
Other missing defines related to other GNU program headers
and notes are elided for now.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 2020
From: Pavel Dovgalyuk
This patch sets min_cpus field for xlnx-versal-virt platform,
because it always creates XLNX_VERSAL_NR_ACPUS cpus even with
-smp 1 command line option.
Signed-off-by: Pavel Dovgalyuk
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Edgar E. Iglesias
Message-id: 160343854
From: Philippe Mathieu-Daudé
Reviewed-by: Luc Michel
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20201024170127.3592182-7-f4...@amsat.org
Signed-off-by: Peter Maydell
---
include/hw/arm/bcm2836.h | 1 +
hw/arm/bcm2836.c | 34 ++
hw/arm/raspi.c
From: Philippe Mathieu-Daudé
The realize() function is clearly composed of two parts,
each described by a comment:
void realize()
{
/* common peripherals from bcm2835 */
...
/* bcm2836 interrupt controller (and mailboxes, etc.) */
...
}
Split the two part, so we can r
From: Luc Michel
There are 5 PLLs in the CPRMAN, namely PLL A, C, D, H and B. All of them
take the xosc clock as input and produce a new clock.
This commit adds a skeleton implementation for the PLLs as sub-devices
of the CPRMAN. The PLLs are instantiated and connected internally to the
main osc
From: Havard Skinnemoen
The RNG module returns a byte of randomness when the Data Valid bit is
set.
This implementation ignores the prescaler setting, and loads a new value
into RNGD every time RNGCS is read while the RNG is enabled and random
data is available.
A qtest featuring some simple ra
From: Philippe Mathieu-Daudé
The Pi 3A+ is a stripped down version of the 3B:
- 512 MiB of RAM instead of 1 GiB
- no on-board ethernet chipset
Add it as it is a closer match to what we model.
Reviewed-by: Igor Mammedov
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20201024170127.3592182-1
From: Luc Michel
Those reset values have been extracted from a Raspberry Pi 3 model B
v1.2, using the 2020-08-20 version of raspios. The dump was done using
the debugfs interface of the CPRMAN driver in Linux (under
'/sys/kernel/debug/clk'). Each exposed clock tree stage (PLLs, channels
and muxes
From: Luc Michel
PLLs are composed of multiple channels. Each channel outputs one clock
signal. They are modeled as one device taking the PLL generated clock as
input, and outputting a new clock.
A channel shares the CM register with its parent PLL, and has its own
A2W_CTRL register. A write to
From: Richard Henderson
The note test requires gcc 10 for -mbranch-protection=standard.
The mmap test uses PROT_BTI and does not require special compiler support.
Acked-by: Alex Bennée
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20201021173749.03-13-richard.hen
From: Luc Michel
Add a clock input to the PL011 UART so we can compute the current baud
rate and trace it. This is intended for developers who wish to use QEMU
to e.g. debug their firmware or to figure out the baud rate configured
by an unknown/closed source binary.
Reviewed-by: Philippe Mathieu
From: Luc Michel
The clock multiplexers are the last clock stage in the CPRMAN. Each mux
outputs one clock signal that goes out of the CPRMAN to the SoC
peripherals.
Each mux has at most 10 sources. The sources 0 to 3 are common to all
muxes. They are:
0. ground (no clock signal)
1. the ma
From: Philippe Mathieu-Daudé
No code out of bcm2836.c uses (or requires) the BCM283XInfo
declarations. Move it locally to the C source file.
Reviewed-by: Luc Michel
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20201024170127.3592182-2-f4...@amsat.org
Signed-off-by: Peter Maydell
---
inc
From: Luc Michel
Connect the 'uart-out' clock from the CPRMAN to the PL011 instance.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Luc Michel
Tested-by: Guenter Roeck
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Peter Maydell
---
hw/arm/bcm2835_peripherals.c | 2 ++
1 file changed
From: Havard Skinnemoen
The NPCM7xx chips have multiple GPIO controllers that are mostly
identical except for some minor differences like the reset values of
some registers. Each controller controls up to 32 pins.
Each individual pin is modeled as a pair of unnamed GPIOs -- one for
emitting the
From: Shashi Mallela
Included the newly implemented SBSA generic watchdog device model into
SBSA platform
Signed-off-by: Shashi Mallela
Reviewed-by: Peter Maydell
Message-id: 20201027015927.29495-3-shashi.mall...@linaro.org
Signed-off-by: Peter Maydell
---
hw/arm/sbsa-ref.c | 23
27.10.2020 08:05, Eric Blake wrote:
When checking for allocation across a chain, it's already easy to
count the depth within the chain at which the allocation is found.
Instead of throwing that information away, return it to the caller.
Existing callers only cared about allocated/non-allocated, b
From: Philippe Mathieu-Daudé
Remove usage of TypeInfo::class_data. Instead fill the fields in
the corresponding class_init().
So far all children use the same values for almost all fields,
but we are going to add the BCM2711/BCM2838 SoC for the raspi4
machine which use different fields.
Reviewe
In ptimer_reload(), we call the callback function provided by the
timer device that is using the ptimer. This callback might disable
the ptimer. The code mostly handles this correctly, except that
we'll still print the warning about "Timer with delta zero,
disabling" if the now-disabled timer hap
On Tue, Oct 27, 2020 at 11:30:49AM +, Stefan Hajnoczi wrote:
> On Mon, Oct 26, 2020 at 03:13:32PM +, Felipe Franciosi wrote:
> > QEMU must be careful when loading device state off migration streams to
> > prevent a malicious source from exploiting the emulator. Overdoing these
> > checks ha
On Sun, 25 Oct 2020 16:24:44 +0100
Greg Kurz wrote:
> On Fri, 23 Oct 2020 21:15:09 +0200
> Igor Mammedov wrote:
>
> > On Mon, 19 Oct 2020 10:48:41 +0200
> > Greg Kurz wrote:
> >
> > > Both PC_DIMM_SLOT_PROP and PC_DIMM_ADDR_PROP are defined in the
> > > default property list of the PC DIMM
From: Philippe Mathieu-Daudé
The BCM2835 has only one core. Introduce the core_count field to
be able to use values different than BCM283X_NCPUS (4).
Reviewed-by: Luc Michel
Signed-off-by: Philippe Mathieu-Daudé
Message-id: 20201024170127.3592182-4-f4...@amsat.org
Signed-off-by: Peter Maydell
From: Philippe Mathieu-Daudé
Similarly to the Pi A, the Pi Zero uses a BCM2835 SoC (ARMv6Z core).
The only difference between the revision 1.2 and 1.3 is the latter
exposes a CSI camera connector. As we do not implement the Unicam
peripheral, there is no point in exposing a camera connector :)
T
On Tue, Oct 27, 2020 at 00:05:49 -0500, Eric Blake wrote:
> Since 'block-export-add' is new to 5.2, we can still tweak the
> interface; there, allowing 'bitmaps':['str'] is nicer than
> 'bitmap':'str'. This wires up the qapi and qemu-nbd changes to permit
> passing multiple bitmaps as distinct met
David Hildenbrand writes:
> On 26.10.20 11:43, David Hildenbrand wrote:
>> On 26.10.20 09:49, Vitaly Kuznetsov wrote:
>>> Currently, KVM doesn't provide an API to make atomic updates to memmap when
>>> the change touches more than one memory slot, e.g. in case we'd like to
>>> punch a hole in an
On Tue, 27 Oct 2020 07:26:44 -0400
"Michael S. Tsirkin" wrote:
> On Mon, Oct 26, 2020 at 05:45:37PM +1100, David Gibson wrote:
> > On Fri, 23 Oct 2020 09:26:48 +0300
> > Marcel Apfelbaum wrote:
> >
> > > Hi Michael,
> > >
> > > On Thu, Oct 22, 2020 at 6:01 PM Michael S. Tsirkin
> > > wrote
From: Philippe Mathieu-Daudé
The Pi A is almost the first machine released.
It uses a BCM2835 SoC which includes a ARMv6Z core.
Example booting the machine using content from [*]
(we use the device tree from the B model):
$ qemu-system-arm -M raspi1ap -serial stdio \
-kernel raspberrypi
From: Luc Michel
The nanosecond unit greatly limits the dynamic range we can display in
clock value traces, for values in the order of 1GHz and more. The
internal representation can go way beyond this value and it is quite
common for today's clocks to be within those ranges.
For example, a frequ
On Tue, Oct 27, 2020 at 12:53:29PM +, Felipe Franciosi wrote:
>
>
> > On Oct 27, 2020, at 12:25 PM, Michael S. Tsirkin wrote:
> >
> > On Tue, Oct 27, 2020 at 11:30:49AM +, Stefan Hajnoczi wrote:
> >> On Mon, Oct 26, 2020 at 03:13:32PM +, Felipe Franciosi wrote:
> >>> QEMU must be ca
On Tue, Oct 27, 2020 at 01:54:26PM +0100, Igor Mammedov wrote:
> On Tue, 27 Oct 2020 07:26:44 -0400
> "Michael S. Tsirkin" wrote:
>
> > On Mon, Oct 26, 2020 at 05:45:37PM +1100, David Gibson wrote:
> > > On Fri, 23 Oct 2020 09:26:48 +0300
> > > Marcel Apfelbaum wrote:
> > >
> > > > Hi Michael
> On Oct 27, 2020, at 12:56 PM, Michael S. Tsirkin wrote:
>
> On Tue, Oct 27, 2020 at 12:53:29PM +, Felipe Franciosi wrote:
>>
>>
>>> On Oct 27, 2020, at 12:25 PM, Michael S. Tsirkin wrote:
>>>
>>> On Tue, Oct 27, 2020 at 11:30:49AM +, Stefan Hajnoczi wrote:
On Mon, Oct 26, 20
From: Luc Michel
The BCM2835 CPRMAN is the clock manager of the SoC. It is composed of a
main oscillator, and several sub-components (PLLs, multiplexers, ...) to
generate the BCM2835 clock tree.
This commit adds a skeleton of the CPRMAN, with a dummy register
read/write implementation. It embeds
From: Luc Michel
The CPRMAN PLLs generate a clock based on a prescaler, a multiplier and
a divider. The prescaler doubles the parent (xosc) frequency, then the
multiplier/divider are applied. The multiplier has an integer and a
fractional part.
This commit also implements the CPRMAN CM_LOCK regi
On 27.10.20 14:02, Vitaly Kuznetsov wrote:
David Hildenbrand writes:
On 27.10.20 13:36, Vitaly Kuznetsov wrote:
David Hildenbrand writes:
On 26.10.20 11:43, David Hildenbrand wrote:
On 26.10.20 09:49, Vitaly Kuznetsov wrote:
Currently, KVM doesn't provide an API to make atomic updates to
From: Luc Michel
A PLL channel is able to further divide the generated PLL frequency.
The divider is given in the CTRL_A2W register. Some channels have an
additional fixed divider which is always applied to the signal.
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signe
From: Luc Michel
A clock mux can be configured to select one of its 10 sources through
the CM_CTL register. It also embeds yet another clock divider, composed
of an integer part and a fractional part. The number of bits of each
part is mux dependent.
Tested-by: Philippe Mathieu-Daudé
Signed-off
From: Luc Michel
This simple mux sits between the PLL channels and the DSI0E and DSI0P
clock muxes. This mux selects between PLLA-DSI0 and PLLD-DSI0 channel
and outputs the selected signal to source number 4 of DSI0E/P clock
muxes. It is controlled by the cm_dsi0hsck register.
Reviewed-by: Phili
On Mon, Oct 26, 2020 at 11:04:06AM +, Peter Maydell wrote:
> On Thu, 22 Oct 2020 at 17:48, Paolo Bonzini wrote:
> > now that Gitlab is the primary CI infrastructure for QEMU, and that all
> > QEMU git repositories (including mirrors) are available on Gitlab, I
> > would like to propose that co
Hi
On Tue, Oct 27, 2020 at 12:41 PM Markus Armbruster wrote:
>
> marcandre.lur...@redhat.com writes:
>
> > From: Marc-André Lureau
> >
> > Thanks to the monitors coroutine support, the screendump handler can
>
> monitors'
>
> Suggest to add (merge commit b7092cda1b3) right before the comma.
>
>
David Hildenbrand writes:
> On 27.10.20 14:02, Vitaly Kuznetsov wrote:
>>
>> Sorry for not being clear: your patch looks good to me, what I tried to
>> say is that with the current KVM API the only way to guarantee atomicity
>> of the update is to make vCPUs stop (one way or another), kicking th
This is a v2 of:
https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg07025.html
This series started off as a desire to add an "Edit page" link to every
page on the site. In doing this I felt that the footer would benefit
from simplication so that it was not a massive wall of links,
duplica
On 10/27/20 5:09 AM, Markus Armbruster wrote:
> Eric Blake writes:
>
>> Anywhere we create a list of just one item or by prepending items
>> (typically because order doesn't matter), we can use the now-public
>> macro. But places where we must keep the list in order by appending
>> remain open-c
Signed-off-by: Daniel P. Berrangé
---
.gitlab-ci.yml | 16
1 file changed, 16 insertions(+)
create mode 100644 .gitlab-ci.yml
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
new file mode 100644
index 000..5fa3041
--- /dev/null
+++ b/.gitlab-ci.yml
@@ -0,0 +1,16 @@
+
+pages:
+
When the browser window is narrow, but not yet switched into the mobile
layout, the page header nav will line wrap. This breaks layout
assumptions resulting in overlapping/obscured text.
This deals with the probem by reducing padding between the links, and
shortening "Documentation" to just "Docs"
Signed-off-by: Daniel P. Berrangé
---
assets/css/style-desktop.css | 586 -
assets/css/style-mobile.css | 750 ++---
assets/css/style.css | 1184 +-
index.html | 178 ++---
4 files changed, 1349 insertio
On 27.10.20 13:36, Vitaly Kuznetsov wrote:
David Hildenbrand writes:
On 26.10.20 11:43, David Hildenbrand wrote:
On 26.10.20 09:49, Vitaly Kuznetsov wrote:
Currently, KVM doesn't provide an API to make atomic updates to memmap when
the change touches more than one memory slot, e.g. in case w
The current headings are repetative and waste vertical screen real
estate which could hold more useful content.
Signed-off-by: Daniel P. Berrangé
---
index.html | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/index.html b/index.html
index 48304c8..4f01fe9 100644
--- a/in
This enables the site to be hosted at URLs with different base
directories. This is useful when viewing the site after being
published as GitLab CI artifacts.
Signed-off-by: Daniel P. Berrangé
---
_includes/assets.html| 28 ++--
_includes/copyright.html | 2 +
The copyright information is at the base of the page so logically part of
the page footer structure.
Signed-off-by: Daniel P. Berrangé
---
_includes/copyright.html| 8
_includes/footer.html | 3 +++
_layouts/blog.html | 1 -
_layouts/home.html | 1 -
_lay
> On Oct 27, 2020, at 12:25 PM, Michael S. Tsirkin wrote:
>
> On Tue, Oct 27, 2020 at 11:30:49AM +, Stefan Hajnoczi wrote:
>> On Mon, Oct 26, 2020 at 03:13:32PM +, Felipe Franciosi wrote:
>>> QEMU must be careful when loading device state off migration streams to
>>> prevent a maliciou
Now that the screenshots are using a carousel, they don't consume the
full width of the page. This enables switching to a two column layout
with information about the latest release placed in one column, and
screenshots in the other. This means release information is no longer
hidden off the bottom
The "bxslider" provides an auto-rotating carosel of images.
Signed-off-by: Daniel P. Berrangé
---
_includes/assets.html |4 +
assets/css/jquery.bxslider.css | 179
assets/js/jquery.bxslider.js | 1607
3 files changed, 1790 insertions(+)
crea
This makes it more likely that visitors will see and follow links to
interesting blogs.
Signed-off-by: Daniel P. Berrangé
---
assets/css/style.css | 5 +
index.html | 12
2 files changed, 17 insertions(+)
diff --git a/assets/css/style.css b/assets/css/style.css
index
The link takes the user directly to the source markdown file in gitlab.
This gives them guidance as to what file should be editted to make
changes to the content.
Signed-off-by: Daniel P. Berrangé
---
_includes/footer.html | 3 +++
assets/css/style.css | 6 +-
2 files changed, 8 insertions(
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