Another set of boring patches, in preparation of
supporting multiple queues (the next series).
Based-on: <20201014115253.25276-1-phi...@redhat.com>
"util/vfio-helpers: Improve debugging experience"
https://www.mail-archive.com/qemu-block@nongnu.org/msg75637.html
Philippe Mathieu-Daudé (15):
blo
Controllers have different capabilities and report them in the
CAP register. We are particularly interested by the page size
limits.
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c | 10 ++
block/trace-events | 1 +
2 files changed, 11 insertions(+)
diff --git a/block/nvme
Just for consistency, following the example documented since
commit e3fe3988d7 ("error: Document Error API usage rules"),
return a boolean value indicating an error is set or not.
This simplifies a bit nvme_create_queue_pair().
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c | 15 ++--
Replace magic values by definitions, and simplifiy since the
number of queues will never reach 64K.
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/block/nvme.c b/block/nvme.c
index b841c5950c5..11fba2d754d 10064
We can not have negative queue count/size/index, use unsigned type.
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c | 24 +++-
block/trace-events | 10 +-
2 files changed, 16 insertions(+), 18 deletions(-)
diff --git a/block/nvme.c b/block/nvme.c
index 7
We want to get ride of the BlockDriverState pointer at some point,
so pass aio_context along.
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/block/nvme.c b/block/nvme.c
index 523814a1243..b841c5950c5 100644
---
We don't need to dereference from BDRVNVMeState each time.
Use a NVMeQueuePair pointer to the admin queue and use it.
The nvme_init() becomes easier to review, matching the style
of nvme_add_io_queue().
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c | 10 ++
1 file changed, 6 ins
When introducing this driver in commit bdd6a90a9e5
("block: Add VFIO based NVMe driver") we correctly
set the request_alignment in nvme_refresh_limits()
but forgot to set it at initialization. Do it now.
Reported-by: Stefan Hajnoczi
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c | 1 +
Sorry, this is invalid, not related to qemu, the root of the issue is
with OVMF_CODE.fd and OVMF_VARS.fd from v. 202005 or v. 202008 stable.
** Changed in: qemu
Status: New => Invalid
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to
Instead of displaying warning on stderr, use warn_report()
which also displays it on the monitor.
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/block/nvme.c b/block/nvme.c
index ea5180d8a27..4d2b7fdf4f4 100644
--- a
Avoid multiple endianess conversion by using device endianess.
Signed-off-by: Philippe Mathieu-Daudé
---
block/nvme.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block/nvme.c b/block/nvme.c
index fad727416ee..299fc82f40f 100644
--- a/block/nvme.c
+++ b/block/nvme.c
@@ -74
On Wed, Oct 14, 2020 at 3:08 AM Michael S. Tsirkin wrote:
>
> On Tue, Oct 13, 2020 at 08:58:59PM -0400, Raphael Norwitz wrote:
> > On Tue, Oct 6, 2020 at 5:48 AM Igor Mammedov wrote:
> > >
> > > On Mon, 28 Sep 2020 21:17:31 +0800
> > > Jiajun Chen wrote:
> > >
> > > > Used_memslots is equal to d
On 10/14/20 10:29 AM, John Snow wrote:
Python infrastructure as it exists today is not capable reliably of
single-sourcing a package version from a parent directory. The authors
of pip are working to correct this, but as of today this is not possible
to my knowledge.
The problem is that when usi
* Christophe de Dinechin (dinec...@redhat.com) wrote:
>
> On 2020-08-27 at 17:36 CEST, Dr. David Alan Gilbert (git) wrote...
> > From: "Dr. David Alan Gilbert"
> >
> > Map xattr names coming from the server, i.e. the host filesystem;
> > currently this is only from listxattr.
> >
> > Signed-off-b
Hi Philippe,
Will work on splitting the patch for v2. Thanks for the tip on git.orderfile
Hi Balaton,
Reply inline.
-j
On Tue, Oct 13, 2020 at 7:58 AM BALATON Zoltan wrote:
>
> On Mon, 12 Oct 2020, Joelle van Dyne wrote:
> > From: osy
> >
> > On iOS, we cannot allocate RWX pages without spe
On 12.10.20 19:43, Andrey Shinkevich wrote:
> This patch completes the series with the COR-filter insertion for
> block-stream operations. Adding the filter makes it possible for copied
> regions to be discarded in backing files during the block-stream job,
> what will reduce the disk overuse.
> Th
On Wed, Oct 14, 2020 at 12:11:34PM -0400, Raphael Norwitz wrote:
> On Wed, Oct 14, 2020 at 3:08 AM Michael S. Tsirkin wrote:
> >
> > On Tue, Oct 13, 2020 at 08:58:59PM -0400, Raphael Norwitz wrote:
> > > On Tue, Oct 6, 2020 at 5:48 AM Igor Mammedov wrote:
> > > >
> > > > On Mon, 28 Sep 2020 21:17
On 14.10.2020 14:09, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
We are going to use the COR-filter for a block-stream job.
To limit COR operations by the base node in the backing chain during
stream job, pass the name of overlay base node to the copy-on-read
driver as base node
On 14.10.20 16:28, Andrey Shinkevich wrote:
> On 14.10.2020 13:44, Max Reitz wrote:
>> On 12.10.20 19:43, Andrey Shinkevich wrote:
>>> Provide API for the COR-filter insertion/removal.
>>> Also, drop the filter child permissions for an inactive state when the
>>> filter node is being removed.
>>>
>
On Wed, Oct 14, 2020 at 09:54:12AM -0400, Paolo Bonzini wrote:
> Ninja notices them due to a different order in visiting the graph.
>
> Signed-off-by: Paolo Bonzini
> ---
> tests/include/meson.build | 8
> tests/meson.build | 14 --
> 2 files changed, 16 insertions(
Since there seems to be some more push back on this one, I will remove
this patch from the v2 submission and submit it as a separate patch
-j
On Tue, Oct 13, 2020 at 9:40 AM BALATON Zoltan wrote:
>
> On Tue, 13 Oct 2020, Daniel P. Berrangé wrote:
> > On Tue, Oct 13, 2020 at 08:16:46AM -0700, Joe
On 14.10.20 16:56, Vladimir Sementsov-Ogievskiy wrote:
> 14.10.2020 14:57, Max Reitz wrote:
>> On 14.10.20 13:09, Max Reitz wrote:
>>> On 12.10.20 19:43, Andrey Shinkevich wrote:
We are going to use the COR-filter for a block-stream job.
To limit COR operations by the base node in the bac
On Wed, Oct 14, 2020 at 09:54:11AM -0400, Paolo Bonzini wrote:
> Without pipefail, it is possible to miss failures if the recipes
> include pipes.
>
> Signed-off-by: Paolo Bonzini
> ---
> Makefile | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Daniel P. Berrangé
Regards,
Daniel
--
|
On 14.10.20 17:22, Vladimir Sementsov-Ogievskiy wrote:
> 14.10.2020 15:51, Max Reitz wrote:
>> On 12.10.20 19:43, Andrey Shinkevich wrote:
>>> If the flag BDRV_REQ_PREFETCH was set, pass it further to the
>>> COR-driver to skip unneeded reading. It can be taken into account for
>>> the COR-algorith
14.10.2020 19:08, Andrey Shinkevich wrote:
On 14.10.2020 14:09, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
We are going to use the COR-filter for a block-stream job.
To limit COR operations by the base node in the backing chain during
stream job, pass the name of overlay base
On Wed, Oct 14, 2020 at 09:54:15AM -0400, Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini
> ---
> .cirrus.yml| 6 +++---
> .travis.yml| 13 +
> tests/docker/dockerfiles/centos7.docker| 1 +
> tests/docker/docker
On Wed, Oct 14, 2020 at 09:54:16AM -0400, Paolo Bonzini wrote:
> Now that the build is done entirely by Meson, there is no need
> to keep the Makefile conversion. Instead, we can ask Ninja about
> the targets it exposes and forward them.
>
> The main advantages are, from smallest to largest:
>
>
14.10.2020 19:30, Max Reitz wrote:
On 14.10.20 17:22, Vladimir Sementsov-Ogievskiy wrote:
14.10.2020 15:51, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
If the flag BDRV_REQ_PREFETCH was set, pass it further to the
COR-driver to skip unneeded reading. It can be taken into accou
On Wed, Oct 14, 2020 at 09:54:10AM -0400, Paolo Bonzini wrote:
> Remove from check-block the requirement that all TARGET_DIRS are built.
>
> Signed-off-by: Paolo Bonzini
> ---
> tests/Makefile.include | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Daniel P. Berrangé
Reg
On Wed, Oct 14, 2020 at 09:54:13AM -0400, Paolo Bonzini wrote:
> Confusingly, QEMU_INCLUDES is not used by configure tests. Moving
> it to meson.build ensures that Windows paths are specified instead of
> the msys paths like /c/Users/...
>
> Signed-off-by: Paolo Bonzini
> ---
> configure | 20
On Wed, Oct 14, 2020 at 09:54:14AM -0400, Paolo Bonzini wrote:
> ninja is included in the CentOS PowerTools repository.
>
> Signed-off-by: Paolo Bonzini
> ---
> tests/docker/dockerfiles/centos8.docker | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/tests/docker/dockerfiles/centos8.d
On 14.10.20 18:08, Andrey Shinkevich wrote:
> On 14.10.2020 14:09, Max Reitz wrote:
>> On 12.10.20 19:43, Andrey Shinkevich wrote:
>>> We are going to use the COR-filter for a block-stream job.
>>> To limit COR operations by the base node in the backing chain during
>>> stream job, pass the name of
Signed-off-by: Alexey Baturo
---
target/riscv/cpu.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d63031eb08..8f8ee4d29c 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -255,6 +255,15 @@ static void riscv_cpu_dump_state(CPUS
Signed-off-by: Alexey Baturo
---
target/riscv/cpu.c | 1 +
target/riscv/cpu.h | 11 ++
target/riscv/cpu_bits.h | 66 +
target/riscv/csr.c | 302
4 files changed, 380 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/c
Signed-off-by: Alexey Baturo
---
target/riscv/cpu.c | 4
target/riscv/cpu.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 0bbfd7f457..fe6bab4a52 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -438,6 +438,9 @@ static void ris
This was added as a placeholder for the virt requirement suggested by Maxim
earlier.Agreed that this fdt otherwise has no significance for sbsa-ref
platform nor is being used by ACPI table created for wdt.
-Shashi
On Wed, 14 Oct 2020 at 05:31, Graeme Gregory wrote:
> On Tue, Oct 13, 2020 at 11:
Hi folks,
These patches implement Pointer Masking proposal which is developed by J-ext
group.
This proposal is not yet ratified, but I hope QEMU implementation is done.
The proposal itself could be found here:
https://github.com/riscv/riscv-j-extension
This functionality is submitted as experime
Signed-off-by: Alexey Baturo
---
target/riscv/insn_trans/trans_rva.c.inc | 9 +
target/riscv/insn_trans/trans_rvd.c.inc | 6 ++
target/riscv/insn_trans/trans_rvf.c.inc | 6 ++
target/riscv/insn_trans/trans_rvi.c.inc | 6 ++
target/riscv/translate.c| 12
From: Anatoly Parshintsev
Signed-off-by: Anatoly Parshintsev
---
target/riscv/translate.c | 65
1 file changed, 65 insertions(+)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 79dca2291b..338a967e0c 100644
--- a/target/riscv/tran
On 2020-10-14 11:42, Brijesh Singh wrote:
On 10/14/20 10:17 AM, to...@linux.ibm.com wrote:
From: Tobin Feldman-Fitzthum
AMD SEV allows a guest owner to inject a secret blob
into the memory of a virtual machine. The secret is
encrypted with the SEV Transport Encryption Key and
integrity is guar
On Wed, Oct 14, 2020 at 10:47:21AM +0200, Klaus Jensen wrote:
> On Oct 13 14:06, Keith Busch wrote:
>
> > If we were going to support it here, wouldn't it make more sense to
> > tie it to the filesystem's ability to support fallocate hole punch for
> > the backing namespace, and check if the range
This patch informs future developers working on root complexes, root
ports, or bridges that also wish to implement a BAR for those. PCI type
1 headers only support 2 base address registers. It is incorrect and
difficult to figure out what is wrong with the device when this mistake
is made. With thi
Kevin Wolf writes:
> We can only destroy Monitor objects after we're sure that they are not
> in use by the dispatcher coroutine any more. This fixes crashes like the
> following where we tried to destroy a monitor mutex while the dispatcher
> coroutine still holds it:
>
> (gdb) bt
> #0 0x00
On Wed, Oct 14, 2020 at 12:26 PM Michael S. Tsirkin wrote:
>
> On Wed, Oct 14, 2020 at 12:11:34PM -0400, Raphael Norwitz wrote:
> > On Wed, Oct 14, 2020 at 3:08 AM Michael S. Tsirkin wrote:
> > >
> > > On Tue, Oct 13, 2020 at 08:58:59PM -0400, Raphael Norwitz wrote:
> > > > On Tue, Oct 6, 2020 at
On Wed, Oct 14, 2020 at 01:21:37AM -0400, Cleber Rosa wrote:
> As described in the included documentation, the "custom runner" jobs
> extend the GitLab CI jobs already in place.
>
> Those jobs are intended to run on hardware and/or Operating Systems
> not provided by GitLab's shared runners.
>
>
On Wed, Oct 14, 2020 at 01:21:38AM -0400, Cleber Rosa wrote:
> To run basic jobs on custom runners, the environment needs to be
> properly set up. The most common requirement is having the right
> packages installed.
>
> The playbook introduced here covers a number of different Linux
> distributi
On Wed, Oct 14, 2020 at 01:21:39AM -0400, Cleber Rosa wrote:
> To have the jobs dispatched to custom runners, gitlab-runner must
> be installed, active as a service and properly configured. The
> variables file and playbook introduced here should help with those
> steps.
>
> The playbook introduc
On 14.10.2020 14:59, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
Limit COR operations by the base node in the backing chain when the
overlay base node name is given. It will be useful for a block stream
job when the COR-filter is applied. The overlay base node is passed as
the b
On Wed, Oct 14, 2020 at 01:21:40AM -0400, Cleber Rosa wrote:
> The QEMU project has two machines (aarch64 and s390) that can be used
> for jobs that do build and run tests. This introduces those jobs,
> which are a mapping of custom scripts used for the same purpose.
>
> Signed-off-by: Cleber Ros
On Wed, Oct 14, 2020 at 10:18:53AM -0700, Ben Widawsky wrote:
> This patch informs future developers working on root complexes, root
> ports, or bridges that also wish to implement a BAR for those. PCI type
> 1 headers only support 2 base address registers. It is incorrect and
> difficult to figure
On Wed, Oct 14, 2020 at 01:21:39PM -0400, Raphael Norwitz wrote:
> On Wed, Oct 14, 2020 at 12:26 PM Michael S. Tsirkin wrote:
> >
> > On Wed, Oct 14, 2020 at 12:11:34PM -0400, Raphael Norwitz wrote:
> > > On Wed, Oct 14, 2020 at 3:08 AM Michael S. Tsirkin
> > > wrote:
> > > >
> > > > On Tue, Oct
On 20-10-14 13:52:29, Michael S. Tsirkin wrote:
> On Wed, Oct 14, 2020 at 10:18:53AM -0700, Ben Widawsky wrote:
> > This patch informs future developers working on root complexes, root
> > ports, or bridges that also wish to implement a BAR for those. PCI type
> > 1 headers only support 2 base addr
On 10/13/20 2:46 PM, Rohit Shinde wrote:
Hey John,
Sorry for the late reply! I was in the midst of a job change and
couldn't get time to get to this.
The work sounds interesting! I have a couple of questions regarding this:
1. How do I actually build this part? I am familiar with building a
From: "Dr. David Alan Gilbert"
This is a 3rd cut of an xattr name mapping option for virtiofsd.
It allows the user of virtiofsd to define a fairly flexible mapping
from the view of the xattr names the host fs has and the ones that the
guest sees.
The hope is this allows things like:
a) Dif
From: "Dr. David Alan Gilbert"
Add an option to define mappings of xattr names so that
the client and server filesystems see different views.
This can be used to have different SELinux mappings as
seen by the guest, to run the virtiofsd with less privileges
(e.g. in a case where it can't set trus
From: "Dr. David Alan Gilbert"
Map xattr names originating at the client; from get/set/remove xattr.
Signed-off-by: Dr. David Alan Gilbert
---
tools/virtiofsd/passthrough_ll.c | 101 ++-
1 file changed, 98 insertions(+), 3 deletions(-)
diff --git a/tools/virtiofsd/
From: "Dr. David Alan Gilbert"
The mapping rule system implemented in the last few patches is
extremely flexible, but not easy to use. Add a simple
'map' type as a sprinkling of sugar to make it easy.
e.g.
-o xattrmap=":map::user.virtiofs.:"
would be sufficient to prefix all xattr's
or
-
From: "Dr. David Alan Gilbert"
Add a few examples of xattrmaps to the documentation.
Signed-off-by: Dr. David Alan Gilbert
---
docs/tools/virtiofsd.rst | 50
1 file changed, 50 insertions(+)
diff --git a/docs/tools/virtiofsd.rst b/docs/tools/virtiofsd.
On 10/14/20 4:29 PM, John Snow wrote:
Add short readmes to python/, python/qemu/, and python/qemu/core that
explain the directory hierarchy. These readmes are visible when browsing
Maybe readmes -> READMEs
Otherwise:
Reviewed-by: Philippe Mathieu-Daudé
the source on e.g. gitlab/github and a
From: "Dr. David Alan Gilbert"
Map xattr names coming from the server, i.e. the host filesystem;
currently this is only from listxattr.
Signed-off-by: Dr. David Alan Gilbert
---
tools/virtiofsd/passthrough_ll.c | 89
1 file changed, 89 insertions(+)
diff --git
On 10/14/20 4:29 PM, John Snow wrote:
move python/qemu/*.py to python/qemu/core/*.py and update import
directives across the tree.
This is done to create a PEP420 namespace package, in which we may
create subpackages. To do this, the namespace directory ("qemu") should
not have any modules in it
On 10/14/20 4:29 PM, John Snow wrote:
Signed-off-by: John Snow
---
python/.isort.cfg | 7 ---
python/setup.cfg | 8
2 files changed, 8 insertions(+), 7 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 10/14/20 7:56 PM, Ben Widawsky wrote:
On 20-10-14 13:52:29, Michael S. Tsirkin wrote:
On Wed, Oct 14, 2020 at 10:18:53AM -0700, Ben Widawsky wrote:
This patch informs future developers working on root complexes, root
ports, or bridges that also wish to implement a BAR for those. PCI type
1 h
On Wed, 2020-10-14 at 10:21 +0200, Gerd Hoffmann wrote:
> From: Yonggang Luo
>
> The mingw pkg-config are showing following absolute path and contains
> : as the separator,
>
> -D_XOPEN_SOURCE=600 -D_POSIX_C_SOURCE=199506L -IC:/CI-
> Tools/msys64/mingw64/include/ncursesw:-I/usr/include/ncursesw:
Hello together,
build with enable-docs and install the required packages now it works
with man qemu.
Many thanks for you help
Problem resolved :-)
Best regards
Damian
** Changed in: qemu
Status: Incomplete => Confirmed
** Changed in: qemu
Status: Confirmed => Fix Released
--
On 10/14/20 10:01 AM, Alexey Baturo wrote:
> +if (riscv_has_ext(env, RVH)) {
RVJ.
> +qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mmte", env->mmte);
> +qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "upmbase ", env->upmbase);
> +qemu_fprintf(f, " %s " TARGET_FMT_lx "\n"
On Wed, Oct 14, 2020 at 8:02 AM Bin Meng wrote:
>
> Hi Alistair,
>
> On Wed, Oct 14, 2020 at 10:46 PM Alistair Francis
> wrote:
> >
> > On Wed, Sep 30, 2020 at 12:10 AM Green Wan wrote:
> > >
> > > On Wed, Sep 30, 2020 at 1:08 AM Alistair Francis
> > > wrote:
> > > >
> > > > On Mon, Sep 28, 2
On 14.10.2020 15:01, Max Reitz wrote:
On 12.10.20 19:43, Andrey Shinkevich wrote:
Limit COR operations by the base node in the backing chain when the
overlay base node name is given. It will be useful for a block stream
job when the COR-filter is applied. The overlay base node is passed as
the b
On Wed, Oct 14, 2020 at 06:30:09PM +0100, Daniel P. Berrangé wrote:
> On Wed, Oct 14, 2020 at 01:21:38AM -0400, Cleber Rosa wrote:
> > To run basic jobs on custom runners, the environment needs to be
> > properly set up. The most common requirement is having the right
> > packages installed.
> >
* Bihong Yu (yubih...@huawei.com) wrote:
> Signed-off-by: Bihong Yu
> Reviewed-by: Chuan Zheng
Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/rdma.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/migration/rdma.c b/migration/rdma.c
> index ca4d315..00eac34 10
Because you didn't install the iconv.
On Thu, Oct 15, 2020 at 2:22 AM Bruce Rogers wrote:
>
> On Wed, 2020-10-14 at 10:21 +0200, Gerd Hoffmann wrote:
> > From: Yonggang Luo
> >
> > The mingw pkg-config are showing following absolute path and contains
> > : as the separator,
> >
> > -D_XOPEN_SOUR
On 10/14/20 10:01 AM, Alexey Baturo wrote:
> +static TCGv_i64 apply_pointer_masking(DisasContext *s, TCGv_i64 addr)
> +{
> +gen_pm_adjust_address(s, addr, addr);
> +return addr;
> +}
This function is unused in this patch, which means the series as a whole is
non-bisectable.
Rather than me
* Bihong Yu (yubih...@huawei.com) wrote:
> Signed-off-by: Bihong Yu
> Reviewed-by: Chuan Zheng
OK, sometimes I find initialisation clearer
Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/ram.c| 2 +-
> migration/savevm.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
* Bihong Yu (yubih...@huawei.com) wrote:
> Signed-off-by: Bihong Yu
> Reviewed-by: Chuan Zheng
Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/ram.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/migration/ram.c b/migration/ram.c
> index 0aea78f..09178cc
The purpose of this series is to split the tcg-cpus into
3 variants:
tcg_cpus_mttcg(multithreaded tcg vcpus)
tcg_cpus_rr (single threaded round robin vcpus)
tcg_cpus_icount (same as RR, but using icount)
Ciao,
Claudio
v1 -> v2:
* fixed file preambles to be clearer (Philippe)
* rewo
Signed-off-by: Claudio Fontana
---
accel/tcg/tcg-cpus-icount.c | 24 ++--
accel/tcg/tcg-cpus-icount.h | 6 +--
accel/tcg/tcg-cpus-mttcg.c | 10 ++---
accel/tcg/tcg-cpus-rr.c | 74 ++---
accel/tcg/tcg-cpus-rr.h | 2 +-
accel/tcg/tcg-cpus.c
If iconv installed then it's the meson's probme that didn't found the iconv
properly
On Thu, Oct 15, 2020 at 2:22 AM Bruce Rogers wrote:
>
> On Wed, 2020-10-14 at 10:21 +0200, Gerd Hoffmann wrote:
> > From: Yonggang Luo
> >
> > The mingw pkg-config are showing following absolute path and contains
On Tue, Oct 13, 2020 at 1:31 AM Bin Meng wrote:
>
> Since sifive_plic.h is used by hw/intc/sifive_plic.c,
> it has to be in the public include directory. Move it.
>
> Fixes: 84fcf3c15111 ("hw/riscv: Move sifive_plic model to hw/intc")
> Signed-off-by: Bin Meng
> Reviewed-by: Philippe Mathieu-Daud
split up the CpusAccel tcg_cpus into three TCG variants:
tcg_cpus_rr (single threaded, round robin cpus)
tcg_cpus_icount (same as rr, but with instruction counting enabled)
tcg_cpus_mttcg (multi-threaded cpus)
Suggested-by: Richard Henderson
Signed-off-by: Claudio Fontana
---
accel/tcg/meson.b
On Wed, Oct 14, 2020 at 8:45 AM Richard Henderson
wrote:
>
> On 10/14/20 3:21 AM, Jiangyifei wrote:
> >> Would this be a good time to expand mstatus to uint64_t instead of
> >> target_ulong so that it can be saved as one unit and reduce some ifdefs in
> >> the
> >> code base?
> >>
> >> Similarly
On 10/14/20 10:01 AM, Alexey Baturo wrote:
> +if (has_ext(ctx, RVJ)) {
> +src1 = apply_pointer_masking(ctx, src1);
> +}
The if is redundant, since that will have been done in cpu_get_tb_cpu_state
while assigning pm_enabled.
The test for pm_enabled is in gen_pm_adjust_address.
The
On Wed, Oct 14, 2020 at 02:59:58PM -0400, Cleber Rosa wrote:
> On Wed, Oct 14, 2020 at 06:30:09PM +0100, Daniel P. Berrangé wrote:
> >
> > This needs updating to add meson, and with Paolo's series today you
> > might as well go ahead and add ninja-build immediately too
> >
I replied too quickly,
* Bihong Yu (yubih...@huawei.com) wrote:
> Signed-off-by: Bihong Yu
> Reviewed-by: Chuan Zheng
Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/block.c | 2 +-
> migration/ram.c | 4 ++--
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/migration/block.c b/migration
after the initial split into 3 tcg variants, we proceed to also
split tcg_start_vcpu_thread.
We actually split it in 2 this time, since the icount variant
just uses the round robin function.
Suggested-by: Richard Henderson
Signed-off-by: Claudio Fontana
---
accel/tcg/tcg-all.c | 5 +++
From: "Dr. David Alan Gilbert"
Use of 0x%d - make up our mind as 0x%x
Signed-off-by: Dr. David Alan Gilbert
---
hw/arm/trace-events | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/trace-events b/hw/arm/trace-events
index c8a4d80f6b..a335ee891d 100644
--- a/hw/arm/tra
* Bihong Yu (yubih...@huawei.com) wrote:
> Signed-off-by: Bihong Yu
> Reviewed-by: Chuan Zheng
Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/rdma.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/migration/rdma.c b/migration/rdma.c
> index 0eb42b7..ca4d315
On 10/14/20 9:23 PM, Claudio Fontana wrote:
split up the CpusAccel tcg_cpus into three TCG variants:
tcg_cpus_rr (single threaded, round robin cpus)
tcg_cpus_icount (same as rr, but with instruction counting enabled)
tcg_cpus_mttcg (multi-threaded cpus)
Suggested-by: Richard Henderson
Signed-o
On 10/14/20 9:23 PM, Claudio Fontana wrote:
Signed-off-by: Claudio Fontana
---
accel/tcg/tcg-cpus-icount.c | 24 ++--
accel/tcg/tcg-cpus-icount.h | 6 +--
accel/tcg/tcg-cpus-mttcg.c | 10 ++---
accel/tcg/tcg-cpus-rr.c | 74 ++---
accel/tcg/tcg-
On 10/14/20 9:33 PM, Dr. David Alan Gilbert (git) wrote:
From: "Dr. David Alan Gilbert"
Use of 0x%d - make up our mind as 0x%x
Uh...
Reviewed-by: Philippe Mathieu-Daudé
(hw/arm/... in subject)
Signed-off-by: Dr. David Alan Gilbert
---
hw/arm/trace-events | 2 +-
1 file changed, 1 in
On Wed, 14 Oct 2020 17:25:35 +0200
Christian Schoenebeck wrote:
> On Donnerstag, 8. Oktober 2020 20:34:56 CEST Christian Schoenebeck wrote:
> > All existing 9pfs test cases are using the 'synth' fs driver so far, which
> > means they are not accessing real files, but a purely simulated (in RAM
>
On Tue, Oct 13, 2020 at 8:11 AM Georg Kotheimer
wrote:
>
> When trapping from virt into HS mode, hstatus.SPVP was set to
> the value of sstatus.SPP, as according to the specification both
> flags should be set to the same value.
> However, the assignment of SPVP takes place before SPP itself is
>
On 10/14/20 12:23 PM, Claudio Fontana wrote:
> split up the CpusAccel tcg_cpus into three TCG variants:
>
> tcg_cpus_rr (single threaded, round robin cpus)
> tcg_cpus_icount (same as rr, but with instruction counting enabled)
> tcg_cpus_mttcg (multi-threaded cpus)
>
> Suggested-by: Richard Hender
On Tue, Oct 13, 2020 at 10:31 AM Georg Kotheimer
wrote:
>
> The hstatus.GVA bit was not set if the faulting guest virtual address
> was zero.
>
> Signed-off-by: Georg Kotheimer
Reviewed-by: Alistair Francis
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/cpu_helper.c |
On Tue, Oct 13, 2020 at 10:23 AM Georg Kotheimer
wrote:
>
> The HLVX.WU instruction is supposed to read a machine word,
> but prior to this change it read a byte instead.
>
> Signed-off-by: Georg Kotheimer
Reviewed-by: Alistair Francis
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
>
On Tue, Oct 13, 2020 at 10:41 AM Gerd Hoffmann wrote:
>
> On Tue, Oct 13, 2020 at 12:19:40AM -0700, Paul Zimmerman wrote:
> > I sent you a patch to fix up several assert()s, including that one, about a
> > month ago. Did you miss it?
> > https://lore.kernel.org/qemu-devel/20200920021449.830-1-paul
First of all thank you so much for reviewing these patches!
>RVJ.
Thanks, I missed this typo, will fix it.
>Probably you only want to dump the set that's current.
I don't know for sure how anyone would be using this while debugging PM
related code, but I like the idea, so I'll try to do it, thank
On Tue, Oct 13, 2020 at 3:11 AM Alex Bennée wrote:
>
>
> Edgar E. Iglesias writes:
>
> > On Mon, Oct 12, 2020 at 05:02:57PM +0100, Alex Bennée wrote:
> >>
> >> Alistair Francis writes:
> >>
> >> > On Fri, Oct 9, 2020 at 10:07 AM Alex Bennée
> >> > wrote:
> >> >>
> >> >> Hi,
> >> >>
> >> >> Thi
On Sun, Oct 11, 2020 at 07:29:25PM +0100, Peter Maydell wrote:
> > Migration:
> > Dirtyrate measurement API cleanup
> > Postcopy recovery fixes
> >
> > Virtiofsd:
> > Missing qemu_init_exec_dir call
> > Support for setting the group on socket creation
> > Stop a gcc warning
> > Avoid te
On 10/14/20 12:23 PM, Claudio Fontana wrote:
> +++ b/accel/tcg/tcg-cpus-mttcg.h
> @@ -10,14 +10,4 @@
> #ifndef TCG_CPUS_MTTCG_H
> #define TCG_CPUS_MTTCG_H
>
> -/*
> - * Multi-threaded TCG
> - *
> - * In the multi-threaded case each vCPU has its own thread. The TLS
> - * variable current_cpu can
I believe we shouldn't be conditionalizing running the iconv c program detection
on the iconv library having been found. At least that's my semi-uninformed
analysis so far.
- Bruce
From: 罗勇刚(Yonggang Luo)
Sent: Wednesday, October 14, 2020 1:17 PM
To: Bru
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