Public bug reported:
I have been doing some work cross compiling qemu for Windows using a
minimal Fedora container. Recently I started hitting some timeouts on
the CI service and noticed a build of all targets was going over 1 hour.
It seems like the 'cmp' utility from diffutils is used somewhere
When compiling with GCC 10 (Fedora 32) using CFLAGS=-O2 we get:
CC or1k-softmmu/hw/openrisc/openrisc_sim.o
hw/openrisc/openrisc_sim.c: In function ‘openrisc_sim_init’:
hw/openrisc/openrisc_sim.c:87:42: error: ‘cpu_irqs[0]’ may be used
uninitialized in this function [-Werror=maybe-uni
On 08/06/2020 09.14, Philippe Mathieu-Daudé wrote:
> When compiling with GCC 10 (Fedora 32) using CFLAGS=-O2 we get:
>
> CC or1k-softmmu/hw/openrisc/openrisc_sim.o
> hw/openrisc/openrisc_sim.c: In function ‘openrisc_sim_init’:
> hw/openrisc/openrisc_sim.c:87:42: error: ‘cpu_irqs[0]’ m
On Mon, 8 Jun 2020 03:46:09 +0800
Zhang Chen wrote:
> From: Zhang Chen
>
> No need to reuse MIGRATION_STATUS_ACTIVE boot COLO.
>
> Signed-off-by: Zhang Chen
> Reviewed-by: zhanghailiang
> ---
Looks good and works well in my tests.
Reviewed-by: Lukas Straub
Tested-by: Lukas Straub
Regard
** Changed in: qemu
Status: New => Opinion
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1879672
Title:
QEMU installer with WHPX support
Status in QEMU:
Opinion
Bug description:
People
** Changed in: qemu
Status: New => In Progress
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1881004
Title:
fpu/softfloat.c: error: bitwise negation of a boolean expression
Status in QEMU:
On Mon, 8 Jun 2020 03:46:11 +0800
Zhang Chen wrote:
> From: Zhang Chen
>
> MIGRATION_STATUS_ACTIVE is invalid here, handle it by default case.
>
> Suggested-by: Lukas Straub
> Signed-off-by: Zhang Chen
> ---
Looks good and works well in my tests.
Reviewed-by: Lukas Straub
Tested-by: Lukas
cmp is used in the makefiles.
And there is some kind of warning during build if it is missing:
/bin/sh: cmp: command not found
But perhaps it should abort the build in this case.
Something like that helps:
diff --git a/Makefile b/Makefile
index 40e4f7677bde..05e029bd99db 100644
--- a/Makefile
Emilio G. Cota writes:
> On Tue, Jun 02, 2020 at 16:46:22 +0100, Alex Bennée wrote:
>> This may well end up being anonymous but it should always be unique.
>>
>> Signed-off-by: Alex Bennée
>> ---
>> include/qemu/qemu-plugin.h | 5 +
>> plugins/api.c | 18 ++
On Jun 5 11:10, Andrzej Jakowski wrote:
> So far it was not possible to have CMB and PMR emulated on the same
> device, because BAR2 was used exclusively either of PMR or CMB. This
> patch places CMB at BAR4 offset so it not conflicts with MSI-X vectors.
>
Hi Andrzej,
Thanks for doing this, it'
Hi Aleksandar, Yoshinori, Aurelien.
On 6/1/20 12:34 PM, Aleksandar Markovic wrote:
> On Mon, Jun 1, 2020 at 12:23 PM Philippe Mathieu-Daudé
> wrote:
>>
>> +Peter +Markus as neutral and experienced contributors.
>>
>> On 6/1/20 11:56 AM, Aleksandar Markovic wrote:
>>> On Mon, Jun 1, 2020 at 11:21
Hi Aurelien,
On 6/1/20 11:41 PM, Aurelien Jarno wrote:
> On 2020-06-01 11:20, Philippe Mathieu-Daudé wrote:
>> I don't have much clue about the Renesas hardware, but at least
>> I know now the source files a little bit, so I volunteer to pick
>> up patches and send pull-requests for them during my
On Fri, 5 Jun 2020 17:47:08 +0200
Auger Eric wrote:
> Hi Stefan,
>
> On 6/5/20 5:25 PM, Stefan Berger wrote:
> > On 6/5/20 5:35 AM, Auger Eric wrote:
> >> Hi Stefan,
> >>
> >> On 6/2/20 6:17 PM, Stefan Berger wrote:
> >>> On 6/2/20 12:13 PM, Auger Eric wrote:
> Hi Stefan,
>
> >>>
Hi,
This series clarifies the situation of the SH4 TCG target
and hardware (there are no active maintainers). From here
it should be easier for volunteers to step it.
Maybe patches 7 & 8 can go via acceptance-next queue, and
the rest via qemu-trivial@?
Regards,
Phil.
CI report:
https://travis-
Aurelien Jarno expressed his desire to orphan the SH4 target [*]:
I don't mind being [...] removed from there.
I do not really have time to work on that.
Mark the SH4 TCG target orphan.
Many thanks to Aurelien for his substantial contributions to QEMU,
and for maintaining the SH4 TCG target
Use the MemoryRegion type defined in "qemu/typedefs.h",
to keep the repository style consistent.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20200504081653.14841-2-f4...@amsat.org>
---
include/hw/sh4/sh.h | 5 ++---
1 file changed, 2 insertions(+), 3 deleti
Last commit from Magnus Damm is fc8e320ef583, which date is
Fri Nov 13 2009. As nobody else seems to care about the patches
posted [*] related to the R2D and Shix machines, mark them orphan.
Many thanks to Magnus for his substantial contributions to QEMU,
and for introducing these SH4 based machi
Aurelien Jarno expressed his desire to orphan the SH4 hardware [*]:
I don't mind being [...] removed from there.
I do not really have time to work on that.
Mark the SH4 emulated hardware orphan.
Many thanks to Aurelien for his substantial contributions to QEMU,
and for maintaining the SH4 ha
Remove unused "qemu/timer.h" include.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20200504081653.14841-4-f4...@amsat.org>
---
hw/timer/sh_timer.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/timer/sh_timer.c b/hw/timer/sh_timer.c
index b9cbacf5d0..
Extract timer definitions to 'hw/timer/tmu012.h'.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20200504081653.14841-3-f4...@amsat.org>
---
include/hw/sh4/sh.h | 9 -
include/hw/timer/tmu012.h | 23 +++
hw/sh4/sh7750.c
From: Thomas Huth
Now that we can select the second serial console in the acceptance tests
(see commit 746f244d9720 "Allow to use other serial consoles than default"),
we can also test the sh4 image from the QEMU advent calendar 2018.
Signed-off-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Dau
From: Thomas Huth
Now that we can select the second serial console in the acceptance tests
(see commit 746f244d9720 "Allow to use other serial consoles than default"),
we can also test the sh4 image from the QEMU advent calendar 2018.
Signed-off-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Dau
Hi Igor,
On 6/8/20 10:34 AM, Igor Mammedov wrote:
> On Fri, 5 Jun 2020 17:47:08 +0200
> Auger Eric wrote:
>
>> Hi Stefan,
>>
>> On 6/5/20 5:25 PM, Stefan Berger wrote:
>>> On 6/5/20 5:35 AM, Auger Eric wrote:
Hi Stefan,
On 6/2/20 6:17 PM, Stefan Berger wrote:
> On 6/2/20 1
Remove unnecessary mask, use #define instead of magic.
Philippe Mathieu-Daudé (2):
hw/net/opencores_eth: Use definitions instead of magic values
hw/net/opencores_eth: Remove unnecessary address masking
hw/net/opencores_eth.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
--
2.
Use definitions from "hw/net/mii.h".
This also helps when using git-grep.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/net/opencores_eth.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c
index 2ba0dc8c2f..90d3846bb7 100644
-
The memory region is limited to 1 KiB, so the address is
garantied to be in that range. No need to mask.
711 static const MemoryRegionOps open_eth_desc_ops = {
712 .read = open_eth_desc_read,
713 .write = open_eth_desc_write,
714 };
...
725 memory_region_init_io(&s->desc_io
Philippe Mathieu-Daudé writes:
> On 6/8/20 8:03 AM, Markus Armbruster wrote:
>> Markus Armbruster writes:
>>
>>> Peter Maydell writes:
>>>
On Fri, 29 May 2020 at 17:23, Christophe de Dinechin
wrote:
> On 2020-05-26 at 20:51 CEST, Eric Blake wrote...
>> diff --git a/hw/openri
Am 06.06.2020 um 08:55 hat Vladimir Sementsov-Ogievskiy geschrieben:
> 05.06.2020 13:59, Peter Krempa wrote:
> > On Fri, Jun 05, 2020 at 12:07:47 +0200, Kevin Wolf wrote:
> > > Am 05.06.2020 um 11:58 hat Peter Krempa geschrieben:
> > > > On Fri, Jun 05, 2020 at 11:44:07 +0200, Kevin Wolf wrote:
> >
On Mon, Jun 8, 2020 at 2:15 AM Philippe Mathieu-Daudé wrote:
>
> Use definitions from "hw/net/mii.h".
> This also helps when using git-grep.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/net/opencores_eth.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Max Filippo
On Mon, Jun 8, 2020 at 2:15 AM Philippe Mathieu-Daudé wrote:
>
> The memory region is limited to 1 KiB, so the address is
> garantied to be in that range. No need to mask.
>
> 711 static const MemoryRegionOps open_eth_desc_ops = {
> 712 .read = open_eth_desc_read,
> 713 .write = open
Hi, Philippe,
Sorry for missing your mail.
We are still maintaining HAX accelerator in QEMU. The status had been added as
below in MAINTAINERS line 458. I noticed that the only difference with your
commit is the last third line. The file accel/stubs/hax-stub.c is missed in the
current files, w
Note that you can start QEMU with the "-S" flag which means CPUS are
paused. This gives you ability to run the "set_link" monitor command
above, and then run "cont" to actually start the VM. Less convenient
that a CLI flag, but functionally it is eqivalent.
--
You received this bug notification b
lo_setattr() invokes fchmod() in a rarely used code path, so it should
be whitelisted or virtiofsd will crash with EBADSYS.
Said code path can be triggered for example as follows:
On the host, in the shared directory, create a file with the sticky bit
set and a security.capability xattr:
(1) # to
On Sat, Jun 06, 2020 at 09:55:13 +0300, Vladimir Sementsov-Ogievskiy wrote:
> 05.06.2020 13:59, Peter Krempa wrote:
> > On Fri, Jun 05, 2020 at 12:07:47 +0200, Kevin Wolf wrote:
> > > Am 05.06.2020 um 11:58 hat Peter Krempa geschrieben:
> > > > On Fri, Jun 05, 2020 at 11:44:07 +0200, Kevin Wolf wro
'force' option will be used for some unsafe amend operations.
This includes things like erasing last keyslot in luks based formats
(which destroys the data, unless the master key is backed up
by external means), but that _might_ be desired result.
Signed-off-by: Maxim Levitsky
Reviewed-by: Danie
clone of "luks-keymgmnt-v2"
Maxim Levitsky (14):
qcrypto/core: add generic infrastructure for crypto options amendment
qcrypto/luks: implement encryption key management
block/amend: add 'force' option
block/amend: separate amend and create options for qemu-img
block/amend: refactor qcow2
Next few patches will expose that functionality to the user.
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
crypto/block-luks.c | 416 +++-
qapi/crypto.json| 59 ++-
2 files changed, 469 insertions(+), 6 deletions(-)
diff --gi
Some options are only useful for creation
(or hard to be amended, like cluster size for qcow2), while some other
options are only useful for amend, like upcoming keyslot management
options for luks
Since currently only qcow2 supports amend, move all its options
to a common macro and then include i
Some qcow2 create options can't be used for amend.
Remove them from the qcow2 create options and add generic logic to detect
such options in qemu-img
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
block/qcow2.c | 138 --
qemu-img.c
This implements the encryption key management using the generic code in
qcrypto layer and exposes it to the user via qemu-img
This code adds another 'write_func' because the initialization
write_func works directly on the underlying file, and amend
works on instance of luks device.
This commit al
This will be used first to implement luks keyslot management.
block_crypto_amend_opts_init will be used to convert
qemu-img cmdline to QCryptoBlockAmendOptions
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
block/crypto.c | 17 +
block/crypto.h
rename the write_func to create_write_func, and init_func to create_init_func.
This is preparation for other write_func that will be used to update the
encryption keys.
No functional changes
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
block/crypto.c | 25
This allows more tests to be able to have same output on both qcow2 luks
encrypted images
and raw luks images
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
tests/qemu-iotests/087.out | 6 +++---
tests/qemu-iotests/134.out | 2 +-
tests/qemu-iotests/158.out
Now that we have all the infrastructure in place,
wire it in the qcow2 driver and expose this to the user.
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Max Reitz
---
block/qcow2.c | 71 +-
tests/qemu-iotests/082.out
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Max Reitz
---
block/crypto.c | 72
qapi/block-core.json | 14 -
2 files changed, 66 insertions(+), 20 deletions(-)
diff --git a/block/crypto.c b/block/crypto.c
blockdev-amend will be used similiar to blockdev-create
to allow on the fly changes of the structure of the format based block devices.
Current plan is to first support encryption keyslot management for luks
based formats (raw and embedded in qcow2)
Signed-off-by: Maxim Levitsky
Reviewed-by: Dan
This commit adds two tests, which test the new amend interface
of both luks raw images and qcow2 luks encrypted images.
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
tests/qemu-iotests/293 | 207 +
tests/qemu-iotests/293.out | 99
On 08/06/2020 11.01, Philippe Mathieu-Daudé wrote:
> Last commit from Magnus Damm is fc8e320ef583, which date is
> Fri Nov 13 2009. As nobody else seems to care about the patches
> posted [*] related to the R2D and Shix machines, mark them orphan.
>
> Many thanks to Magnus for his substantial con
This commit adds two tests that cover the
new blockdev-amend functionality of luks and qcow2 driver
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
---
tests/qemu-iotests/295 | 279 +
tests/qemu-iotests/295.out | 40 ++
tests/qemu-iotes
Currently the implementation only supports amending the encryption
options, unlike the qemu-img version
Signed-off-by: Maxim Levitsky
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Max Reitz
---
block/qcow2.c| 39 +++
qapi/block-core.json | 16
From: Andrey Shinkevich
Sent: Monday, June 8, 2020 8:48 AM
To: Vladimir Sementsov-Ogievskiy ;
qemu-bl...@nongnu.org
Cc: qemu-devel@nongnu.org ; mre...@redhat.com
; kw...@redhat.com ; ebl...@redhat.com
; Denis Lunev
Subject: Re: [PATCH v5 12/13] qcow2: QcowHe
нед, 7. јун 2020. у 22:29 је написао/ла:
>
> Patchew URL:
> https://patchew.org/QEMU/1591559185-31287-1-git-send-email-aleksandar.qemu.de...@gmail.com/
>
>
>
> Hi,
>
> This series failed the docker-quick@centos7 build test. Please find the
> testing commands and
> their output below. If you have
On Sun, Jun 07, 2020 at 08:53:52AM +0200, Thomas Huth wrote:
> Hi David,
>
> could you maybe take this through your ppc tree?
Sounds reasonable, but this version doesn't seem to apply any more.
>
> Thanks,
> Thomas
>
>
> On 01/06/2020 13.28, Claudio Fontana wrote:
> > Hello all,
> >
> >
Philippe Mathieu-Daudé writes:
> The KVM files has been moved from target-ARCH to the target/ARCH/
> folder in commit fcf5ef2a. Fix the pathname expansion.
>
> Fixes: fcf5ef2a ("Move target-* CPU file into a target/ folder")
> Reviewed-by: Richard Henderson
> Reviewed-by: Thomas Huth
> Signed
Philippe Mathieu-Daudé writes:
> Reviewed-by: Richard Henderson
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
> ---
> MAINTAINERS | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 948790b433..f725c12161 100644
> ---
08.06.2020 12:21, Kevin Wolf wrote:
Am 06.06.2020 um 08:55 hat Vladimir Sementsov-Ogievskiy geschrieben:
05.06.2020 13:59, Peter Krempa wrote:
On Fri, Jun 05, 2020 at 12:07:47 +0200, Kevin Wolf wrote:
Am 05.06.2020 um 11:58 hat Peter Krempa geschrieben:
On Fri, Jun 05, 2020 at 11:44:07 +0200,
On Fri, 5 Jun 2020 18:47:58 +0200
Greg Kurz wrote:
> On Fri, 5 Jun 2020 12:03:21 -0400
> Igor Mammedov wrote:
>
> > Deprecation period is run out and it's a time to flip the switch
> > introduced by cd5ff8333a. Disable legacy option for new machine
> > types (since 5.1) and amend documentatio
On Fri, 5 Jun 2020 at 17:50, Peter Maydell wrote:
>
> Arm queue; some of the simpler stuff, things other have reviewed (thanks!),
> etc.
>
> -- PMM
>
> The following changes since commit 5d2f557b47dfbf8f23277a5bdd8473d4607c681a:
>
> Merge remote-tracking branch
> 'remotes/kraxel/tags/vga-20200
Philippe Mathieu-Daudé writes:
> One might get caught trying to understand unexpected Makefile
> behavior. Trailing backslash can help to split very long lines,
> but are rather dangerous when nothing follow. Preserve other
> developers debugging time by removing this one.
>
> Reviewed-by: Thom
Philippe Mathieu-Daudé writes:
> Add a rule to return the base architecture for a QEMU target.
>
> The current list of TARGET_BASE_ARCH is:
>
> $ git grep TARGET_BASE_ARCH configure
> configure:7785:TARGET_BASE_ARCH=""
> configure:7795:TARGET_BASE_ARCH=i386
> configure:7813:TAR
Philippe Mathieu-Daudé writes:
> Move the accel selectors from the global Kconfig.host to their
> own Kconfig file.
>
> Reviewed-by: Richard Henderson
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
--
Alex Bennée
Philippe Mathieu-Daudé writes:
> Having one entry per line helps reviews/refactors. As we are
> going to modify the MINIKCONF variables, split them now to
> ease further review.
>
> Reviewed-by: Richard Henderson
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
--
Alex Ben
Philippe Mathieu-Daudé writes:
> Expose the CONFIG_TCG selector to let minikconf.py uses it.
>
> When building with --disable-tcg build, this helps to deselect
> devices that are TCG-dependent.
>
> Reviewed-by: Richard Henderson
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Benné
On Wed, 3 Jun 2020 at 00:58, Richard Henderson
wrote:
>
> Intended to be nested within overlapping groups.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Suggested-by: Peter Maydell
> Signed-off-by: Richard Henderson
> ---
> scripts/decodetree.py | 18 ++
> 1 file changed, 14 insert
On Wed, 3 Jun 2020 at 00:58, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> tests/decode/err_pattern_group_nest1.decode | 14 ++
> tests/decode/err_pattern_group_nest2.decode | 6 ++
> tests/decode/err_pattern_group_nest3.decode | 14 ++
> t
On 08/06/2020 11.01, Philippe Mathieu-Daudé wrote:
> Use the MemoryRegion type defined in "qemu/typedefs.h",
> to keep the repository style consistent.
>
> Signed-off-by: Philippe Mathieu-Daudé
> Reviewed-by: Richard Henderson
> Message-Id: <20200504081653.14841-2-f4...@amsat.org>
> ---
> inclu
08.06.2020 12:38, Peter Krempa wrote:
On Sat, Jun 06, 2020 at 09:55:13 +0300, Vladimir Sementsov-Ogievskiy wrote:
05.06.2020 13:59, Peter Krempa wrote:
On Fri, Jun 05, 2020 at 12:07:47 +0200, Kevin Wolf wrote:
Am 05.06.2020 um 11:58 hat Peter Krempa geschrieben:
On Fri, Jun 05, 2020 at 11:44:
пет, 5. јун 2020. у 20:28 Eric Blake је написао/ла:
>
> On 6/5/20 1:09 PM, Peter Maydell wrote:
>
> > If there's an ordering requirement here we should make it clearer,
> > or somebody is going to do the obvious "tidying up" at some point
> > in the future.
> >
> > Perhaps this whole set of lines
Paolo Bonzini writes:
> On 19/05/20 16:54, Markus Armbruster wrote:
>> Paolo recently suggested "to move the bus argument (and thus
>> qdev_set_parent_bus) to qdev_init"[1], and that it "would be quite
>> large but hopefully scriptable"[2]. Nerd sniped!
>>
>> The series is big, but at least the
On 08/06/20 12:56, Markus Armbruster wrote:
>> Great stuff, I only had some comments on the commit messages. I still
>> have to review patches 47 and 48 more corefully.
> Does this translate into any Reviewed-bys? On v2, maybe?
>
Yes, please add my Reviewed-by on v2.
Paolo
Philippe Mathieu-Daudé writes:
> From: Philippe Mathieu-Daudé
>
> The TCG helpers where added in b92e5a22ec3 in softmmu_template.h.
> probe_write() was added in there in 3b4afc9e75a to be moved out
> to accel/tcg/cputlb.c in 3b08f0a9254, and was later refactored
> as probe_access() in c25c283d
Philippe Mathieu-Daudé writes:
> Allow use of target-specific Kconfig file.
>
> Reviewed-by: Richard Henderson
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> Makefile | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Makefile b/Makefile
> index f8a45e1379..d5009cd3
Markus Armbruster writes:
> This fixes a bunch of bugs I ran into while reworking how qdevs plug
> into buses.
>
> I instrumented the code a bit to flush out instances of bug patterns.
> I posted these hacks separately as '[PATCH not-for-merge 0/5]
> Instrumentation for "Fixes around device reali
On 6/8/20 11:52 AM, David Gibson wrote:
> On Sun, Jun 07, 2020 at 08:53:52AM +0200, Thomas Huth wrote:
>> Hi David,
>>
>> could you maybe take this through your ppc tree?
>
> Sounds reasonable, but this version doesn't seem to apply any more.
Hi David,
which problem are you experiencing?
I hav
On Sun, May 24, 2020 at 10:21 PM Philippe Mathieu-Daudé wrote:
>
> On 5/24/20 9:37 PM, Aleksandar Markovic wrote:
> > нед, 24. мај 2020. у 18:58 Philippe Mathieu-Daudé
> > је написао/ла:
> >>
> >> ping?
> >>
> >
> > I agree with all of your patches, they absolutely make sense to me,
> > but I wou
As a follow-up to the thread that started with
https://lists.gnu.org/archive/html/qemu-devel/2020-06/msg01018.html
Most of the a57/a53/a72 init functions is currently identical lines,
with some individual options set up differently.
Some of that duplication can be considered to be likely to apply
Move the id register initializations identical between the platforms in
this file into a standalone helper function, and change the cpu-specific
The value of mmfr0 set for a57 and a53 violates the ARM architecture
reference manual, but matches the values set in actual hardware r1p0 a57
and r0p4 a5
Some basic options will be set by all aarch64 platforms.
Break those out into a separate aarch64_cpu_common_init function, which
also takes implementer, partnum, variant, and revision as arguments to
set up MIDR.
Invoke this to remove duplication between a57/a53/a72 init.
Signed-off-by: Leif Lind
s390x is our only big endian host in our CI, so building and testing QEMU
there is quite valuable. Thus let's also test the other targets with
additional jobs (also using different sets of pre-installed libraries to
get a better coverage of the things that we test).
Signed-off-by: Thomas Huth
---
Drop the call to aarch64_a57_initfn from aarch64_max_initfn, replacing it
with calls to aarch64_cpu_common_init and cortex_a72_a57_a53_common_init.
Cache and GIC configuration is now set directly, using aarch64_a72_initfn
as a template.
Set cpu->dtb_compatible to "qemu,aarch64-max".
This has the
On 08/06/2020 12:08, Markus Armbruster wrote:
> Markus Armbruster writes:
>
>> This fixes a bunch of bugs I ran into while reworking how qdevs plug
>> into buses.
>>
>> I instrumented the code a bit to flush out instances of bug patterns.
>> I posted these hacks separately as '[PATCH not-for-mer
On 28/05/2020 12:04, Markus Armbruster wrote:
> These devices go with the "via-pmu" device, which is controlled by
> property "has-pmu". macio_newworld_init() creates it unconditionally,
> because the property has not been set then. macio_newworld_realize()
> realizes it only when the property i
Patchew URL:
https://patchew.org/QEMU/20200608094030.670121-1-mlevi...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200608094030.670121-1-mlevi...@redhat.com
Subject: [PATCH v8 00/14] LUKS: encryption slot managemen
On 08/06/2020 13:40, Thomas Huth wrote:
> s390x is our only big endian host in our CI, so building and testing QEMU
> there is quite valuable. Thus let's also test the other targets with
> additional jobs (also using different sets of pre-installed libraries to
> get a better coverage of the things
On Fri, 5 Jun 2020 16:38:37 +
Salil Mehta wrote:
> > From: Igor Mammedov [mailto:imamm...@redhat.com]
> > Sent: Friday, June 5, 2020 4:31 PM
> > To: Andrew Jones
> > Cc: Salil Mehta ; qemu-devel@nongnu.org;
> > qemu-...@nongnu.org; Peter Maydell ;
> > m...@redhat.com
> > Subject: Re: [Quest
On Mon, Jun 08, 2020 at 13:30:48 +0300, Vladimir Sementsov-Ogievskiy wrote:
> 08.06.2020 12:38, Peter Krempa wrote:
> > On Sat, Jun 06, 2020 at 09:55:13 +0300, Vladimir Sementsov-Ogievskiy wrote:
> > > 05.06.2020 13:59, Peter Krempa wrote:
[...]
> >
> > It's not only a "user forgot" thing, but m
Hmm ... I managed to accidentally mark this one as read.
Anyway, I spent the Friday writing the RFC I just sent out instead.
On Thu, Jun 04, 2020 at 19:43:06 +0100, Peter Maydell wrote:
> On Thu, 4 Jun 2020 at 17:26, Leif Lindholm wrote:
> >
> > On Thu, Jun 04, 2020 at 17:09:30 +0100, Peter Mayd
Deprecation period is run out and it's a time to flip the switch
introduced by cd5ff8333a. Disable legacy option for new machine
types (since 5.1) and amend documentation.
'-numa node,memdev' shall be used instead of disabled option
with new machine types.
Signed-off-by: Igor Mammedov
Reviewed-
On 6/8/20 1:40 PM, Thomas Huth wrote:
> s390x is our only big endian host in our CI, so building and testing QEMU
> there is quite valuable. Thus let's also test the other targets with
> additional jobs (also using different sets of pre-installed libraries to
> get a better coverage of the things t
On 27/05/2020 09:47, Markus Armbruster wrote:
> Extracted from my '[PATCH not-for-merge 0/5] Instrumentation for
> "Fixes around device realization"' on reviewer's advice.
>
> Markus Armbruster (2):
> qom: Constify object_get_canonical_path{,_component}()'s parameter
> qom: Make "info qom-tre
From: fangying
Virtual time adjustment was implemented for virt-5.0 machine type,
but the cpu property was enabled only for host-passthrough and
max cpu model. Let's add it for arm cpu which has the generic timer
feature enabled.
Suggested-by: Andrew Jones
Signed-off-by: Ying Fang
---
v3:
- s
On 08.06.20 11:40, Maxim Levitsky wrote:
> This implements the encryption key management using the generic code in
> qcrypto layer and exposes it to the user via qemu-img
>
> This code adds another 'write_func' because the initialization
> write_func works directly on the underlying file, and amen
On 08.06.20 11:40, Maxim Levitsky wrote:
> clone of "luks-keymgmnt-v2"
>
> Maxim Levitsky (14):
> qcrypto/core: add generic infrastructure for crypto options amendment
> qcrypto/luks: implement encryption key management
> block/amend: add 'force' option
> block/amend: separate amend and cr
On Mon, 8 Jun 2020 at 12:40, Leif Lindholm wrote:
>
> Some basic options will be set by all aarch64 platforms.
> Break those out into a separate aarch64_cpu_common_init function, which
> also takes implementer, partnum, variant, and revision as arguments to
> set up MIDR.
>
> Invoke this to remove
On Mon, 8 Jun 2020 at 12:40, Leif Lindholm wrote:
>
> Move the id register initializations identical between the platforms in
> this file into a standalone helper function, and change the cpu-specific
>
> The value of mmfr0 set for a57 and a53 violates the ARM architecture
> reference manual, but
On Sat, 6 Jun 2020 at 14:19, Laurent Vivier wrote:
>
> The following changes since commit ddc760832fa8cf5e93b9d9e6e854a5114ac63510:
>
> Merge remote-tracking branch 'remotes/gkurz/tags/9p-next-2020-05-26' into s=
> taging (2020-05-26 14:05:53 +0100)
>
> are available in the Git repository at:
>
On Mon, 8 Jun 2020 at 13:02, Leif Lindholm wrote:
> On Thu, Jun 04, 2020 at 19:43:06 +0100, Peter Maydell wrote:
> > https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/cpus.yaml
> > is the official list of permitted strings, incidentally.
>
> My feeling is none of the values there ar
On Mon, Jun 08, 2020 at 08:12:43PM +0800, Ying Fang wrote:
> From: fangying
>
> Virtual time adjustment was implemented for virt-5.0 machine type,
> but the cpu property was enabled only for host-passthrough and
> max cpu model. Let's add it for arm cpu which has the generic timer
> feature enabl
Hi Richard,
I am doing bfloat16 support on QEMU.
Once I tried to reuse float32 interface, but I couldn't properly process
rounding in some insns like fadd.
What's your opinion about it? Should I expand the fpu/softfloat?
Best Regards,
Zhiwei
On Mon, Jun 08, 2020 at 08:03:44AM -0400, Igor Mammedov wrote:
> Deprecation period is run out and it's a time to flip the switch
> introduced by cd5ff8333a. Disable legacy option for new machine
> types (since 5.1) and amend documentation.
>
> '-numa node,memdev' shall be used instead of disable
1 - 100 of 321 matches
Mail list logo