On 4/30/20 7:23 AM, Yan Zhao wrote:
for vfio regions that are without write permission,
drop guest writes to those regions.
Cc: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
The full domain name is redhat.com.
Signed-off-by: Yan Zhao
Signed-off-by: Xin Zeng
---
hw/vfio/com
On 4/30/20 7:19 AM, Yan Zhao wrote:
for ram device regions, drop guest writes if the regions is read-only.
Cc: Philippe Mathieu-Daudé
Signed-off-by: Yan Zhao
Signed-off-by: Xin Zeng
---
memory.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/memory.c b
Daniel P. Berrangé writes:
> On Wed, Apr 29, 2020 at 05:28:25PM +0200, Markus Armbruster wrote:
>> Is there any sane use for configuring backends via any of the default
>> mechanisms?
>>
>> I'm aware of one, but it's outdated: -global isa-fdc.driveA=... Use
>> -device floppy instead.
>>
>> I'd
On Thu, Apr 30, 2020 at 03:02:36PM +0800, Philippe Mathieu-Daudé wrote:
> On 4/30/20 7:23 AM, Yan Zhao wrote:
> > for vfio regions that are without write permission,
> > drop guest writes to those regions.
> >
> > Cc: Philippe Mathieu-Daudé
> > Reviewed-by: Philippe Mathieu-Daudé
>
> The full d
On Thu, Apr 30, 2020 at 03:07:21PM +0800, Philippe Mathieu-Daudé wrote:
> On 4/30/20 7:19 AM, Yan Zhao wrote:
> > for ram device regions, drop guest writes if the regions is read-only.
> >
> > Cc: Philippe Mathieu-Daudé
> > Signed-off-by: Yan Zhao
> > Signed-off-by: Xin Zeng
> > ---
> > memor
On 4/29/20 1:02 PM, Gerd Hoffmann wrote:
Needed for -soundhw cleanup.
Signed-off-by: Gerd Hoffmann
---
stubs/pci-bus.c | 7 +++
stubs/Makefile.objs | 1 +
2 files changed, 8 insertions(+)
create mode 100644 stubs/pci-bus.c
diff --git a/stubs/pci-bus.c b/stubs/pci-bus.c
new file m
On 4/29/20 1:02 PM, Gerd Hoffmann wrote:
Needed for -soundhw cleanup.
Signed-off-by: Gerd Hoffmann
---
stubs/isa-bus.c | 7 +++
stubs/Makefile.objs | 1 +
2 files changed, 8 insertions(+)
create mode 100644 stubs/isa-bus.c
diff --git a/stubs/isa-bus.c b/stubs/isa-bus.c
new file m
Signed-off-by: LIU Zhiwei
---
test_riscv64.s | 85 ++
1 file changed, 85 insertions(+)
create mode 100644 test_riscv64.s
diff --git a/test_riscv64.s b/test_riscv64.s
new file mode 100644
index 000..5a8279f
--- /dev/null
+++ b/test_riscv64.s
@@
Signed-off-by: LIU Zhiwei
---
risu_reginfo_riscv64.h | 29 +
1 file changed, 29 insertions(+)
create mode 100644 risu_reginfo_riscv64.h
diff --git a/risu_reginfo_riscv64.h b/risu_reginfo_riscv64.h
new file mode 100644
index 000..7d365a8
--- /dev/null
+++ b/risu_r
When I test RISCV vector extension, many folks advice risu. Here is a
very simple port only support RV64I, RV64F, RV64M.
It's some difficult when I try to support RV32, because it's very
similiar to RV64, so I can't make two .risu files like arm.risu and
aarch64.risu.
Any idea are welcomed.
LIU
Signed-off-by: LIU Zhiwei
---
riscv64.risu | 43 +++
1 file changed, 43 insertions(+)
diff --git a/riscv64.risu b/riscv64.risu
index 98141ab..f006dc8 100644
--- a/riscv64.risu
+++ b/riscv64.risu
@@ -139,3 +139,46 @@ SRLW RISCV 000 rs2:5 rs1:5 101 rd:5
For RV64 risu, make CFLAGS="-march=rv64g"
Signed-off-by: LIU Zhiwei
---
configure | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/configure b/configure
index ca2d7db..5c9e967 100755
--- a/configure
+++ b/configure
@@ -58,6 +58,8 @@ guess_arch() {
ARCH="m68k"
Signed-off-by: LIU Zhiwei
---
riscv64.risu | 141 +++
1 file changed, 141 insertions(+)
create mode 100644 riscv64.risu
diff --git a/riscv64.risu b/riscv64.risu
new file mode 100644
index 000..98141ab
--- /dev/null
+++ b/riscv64.risu
@@ -0,0 +
After looking at Gerd's "audio: deprecate -soundhw":
https://www.mail-archive.com/qemu-devel@nongnu.org/msg698818.html
I updated a patch I started some time ago.
It is unfinished due to problem with hda-intel and pcspk. I have
some idea how to fix pcspk, but it invasive. I haven't looked at
hda-int
Signed-off-by: LIU Zhiwei
---
risu_reginfo_riscv64.c | 134 +
risu_riscv64.c | 47 +++
2 files changed, 181 insertions(+)
create mode 100644 risu_reginfo_riscv64.c
create mode 100644 risu_riscv64.c
diff --git a/risu_reginfo_riscv64.c
Signed-off-by: LIU Zhiwei
---
risugen_riscv.pm | 501 +++
1 file changed, 501 insertions(+)
create mode 100644 risugen_riscv.pm
diff --git a/risugen_riscv.pm b/risugen_riscv.pm
new file mode 100644
index 000..092c246
--- /dev/null
+++ b/risugen_ri
Signed-off-by: LIU Zhiwei
---
riscv64.risu | 78
1 file changed, 78 insertions(+)
diff --git a/riscv64.risu b/riscv64.risu
index f006dc8..0b81dfb 100644
--- a/riscv64.risu
+++ b/riscv64.risu
@@ -181,4 +181,82 @@ REMW RISCV 001 rs2:5 rs1:5
On Thu, Apr 30, 2020 at 10:18 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 4/29/20 5:20 PM, 罗勇刚(Yonggang Luo) wrote:
> > Question, in hard-float, if we don't want to read the fp register.
> > for example: If we wanna compute c = a + b in fp32
> > if c = a + b In hard float
> >
From: Gerd Hoffmann
Needed for -soundhw cleanup.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20200429110214.29037-2-kra...@redhat.com>
[PMD: Use g_assert_not_reached()]
Signed-off-by: Philippe Mathieu-Daudé
---
stubs/isa-bu
From: Gerd Hoffmann
Needed for -soundhw cleanup.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20200429110214.29037-3-kra...@redhat.com>
[PMD: Use g_assert_not_reached()]
Signed-off-by: Philippe Mathieu-Daudé
---
stubs/pci-bu
From: Philippe Mathieu-Daudé
Introduce the SOUNDHW_CMDLINE_INTERFACE QOM type to replace the
deprecated register_soundhw() API.
The conversion of devices calling isa_register_soundhw() /
pci_register_soundhw() is easy:
- Add SOUNDHW_CMDLINE_INTERFACE to InterfaceInfo[],
- Set cmdline_name to the
On Wed, Apr 29, 2020 at 06:54:08PM +0200, Philippe Mathieu-Daudé wrote:
> Hi Gerd,
>
> On 4/29/20 1:02 PM, Gerd Hoffmann wrote:
> >
> >
> > Gerd Hoffmann (12):
> >stubs: add isa_create_simple
> >stubs: add pci_create_simple
> >audio: add deprecated_register_soundhw
> >audio: depr
And I am try Windows 10 build 19613，but was cant not start，too(sorry，My
english It's not well)
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1869858
Title:
qemu can't start Windows10arm64 19H1(with
I try use latest qemu，but It was the same
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1869858
Title:
qemu can't start Windows10arm64 19H1(with kvm)
Status in QEMU:
Incomplete
Bug description:
Am 30.04.2020 um 08:57 hat Philippe Mathieu-Daudé geschrieben:
> Keep an eye on these "same same, but different" files.
>
> Acked-by: Alex Bennée
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> ind
On 4/30/20 9:41 AM, Gerd Hoffmann wrote:
On Wed, Apr 29, 2020 at 06:54:08PM +0200, Philippe Mathieu-Daudé wrote:
Hi Gerd,
On 4/29/20 1:02 PM, Gerd Hoffmann wrote:
Gerd Hoffmann (12):
stubs: add isa_create_simple
stubs: add pci_create_simple
audio: add deprecated_register_soundhw
On 29.04.20 16:57, Dr. David Alan Gilbert wrote:
> * Dr. David Alan Gilbert (dgilb...@redhat.com) wrote:
>> * Max Reitz (mre...@redhat.com) wrote:
>>> Currently, setup_mounts() bind-mounts the shared directory without
>>> MS_REC. This makes all submounts disappear.
>>>
>>> Pass MS_REC so that the
罗勇刚(Yonggang Luo) writes:
> On Thu, Apr 30, 2020 at 10:18 AM Richard Henderson <
> richard.hender...@linaro.org> wrote:
>
>> On 4/29/20 5:20 PM, 罗勇刚(Yonggang Luo) wrote:
>> > Question, in hard-float, if we don't want to read the fp register.
>> > for example: If we wanna compute c = a + b in fp
I propose a new way to computing the float flags,
We preserve a float computing cash
typedef struct FpRecord {
uint8_t op;
float32 A;
float32 B;
} FpRecord;
FpRecord fp_cache[1024];
int fp_cache_length;
uint32_t fp_exceptions;
1. For each new fp operation we push it to the fp_cache,
2. On
guest writes to read-only memory regions need to be dropped.
patch 1 modifies handler of ram device memory regions to drop guest writes
to read-only ram device memory regions
patch 2 modifies handler of non-mmap'd read-only vfio regions to drop guest
writes to those regions
patch 3 set read-onl
for ram device regions, drop guest writes if the region is read-only.
Cc: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yan Zhao
Signed-off-by: Xin Zeng
---
memory.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/memory.c b/mem
29.04.2020 18:50, Eric Blake wrote:
On 4/27/20 3:23 AM, Vladimir Sementsov-Ogievskiy wrote:
We are generally moving to int64_t for both offset and bytes parameters
on all io paths. Convert tracked requests now.
As mentioned elsewhere in the thread, this states 'what' but not 'why'; adding
a b
for vfio regions that are without write permission,
drop guest writes to those regions.
Cc: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yan Zhao
Signed-off-by: Xin Zeng
---
hw/vfio/common.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
dif
On 29.04.20 15:02, Vladimir Sementsov-Ogievskiy wrote:
> 29.04.2020 15:17, Max Reitz wrote:
>> On 29.04.20 12:37, Vladimir Sementsov-Ogievskiy wrote:
>>> 29.04.2020 13:24, Max Reitz wrote:
On 28.04.20 22:00, Denis Plotnikov wrote:
> zstd significantly reduces cluster compression time.
along side setting host page table to be read-only, the memory regions
are also required to be read-only, so that when guest writes to the
read-only & mmap'd regions, vmexits would happen and region write handlers
are called.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yan Zhao
Signed-off
29.04.2020 18:50, Eric Blake wrote:
On 4/27/20 3:23 AM, Vladimir Sementsov-Ogievskiy wrote:
We are generally moving to int64_t for both offset and bytes parameters
on all io paths. Convert tracked requests now.
As mentioned elsewhere in the thread, this states 'what' but not 'why'; adding
a b
On Sat, Apr 11, 2020 at 04:35:44AM -0400, Catherine Ho wrote:
> @@ -1702,10 +1703,11 @@ static void update_open_flags(int writeback, struct
> fuse_file_info *fi)
>
> /*
> * O_DIRECT in guest should not necessarily mean bypassing page
> - * cache on host as well. If somebody needs
On Wed, Apr 29, 2020 at 11:40:32PM +0300, Manuel Hohmann wrote:
> Hi,
>
> I encountered the following error message on the QEMU 5.0.0 release, compiled
> and run inside a docker image:
>
> "cannot bind memory to host NUMA nodes: Operation not permitted"
The error is reporting that mbind() faile
On Thu, Apr 30, 2020 at 07:23:59AM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé writes:
> > +check-flake8:
> > + $(call quiet-command,flake8 --ignore=$(FLAKE8_IGNORE) $(PYTHON_FILES))
> > +else
> > +check-flake8:
> > +endif
> > +
> > +check: check-block check-qapi-schema check-unit check
* Max Reitz (mre...@redhat.com) wrote:
> On 29.04.20 16:57, Dr. David Alan Gilbert wrote:
> > * Dr. David Alan Gilbert (dgilb...@redhat.com) wrote:
> >> * Max Reitz (mre...@redhat.com) wrote:
> >>> Currently, setup_mounts() bind-mounts the shared directory without
> >>> MS_REC. This makes all subm
* Wei Wang (wei.w.w...@intel.com) wrote:
> Users may need to check the xbzrle encoding rate to know if the guest
> memory is xbzrle encoding-friendly, and dynamically turn off the
> encoding if the encoding rate is low.
>
> Signed-off-by: Yi Sun
> Signed-off-by: Wei Wang
Reviewed-by: Dr. David
From: Pavel Dovgalyuk
Windows guest sometimes makes DMA requests with overlapping
target addresses. This leads to the following structure of iov for
the block driver:
addr size1
addr size2
addr size3
It means that three adjacent disk blocks should be read into the same
memory buffer. Windows do
In record/replay icount mode main loop thread and vCPU thread
do not perform simultaneously. They take replay mutex to synchronize
the actions. Sometimes vCPU thread waits for locking the mutex for
very long time, because main loop releases the mutex and takes it
back again. Standard qemu mutex do
On 30.04.20 10:58, Dr. David Alan Gilbert wrote:
> * Max Reitz (mre...@redhat.com) wrote:
>> On 29.04.20 16:57, Dr. David Alan Gilbert wrote:
>>> * Dr. David Alan Gilbert (dgilb...@redhat.com) wrote:
* Max Reitz (mre...@redhat.com) wrote:
> Currently, setup_mounts() bind-mounts the shared
On Wed, Apr 29, 2020 at 02:59:31PM +0200, Philippe Mathieu-Daudé wrote:
> On 4/29/20 2:19 PM, Roman Kagan wrote:
> > On Wed, Apr 29, 2020 at 11:41:04AM +0200, Philippe Mathieu-Daudé wrote:
> > > Cc'ing virtio-blk and scsi maintainers.
> > >
> > > On 4/29/20 11:18 AM, Roman Kagan wrote:
> > > > Dev
30.04.2020 1:04, Eric Blake wrote:
On 4/27/20 3:23 AM, Vladimir Sementsov-Ogievskiy wrote:
We are generally moving to int64_t for both offset and bytes parameters
on all io paths. Prepare bdrv_aligned_pwritev() now (and convert the
dependencies: bdrv_co_write_req_prepare() and
bdrv_co_write_req_
On Thu, 30 Apr 2020 at 08:09, Markus Armbruster wrote:
> Our means to configure onboard devices are weak. We sidestepped this
> for isa-fdc by taking it off the board, and thus make -device work.
This seems to be a general dynamic: the x86 pc machine works
via -device options (or is changed so i
On 30/04/20 11:13, Pavel Dovgalyuk wrote:
> In record/replay icount mode main loop thread and vCPU thread
> do not perform simultaneously. They take replay mutex to synchronize
> the actions. Sometimes vCPU thread waits for locking the mutex for
> very long time, because main loop releases the mute
On Thu, 30 Apr 2020 at 09:20, Yan Zhao wrote:
>
> for ram device regions, drop guest writes if the region is read-only.
>
> Cc: Philippe Mathieu-Daudé
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Yan Zhao
> Signed-off-by: Xin Zeng
> ---
> memory.c | 15 ---
> 1 file chan
virtio_net_rsc_ext_num_{packets,dupacks} needs to be available
independently of the presence of VIRTIO_NET_HDR_F_RSC_INFO.
Fixes: 2974e916df87 ("virtio-net: support RSC v4/v6 tcp traffic for Windows
HCK")
Signed-off-by: Cornelia Huck
Message-Id: <20200427102415.10915-2-coh...@redhat.com>
---
hw
The following changes since commit ee573f5326046223b6eef4ae7fbfec31d274e093:
Update version for v5.0.0-rc4 release (2020-04-22 17:51:35 +0100)
are available in the Git repository at:
https://github.com/cohuck/qemu tags/s390x-20200430
for you to fetch changes up to
From: Janosch Frank
For protected guests the IPIB is written/read to/from the SIDA, so we
need those accesses to go through s390_cpu_pv_mem_read/write().
Signed-off-by: Janosch Frank
Reviewed-by: David Hildenbrand
Reviewed-by: Christian Borntraeger
Reviewed-by: Claudio Imbrenda
Reviewed-by:
From: Janosch Frank
They are part of the IPL process, so let's put them into the ipl
header.
Signed-off-by: Janosch Frank
Reviewed-by: Cornelia Huck
Reviewed-by: Christian Borntraeger
Reviewed-by: David Hildenbrand
Message-Id: <20200319131921.2367-2-fran...@linux.ibm.com>
Signed-off-by: Corn
From: Janosch Frank
Protected VMs no longer intercept with code 4 for an instruction
interception. Instead they have codes 104 and 108 for protected
instruction interception and protected instruction notification
respectively.
The 104 mirrors the 4 interception.
The 108 is a notification interc
From: Janosch Frank
Ballooning in protected VMs can only be done when the guest shares the
pages it gives to the host. If pages are not shared, the integrity
checks will fail once those pages have been altered and are given back
to the guest.
As we currently do not yet have a solution for this w
commit 6a8b55ed4056ea5559ebe4f6a4b247f627870d4c
Reviewed-by: Michael S. Tsirkin # virtio/vhost parts
Signed-off-by: Cornelia Huck
Message-Id: <20200427102415.10915-3-coh...@redhat.com>
---
include/standard-headers/linux/ethtool.h | 10 +-
.../linux/input-event-codes.h |
From: Janosch Frank
Migration is not yet supported.
Signed-off-by: Janosch Frank
Reviewed-by: David Hildenbrand
Reviewed-by: Christian Borntraeger
Reviewed-by: Claudio Imbrenda
Reviewed-by: Cornelia Huck
Message-Id: <20200319131921.2367-5-fran...@linux.ibm.com>
Signed-off-by: Cornelia Huck
From: Janosch Frank
The unpack facility provides the means to setup a protected guest. A
protected guest cannot be introspected by the hypervisor or any
user/administrator of the machine it is running on.
Protected guests are encrypted at rest and need a special boot
mechanism via diag308 subcod
From: Janosch Frank
For protected guests, we need to put the IO emulation results into the
SIDA, so SIE will write them into the guest at the next entry.
Signed-off-by: Janosch Frank
Reviewed-by: David Hildenbrand
Reviewed-by: Cornelia Huck
Message-Id: <20200319131921.2367-14-fran...@linux.ib
From: Janosch Frank
Handling of CPU reset and setting of the IPL psw from guest storage at
offset 0 is done by a Ultravisor call. Let's only fetch it if
necessary.
Signed-off-by: Janosch Frank
Reviewed-by: Thomas Huth
Reviewed-by: David Hildenbrand
Reviewed-by: Christian Borntraeger
Reviewed
From: Janosch Frank
Protected guests save the instruction control blocks in the SIDA
instead of QEMU/KVM directly accessing the guest's memory.
Let's introduce new functions to access the SIDA.
The memops for doing so are available with KVM_CAP_S390_PROTECTED, so
let's check for that.
Signed-o
From: Janosch Frank
For protected VMs status storing is not done by QEMU anymore.
Signed-off-by: Janosch Frank
Reviewed-by: Thomas Huth
Reviewed-by: David Hildenbrand
Reviewed-by: Christian Borntraeger
Reviewed-by: Claudio Imbrenda
Reviewed-by: Cornelia Huck
Message-Id: <20200319131921.236
From: Janosch Frank
For protected guests, we need to put the STSI emulation results into
the SIDA, so SIE will write them into the guest at the next entry.
Signed-off-by: Janosch Frank
Reviewed-by: David Hildenbrand
Reviewed-by: Claudio Imbrenda
Reviewed-by: Cornelia Huck
Message-Id: <202003
From: Janosch Frank
In case the protection of the machine fails at s390_pv_vm_enable(),
we'll currently report the local_error variable. Problem is that
there's no migration blocker error that we can report at this point so
the pointer is always NULL which leads to a SEGFAULT.
Let's remove the e
From: Janosch Frank
SCLP for a protected guest is done over the SIDAD, so we need to use
the s390_cpu_pv_mem_* functions to access the SIDAD instead of guest
memory when reading/writing SCBs.
To not confuse the sclp emulation, we set 0x4000 as the SCCB address,
since the function that injects th
From: Christian Borntraeger
PV_ENABLE (and maybe others) might return -EINTR when a signal is
pending. See the Linux kernel patch "s390/gmap: return proper error code
on ksm unsharing" for details. Let us retry the ioctl in that case.
Fixes: c3347ed0d2ee ("s390x: protvirt: Support unpack facilit
From: Janosch Frank
IO instruction data is routed through SIDAD for protected guests, so
adresses do not need to be checked, as this is kernel memory which is
always available.
Also the instruction data always starts at offset 0 of the SIDAD.
Signed-off-by: Janosch Frank
Reviewed-by: Thomas Hu
From: Janosch Frank
Let's add some documentation for the Protected VM functionality.
Signed-off-by: Janosch Frank
Reviewed-by: Claudio Imbrenda
Reviewed-by: Cornelia Huck
Acked-by: David Hildenbrand
Acked-by: Christian Borntraeger
Message-Id: <20200319131921.2367-16-fran...@linux.ibm.com>
S
On 4/30/20 11:25 AM, Roman Kagan wrote:
On Wed, Apr 29, 2020 at 02:59:31PM +0200, Philippe Mathieu-Daudé wrote:
On 4/29/20 2:19 PM, Roman Kagan wrote:
On Wed, Apr 29, 2020 at 11:41:04AM +0200, Philippe Mathieu-Daudé wrote:
Cc'ing virtio-blk and scsi maintainers.
On 4/29/20 11:18 AM, Roman Kag
In record/replay icount mode main loop thread and vCPU thread
do not perform simultaneously. They take replay mutex to synchronize
the actions. Sometimes vCPU thread waits for locking the mutex for
very long time, because main loop releases the mutex and takes it
back again. Standard qemu mutex do
On 30.04.2020 11:26, Max Reitz wrote:
On 29.04.20 15:02, Vladimir Sementsov-Ogievskiy wrote:
29.04.2020 15:17, Max Reitz wrote:
On 29.04.20 12:37, Vladimir Sementsov-Ogievskiy wrote:
29.04.2020 13:24, Max Reitz wrote:
On 28.04.20 22:00, Denis Plotnikov wrote:
zstd significantly reduces cl
From: Christian Borntraeger
The unpack facility is an indication that diagnose 308 subcodes 8-10
are available to the guest. That means, that the guest can put itself
into protected mode.
Once it is in protected mode, the hardware stops any attempt of VM
introspection by the hypervisor.
Some fe
From: Christian Borntraeger
linux/kvm.h is not available on all platforms. Let us move
s390_machine_inject_pv_error into pv.c as it uses KVM structures.
Also rename the function to s390_pv_inject_reset_error.
While at it, ipl.h needs an include for "exec/address-spaces.h"
as it uses address_spac
Peter Maydell writes:
> On Thu, 30 Apr 2020 at 08:09, Markus Armbruster wrote:
>> Our means to configure onboard devices are weak. We sidestepped this
>> for isa-fdc by taking it off the board, and thus make -device work.
>
> This seems to be a general dynamic: the x86 pc machine works
> via -d
From: "Edgar E. Iglesias"
The following changes since commit 648db19685b7030aa558a4ddbd3a8e53d8c9a062:
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2020-04-29' into
staging (2020-04-29 15:07:33 +0100)
are available in the Git repository at:
g...@github.com:edgarigl/qemu.git
From: "Edgar E. Iglesias"
Add the opcode-0x0-illegal CPU property to control if the core
should trap opcode zero as illegal.
Reviewed-by: Alistair Francis
Reviewed-by: Luc Michel
Signed-off-by: Edgar E. Iglesias
---
target/microblaze/cpu.h | 1 +
target/microblaze/cpu.c | 6 +
From: "Edgar E. Iglesias"
Add the ill-opcode-exception property to control if illegal
instructions will raise exceptions.
Reviewed-by: Alistair Francis
Reviewed-by: Luc Michel
Signed-off-by: Edgar E. Iglesias
---
target/microblaze/cpu.h | 1 +
target/microblaze/cpu.c | 4
ta
The test checks fulfilling qcow2 requirements for the compression
type feature and zstd compression type operability.
Signed-off-by: Denis Plotnikov
Reviewed-by: Vladimir Sementsov-Ogievskiy
Tested-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Eric Blake
---
tests/qemu-iotests/287 | 152 +
From: "Edgar E. Iglesias"
Add the unaligned-exceptions property to control if the core
traps unaligned memory accesses.
Reviewed-by: Alistair Francis
Reviewed-by: Luc Michel
Signed-off-by: Edgar E. Iglesias
---
target/microblaze/cpu.h | 1 +
target/microblaze/cpu.c | 4
targ
From: "Edgar E. Iglesias"
Add the div-zero-exception property to control if the core
traps divizions by zero.
Reviewed-by: Alistair Francis
Reviewed-by: Luc Michel
Signed-off-by: Edgar E. Iglesias
---
target/microblaze/cpu.h | 1 +
target/microblaze/cpu.c | 4
target/microbl
zstd significantly reduces cluster compression time.
It provides better compression performance maintaining
the same level of the compression ratio in comparison with
zlib, which, at the moment, is the only compression
method available.
The performance test results:
Test compresses and decompresse
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, in QEMU we just define two CPU types:
1, "Loongson-3A100
Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
IP3 delivery as well, because Loongson-3 based machine use both IRQ2
(CPU's IP2) and IRQ3 (CPU's IP3).
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/mips_int.c | 6 ++
1 file changed, 2 insertions(+
From: "Edgar E. Iglesias"
Add the pvr-user1 property to control the user-defined
PVR0 User1 field.
Reviewed-by: Alistair Francis
Reviewed-by: Luc Michel
Signed-off-by: Edgar E. Iglesias
---
target/microblaze/cpu.h | 1 +
target/microblaze/cpu.c | 4 +++-
2 files changed, 4 insertions(+), 1 d
Preparing for Loongson-3 virtualization, add KVM target support for
MIPS64 in configure script.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 23b5e93..7581e65 100755
--- a/con
From: "Edgar E. Iglesias"
Add the pvr-user2 property to control the user-defined
PVR1 User2 register.
Reviewed-by: Alistair Francis
Reviewed-by: Luc Michel
Signed-off-by: Edgar E. Iglesias
---
target/microblaze/cpu.h | 1 +
target/microblaze/cpu.c | 2 ++
2 files changed, 3 insertions(+)
di
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, we just define two CPU types:
1, "Loongson-3A1000" CPU wh
MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
can't create a VZ guest in QEMU because it lacks the kvm_type() hook in
MachineClass. Besides, libvirt uses a null-machine to detect the kvm
capability, so by default it will return "KVM not supported" on a VZ
platform. Thus, nu
v23:
Undecided: whether to add zstd(zlib) compression
details to the qcow2 spec
03: tighten assertion on zstd decompression [Eric]
04: use _rm_test_img appropriately [Max]
v22:
03: remove assignemnt in if condition
v21:
03:
* remove the loop on compression [Max
The patch enables processing the image compression type defined
for the image and chooses an appropriate method for image clusters
(de)compression.
Signed-off-by: Denis Plotnikov
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
---
block/qcow2-threa
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aa9a057..66c5a41 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1080,6 +1080,11 @@ F: hw/isa/vt82c686.c
F: hw/pci-host/bonito.c
F: in
The patch adds some preparation parts for incompatible compression type
feature to qcow2 allowing the use different compression methods for
image clusters (de)compressing.
It is implied that the compression type is set on the image creation and
can be changed only later by image conversion, thus c
On Thu, Apr 30, 2020 at 05:40:25PM +0800, Peter Maydell wrote:
> On Thu, 30 Apr 2020 at 09:20, Yan Zhao wrote:
> >
> > for ram device regions, drop guest writes if the region is read-only.
> >
> > Cc: Philippe Mathieu-Daudé
> > Reviewed-by: Philippe Mathieu-Daudé
> > Signed-off-by: Yan Zhao
> >
On Thu, Apr 30, 2020 at 12:03:12PM +0200, Markus Armbruster wrote:
> Peter Maydell writes:
>
> > On Thu, 30 Apr 2020 at 08:09, Markus Armbruster wrote:
> >> Our means to configure onboard devices are weak. We sidestepped this
> >> for isa-fdc by taking it off the board, and thus make -device wo
Add more CP0 register for save/restore, including: EBase, XContext,
PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/kvm.c | 212 ++
target/mips/ma
Add Loongson-3 based machine support, it use i8259 as the interrupt
controler and use GPEX as the pci controller. Currently it can only
work with KVM, but we will add TCG support in future.
We already have a full functional Linux kernel (based on Linux-5.4.x LTS
but not upstream yet) here:
https:
On 30/04/2020 11:03, Markus Armbruster wrote:
> Peter Maydell writes:
>
>> On Thu, 30 Apr 2020 at 08:09, Markus Armbruster wrote:
>>> Our means to configure onboard devices are weak. We sidestepped this
>>> for isa-fdc by taking it off the board, and thus make -device work.
>>
>> This seems to
On Thu, Apr 30, 2020 at 12:29:28PM +0200, Paolo Bonzini wrote:
> On 29/04/20 17:36, Daniel P. Berrangé wrote:
> > The flake8 program is a standard tool used by Python projects for
> > validating many commonly recommended style rules. It would be desirable
> > for QEMU to come into alignment with no
On 29/04/20 17:36, Daniel P. Berrangé wrote:
> The flake8 program is a standard tool used by Python projects for
> validating many commonly recommended style rules. It would be desirable
> for QEMU to come into alignment with normal Python coding style best
> practices.
>
> QEMU currently violates
On Thu, 30 Apr 2020 at 11:34, Daniel P. Berrangé wrote:
> We "merely" need a new query language targetted to QEMU's qtree
> structure, which we can expose in the CLI that gives unique access
> to every possible property.
Past resistance to this has been grounded in not wanting to
expose the exact
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