Christophe de Dinechin writes:
>> On 26 Jan 2020, at 16:04, Peter Maydell wrote:
>>
>> On Sun, 26 Jan 2020 at 08:10, Christophe de Dinechin
>> wrote:
[...]
>> You'd have more luck persuading me we should move to Rust:
>> at least then we'd get some clear benefits (no more buffer
>> overrun sec
Hi,
On 1/28/20 7:48 AM, Gavin Shan wrote:
> [including more folks into the discussion]
>
>> On Fri, 17 Jan 2020 at 14:00, Peter Maydell
>> wrote:
>>> On Thu, 19 Dec 2019 at 04:06, Gavin Shan wrote:
This supports NMI injection for virtual machine and currently it's only
supported on GI
Peter Krempa writes:
> On Mon, Jan 27, 2020 at 14:39:02 -0500, John Snow wrote:
>>
>>
>> On 1/27/20 5:36 AM, Maxim Levitsky wrote:
>> > This patch series is bunch of cleanups
>> > to the hmp monitor code.
>> >
>> > This series only touched blockdev related hmp handlers.
>> >
>> > No functiona
Hello Peter,
[ ... ]
> +static Property aspeed_sdhci_properties[] = {
> +DEFINE_PROP_UINT8("num-slots", AspeedSDHCIState, num_slots, 0),
> +DEFINE_PROP_END_OF_LIST(),
> +};
> +
> static void aspeed_sdhci_class_init(ObjectClass *classp, void *data)
> {
> DeviceClass *dc = DEVICE_CL
> Hi,
>
> Unfortunately it's not that simple to simply revert the patch since the old
> backend api no longer exists. Also I don't have a Mac so it's almost
> impossible for me to test the results. I looked at the specified commit and
> I think I found a problem, could you please apply the att
On Tue, Jan 07, 2020 at 01:53:58PM +0100, Kamil Rytarowski wrote:
> From: Maxime Villard
>
> Adds support for the NetBSD Virtual Machine Monitor (NVMM) stubs and
> introduces the nvmm.h sysemu API for managing the vcpu scheduling and
> management.
>
> Signed-off-by: Maxime Villard
> Signed-off-
On Tue, Jan 07, 2020 at 01:53:59PM +0100, Kamil Rytarowski wrote:
> From: Maxime Villard
>
> Introduces the configure support for the new NetBSD Virtual Machine Monitor
> that
> allows for hypervisor acceleration from usermode components on the NetBSD
> platform.
>
> Signed-off-by: Maxime Villa
On Tue, Jan 07, 2020 at 01:54:00PM +0100, Kamil Rytarowski wrote:
> From: Maxime Villard
>
> Implements the NetBSD Virtual Machine Monitor (NVMM) target. Which
> acts as a hypervisor accelerator for QEMU on the NetBSD platform. This enables
> QEMU much greater speed over the emulated x86_64 path'
On Tue, Jan 07, 2020 at 01:54:01PM +0100, Kamil Rytarowski wrote:
> From: Maxime Villard
>
> Implements the NVMM accelerator cpu enlightenments to actually use the
> nvmm-all
> accelerator on NetBSD platforms.
>
> Signed-off-by: Maxime Villard
> Signed-off-by: Kamil Rytarowski
> ---
> cpus.c
Based-on: 20200127223321.2742-1-quint...@redhat.com
[v4]
- create new parameters: multifd-zlib-level & multifd-zstd-level
- use proper "conditionals" for qapi (thanks markus)
- more than half of the patches moved to the migration PULL request
that this series are based on
- method type has moved
It will be used later.
Signed-off-by: Juan Quintela
---
Move setup of ->ops helper to proper place (wei)
Rename s/none/nocomp/ (dave)
Introduce MULTIFD_FLAG_NOCOMP
right order of arguments for print
Introduce MULTIFD_FLAG_METHOD_MASK (now it is a 4 bit value)
---
migration/migration.c | 9 ++
Signed-off-by: Juan Quintela
---
Remove CONFIG_ZSTD gross test for enable zstd option. Thanhs Markus!!!
---
hw/core/qdev-properties.c| 2 +-
migration/Makefile.objs | 1 +
migration/migration.c| 9 ++
migration/migration.h| 1 +
migration/multifd-zstd.c | 3
So we don't have to compile everything in, or have ifdefs
Signed-off-by: Juan Quintela
---
include/qemu/module.h | 2 ++
vl.c | 1 +
2 files changed, 3 insertions(+)
diff --git a/include/qemu/module.h b/include/qemu/module.h
index 65ba596e46..907cb5c0a5 100644
--- a/include/qem
Signed-off-by: Juan Quintela
---
hw/core/qdev-properties.c| 2 +-
migration/Makefile.objs | 1 +
migration/migration.c| 9 ++
migration/migration.h| 1 +
migration/multifd-zlib.c | 293 +++
migration/multifd.c | 6 +
Signed-off-by: Juan Quintela
---
migration/migration.c | 15 +++
monitor/hmp-cmds.c| 4
qapi/migration.json | 29 ++---
3 files changed, 45 insertions(+), 3 deletions(-)
diff --git a/migration/migration.c b/migration/migration.c
index 3b081e8147..b
It will indicate which level use for compression.
Signed-off-by: Juan Quintela
---
migration/migration.c | 15 +++
monitor/hmp-cmds.c| 4
qapi/migration.json | 30 +++---
3 files changed, 46 insertions(+), 3 deletions(-)
diff --git a/migration/mig
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
---
configure | 30 ++
1 file changed, 30 insertions(+)
diff --git a/configure b/configure
index a72a5def57..7c1dca326f 100755
--- a/configure
+++ b/configure
@@ -448,6 +448,7 @@ lzo=""
snappy=""
bzip
On Tue, Jan 07, 2020 at 01:53:57PM +0100, Kamil Rytarowski wrote:
> Hello QEMU Community!
>
> Over the past year the NetBSD team has been working hard on a new user-mode
> API
> for our hypervisor that will be released as part of the upcoming NetBSD 9.0.
> This new API adds user-mode capabilities
On Tue, 28 Jan 2020 at 07:39, David Edmondson wrote:
>
> Eric Blake writes:
>
> > On 1/24/20 4:34 AM, David Edmondson wrote:
> >> Texinfo defines @var for metasyntactic variables and such terms are
> >> shown in upper-case or italics in the output of makeinfo. When
> >> considering an option to a
On Mon, Jan 27, 2020 at 04:01:31PM -0500, John Snow wrote:
On 1/27/20 3:43 PM, Peter Krempa wrote:
On Mon, Jan 27, 2020 at 14:39:02 -0500, John Snow wrote:
On 1/27/20 5:36 AM, Maxim Levitsky wrote:
This patch series is bunch of cleanups
to the hmp monitor code.
This series only touched bl
Hi all,
It seems my patch was ignore. Ping!
https://patchew.org/QEMU/20200116115700.127951-1-mky...@tachyum.com/
-Original Message-
From: Matus Kysel
Sent: štvrtok 16. januára 2020 12:57
Cc: Matus Kysel ; Riku Voipio ; Laurent
Vivier ; open list:All patches CC here
Subject: [PATCH]
Gavin, Eric,
On 2020-01-28 08:05, Auger Eric wrote:
Hi,
On 1/28/20 7:48 AM, Gavin Shan wrote:
[including more folks into the discussion]
On Fri, 17 Jan 2020 at 14:00, Peter Maydell
wrote:
On Thu, 19 Dec 2019 at 04:06, Gavin Shan wrote:
This supports NMI injection for virtual machine and
On Thu, 16 Jan 2020 at 11:58, Matus Kysel wrote:
>
> Used same style to handle another glibc reserved signal SIGSETXID (33),
> that is used by glibc NPTL setuid/setgid functions. This should fix problems
> with application using those functions and failing with error
> "qemu:handle_cpu_signal rece
On Mon, 27 Jan 2020 at 17:56, Kevin Wolf wrote:
>
> The following changes since commit 105b07f1ba462ec48b27e5cb74ddf81c6a79364c:
>
> Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20200127' into
> staging (2020-01-27 13:02:36 +)
>
> are available in the Git repository at:
>
> git
On Tue, Jan 28, 2020 at 9:30 AM Volker Rümelin wrote:
> > Hi,
> >
> > Unfortunately it's not that simple to simply revert the patch since the
> old backend api no longer exists. Also I don't have a Mac so it's almost
> impossible for me to test the results. I looked at the specified commit
> an
On Sunday, January 26, 2020, Aleksandar Markovic <
aleksandar.marko...@rt-rk.com> wrote:
> From: Philippe Mathieu-Daudé
>
> Some platforms (like AVR) need to determine cpu type by reading
> the ELF flags (field e_flags oin ELF header).
>
> This patch enables discovery of the content of that flag
On Mon, Jan 27, 2020 at 08:05:36PM +0100, Christophe de Dinechin wrote:
>
>
> > On 26 Jan 2020, at 16:04, Peter Maydell wrote:
> >
> > On Sun, 26 Jan 2020 at 08:10, Christophe de Dinechin
> > wrote:
> >> I’m still puzzled as to why anybody would switch to something like
> >> GObject when there
John Snow writes:
> On 1/27/20 9:35 AM, Kevin Wolf wrote:
>> Am 24.01.2020 um 10:50 hat Daniel P. Berrangé geschrieben:
>>> On Thu, Jan 23, 2020 at 04:07:09PM -0500, John Snow wrote:
Well, sure. The context of this email was qmp-shell though, which is
meant to help facilitate the entry
On Mon, Jan 27, 2020 at 11:38:49PM +0100, Paolo Bonzini wrote:
> Il lun 27 gen 2020, 21:11 John Snow ha scritto:
>
> >
> > > ./qemu-core < > {
> > "machine": "Q35",
> > "memory": "2GiB",
> > "accel": "kvm"
> > }
> > EOF
> >
>
> And now you have to keep all the syntactic sugar that is
Am 27.01.2020 um 21:11 hat John Snow geschrieben:
> On 1/27/20 6:56 AM, Kevin Wolf wrote:
> > Am 25.01.2020 um 11:18 hat Markus Armbruster geschrieben:
> >> Kevin Wolf writes:
> >>> basically just a pretty-printed version of it with the consequence that
> >>> it needs to be stored in an external f
Introduce additional SZ_256, SZ_8K, SZ_16K macros that will
be used by ITS tests.
Signed-off-by: Eric Auger
Reviewed-by: Thomas Huth
---
lib/libcflat.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/libcflat.h b/lib/libcflat.h
index ea19f61..7092af2 100644
--- a/lib/libcflat.h
+++ b
This series is a revival of an RFC series sent in Dec 2016 [1].
Given the amount of code and the lack of traction at that time,
I haven't respinned until now. However a recent bug found related
to the ITS migration convinced me that this work may deserve to be
respinned and enhanced.
Tests exercis
ipi_enable() code would be reusable for other interrupts
than IPI. Let's rename it setup_irq() and pass an interrupt
handler pointer.
Signed-off-by: Eric Auger
---
v2 -> v3:
- do not export setup_irq anymore
---
arm/gic.c | 20 +++-
1 file changed, 7 insertions(+), 13 deletions
From: Andre Przywara
A common theme when accessing per-IRQ parameters in the GIC distributor
is to set fields of a certain bit width in a range of MMIO registers.
Examples are the enabled status (one bit per IRQ), the level/edge
configuration (2 bits per IRQ) or the priority (8 bits per IRQ).
Ad
This helper function controls the signaling of LPIs at
redistributor level.
Signed-off-by: Eric Auger
---
v2 -> v3:
- move the helper in lib/arm/gic-v3.c
- rename the function with gicv3_lpi_ prefix
- s/report_abort/assert
---
lib/arm/asm/gic-v3.h | 1 +
lib/arm/gic-v3.c | 17
Allocate the LPI configuration and per re-distributor pending table.
Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
by default in the config table.
Also introduce a helper routine that allows to set the pending table
bit for a given LPI.
Signed-off-by: Eric Auger
---
v2 -> v
PROPBASER, PENDBASE and GICR_CTRL will be used for LPI management.
Signed-off-by: Eric Auger
---
lib/arm/asm/gic-v3.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
index 6beeab6..ffb2e26 100644
--- a/lib/arm/asm/gic-v3.h
+++ b/lib/arm/asm/g
Introduce an helper functions to register
- a new device, characterized by its device id and the
max number of event IDs that dimension its ITT (Interrupt
Translation Table). The function allocates the ITT.
- a new collection, characterized by its ID and the
target processing engine (PE).
Detect the presence of an ITS as part of the GICv3 init
routine, initialize its base address and read few registers
the IIDR, the TYPER to store its dimensioning parameters.
Also parse the BASER registers.
This is our first ITS test, belonging to a new "its" group.
Signed-off-by: Eric Auger
---
Triggers LPIs through the INT command.
the test checks the LPI hits the right CPU and triggers
the right LPI intid, ie. the translation is correct.
Updates to the config table also are tested, along with inv
and invall commands.
Signed-off-by: Eric Auger
---
v2 -> v3:
- add comments
- keep th
This test maps LPIs (populates the device table, the collection table,
interrupt translation tables, configuration table), migrates and make
sure the translation is correct on the destination.
Signed-off-by: Eric Auger
---
arm/gic.c| 59
a
its_enable_defaults() is the top init function that allocates the
command queue and all the requested tables (device, collection,
lpi config and pending tables), enable LPIs at distributor level
and ITS level.
gicv3_enable_defaults must be called before.
Signed-off-by: Eric Auger
---
v2 -> v3:
Am 28.01.2020 um 11:16 hat Daniel P. Berrangé geschrieben:
> On Mon, Jan 27, 2020 at 11:38:49PM +0100, Paolo Bonzini wrote:
> > Il lun 27 gen 2020, 21:11 John Snow ha scritto:
> >
> > >
> > > > ./qemu-core < > > {
> > > "machine": "Q35",
> > > "memory": "2GiB",
> > > "accel": "kvm"
>
Let's link getchar.o to use puts and getchar from the
tests.
Then allow tests belonging to the migration group to
trigger the migration from the test code by putting
"migrate" into the uart. Then the code can wait for the
migration completion by using getchar().
The __getchar implement is minimal
Implement main ITS commands. The code is largely inherited from
the ITS driver.
Signed-off-by: Eric Auger
---
v2 -> v3:
- do not use report() anymore
- assert if cmd_write exceeds the queue capacity
v1 -> v2:
- removed its_print_cmd_state
---
arm/Makefile.arm64 | 2 +-
lib/arm/asm/gic
Add two new migration tests. One testing the migration of
a topology where collection were unmapped. The second test
checks the migration of the pending table.
Signed-off-by: Eric Auger
---
v2 -> v3:
- tests belong to both its and migration groups
---
arm/gic.c | 150 ++
Hi Peter,
When arm virt machine is run in accelerated mode with "-cpu host
-machine virt", the default gic version is 2.
I understand the rationale with TCG where we don't have MSI ITS
emulation along with GICv3 so we need to choose GICv2 to get GICv2M
functionality.
However in KVM mode, I would
From: Maxime Villard
Introduces the configure support for the new NetBSD Virtual Machine Monitor that
allows for hypervisor acceleration from usermode components on the NetBSD
platform.
Signed-off-by: Maxime Villard
Signed-off-by: Kamil Rytarowski
---
configure | 36
On Tue, 28 Jan 2020 at 10:47, Auger Eric wrote:
> When arm virt machine is run in accelerated mode with "-cpu host
> -machine virt", the default gic version is 2.
>
> I understand the rationale with TCG where we don't have MSI ITS
> emulation along with GICv3 so we need to choose GICv2 to get GICv
Hi Marc,
On 1/28/20 10:25 AM, Marc Zyngier wrote:
> Gavin, Eric,
>
> On 2020-01-28 08:05, Auger Eric wrote:
>> Hi,
>>
>> On 1/28/20 7:48 AM, Gavin Shan wrote:
>>> [including more folks into the discussion]
>>>
On Fri, 17 Jan 2020 at 14:00, Peter Maydell
wrote:
> On Thu, 19 Dec 2019
Hi Peter,
On 1/28/20 11:52 AM, Peter Maydell wrote:
> On Tue, 28 Jan 2020 at 10:47, Auger Eric wrote:
>> When arm virt machine is run in accelerated mode with "-cpu host
>> -machine virt", the default gic version is 2.
>>
>> I understand the rationale with TCG where we don't have MSI ITS
>> emula
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On Tue, 28 Jan 2020 at 10:47, Auger Eric wrote:
> > When arm virt machine is run in accelerated mode with "-cpu host
> > -machine virt", the default gic version is 2.
> >
> > I understand the rationale with TCG where we don't have MSI ITS
> > emu
On Tue, 28 Jan 2020 at 10:56, Auger Eric wrote:
> On 1/28/20 10:25 AM, Marc Zyngier wrote:
> > You *could* try something like SDEI [1], but that's a pretty terrible
> > interface too.
>
> Thank you for the pointer.
There was a patchset recently that had an SDEI implementation,
but I would strongl
Am 27.01.2020 um 21:29 hat Dr. David Alan Gilbert geschrieben:
> * Kevin Wolf (kw...@redhat.com) wrote:
> > A command history already exists for qmp-shell. It's better than bash
> > because it doesn't mix QMP history with whatever else I do on my
> > computer.
> >
> > Autocomplete in qmp-shell doe
On 21/01/2020 08:20, Philippe Mathieu-Daudé wrote:
On 1/21/20 12:51 AM, Philippe Mathieu-Daudé wrote:
Currently the QEMU Python module limits the QEMUMachine class to
use the first serial console.
Some machines/guest might use another console than the first one as
the 'boot console'. For exampl
On 20/01/2020 23:51, Philippe Mathieu-Daudé wrote:
We need a function to interrupt interactive consoles.
Example: Interrupt U-Boot to set different environment values.
Tested-by: Niek Linnenbank
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Liam Merwick
Tested-by: Liam Merwick
---
On 1/19/20 11:59 PM, Finn Thain wrote:
The existing code has a bug where the Remaining Buffer Word Count (RBWC)
is calculated with a truncating division, which gives the wrong result
for odd-sized packets.
Section 1.4.1 of the datasheet says,
Once the end of the packet has been reached, th
On 1/19/20 11:59 PM, Finn Thain wrote:
This function re-uses its 'size' argument as a scratch variable.
Instead, declare a local 'size' variable for that purpose so that the
function result doesn't get messed up.
Signed-off-by: Finn Thain
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Laurent
On 1/19/20 11:59 PM, Finn Thain wrote:
According to the datasheet, section 3.4.4, "in 32-bit mode ... the SONIC
always writes long words".
Therefore, use the same technique for the 'in_use' field that is used
everywhere else, and write the full long word.
Signed-off-by: Finn Thain
Tested-by: L
On 20/01/2020 23:51, Philippe Mathieu-Daudé wrote:
Since we are going to re-use the code shared between
wait_for_console_pattern() and exec_command_and_wait_for_pattern(),
extract the common part into a local function.
Tested-by: Niek Linnenbank
Signed-off-by: Philippe Mathieu-Daudé
Reviewed
On Tue, Jan 28, 2020 at 12:03 PM Philippe Mathieu-Daudé
wrote:
> On 1/19/20 11:59 PM, Finn Thain wrote:
> > This function re-uses its 'size' argument as a scratch variable.
> > Instead, declare a local 'size' variable for that purpose so that the
> > function result doesn't get messed up.
> >
> >
On 1/19/20 11:59 PM, Finn Thain wrote:
The jazzsonic driver in Linux uses the Silicon Revision register value
to probe the chip. The driver fails unless the SR register contains 4.
Unfortunately, reading this register in QEMU usually returns 0 because
the s->regs[] array gets wiped after a softwa
It took some time (due to travel), but I was now able to do a setup
based on the old 2.6.0 version [2.6.0 (7803-g6fc5f26eb-
0ubuntu1~18.04.1)] for testing.
And with the combination:
$ apt-cache policy maas
maas:
Installed: 2.6.0-7803-g6fc5f26eb-0ubuntu1~18.04.1
Candidate: 2.6.0-7803-g6fc5f26e
On 1/19/20 11:59 PM, Finn Thain wrote:
Section 3.4.1 of the datasheet says,
The alignment of the RRA is confined to either word or long word
boundaries, depending upon the data width mode. In 16-bit mode,
the RRA must be aligned to a word boundary (A0 is always zero)
and in 3
On 28.01.2020 10:10, Sergio Lopez wrote:
> On Tue, Jan 07, 2020 at 01:53:57PM +0100, Kamil Rytarowski wrote:
>> Hello QEMU Community!
>>
>> Over the past year the NetBSD team has been working hard on a new user-mode
>> API
>> for our hypervisor that will be released as part of the upcoming NetBSD
On 2020-01-28 10:59, Peter Maydell wrote:
On Tue, 28 Jan 2020 at 10:56, Auger Eric wrote:
On 1/28/20 10:25 AM, Marc Zyngier wrote:
> You *could* try something like SDEI [1], but that's a pretty terrible
> interface too.
Thank you for the pointer.
There was a patchset recently that had an SDE
On Mon, 27 Jan 2020 13:52:48 -0500
Collin Walling wrote:
> On 1/27/20 1:21 PM, Collin Walling wrote:
> > On 1/27/20 12:55 PM, David Hildenbrand wrote:
> >> On 27.01.20 18:29, Cornelia Huck wrote:
> >>> On Mon, 27 Jan 2020 18:09:11 +0100
> >>> David Hildenbrand wrote:
> ... I actually t
Hi Finn,
On 1/19/20 11:59 PM, Finn Thain wrote:
The Least Significant bit of a descriptor address register is used as
an EOL flag. It has to be masked when the register value is to be used
as an actual address for copying memory around. But when the registers
are to be updated the EOL bit should
On Mon, 27 Jan 2020 18:05:36 -0500
Collin Walling wrote:
> On 1/27/20 12:35 PM, Cornelia Huck wrote:
> > On Mon, 27 Jan 2020 11:39:02 -0500
> > Collin Walling wrote:
> >
> >> On 1/27/20 6:47 AM, Cornelia Huck wrote:
> >>> On Fri, 24 Jan 2020 17:14:04 -0500
> >>> Collin Walling wrote:
> >>>
The only difference to hardware revision 4 is that the device doesn't
switch to VGA mode in case someone happens to touch a VGA register,
which should make things more robust in configurations with multiple
vga devices.
Swtiching back to VGA mode happens on reset, either full machine
reset or qxl
On Thu, 2020-01-23 at 16:11 +1100, David Gibson wrote:
> On Wed, Jan 22, 2020 at 06:14:37PM +1100, Alexey Kardashevskiy wrote:
> > On 22/01/2020 17:32, David Gibson wrote:
> > > I'm not thinking of "grub" as a separate option - that would be the
> > > same as "vof". Using vof + no -kernel we'd nee
On 1/28/20 12:28 PM, Gerd Hoffmann wrote:
The only difference to hardware revision 4 is that the device doesn't
switch to VGA mode in case someone happens to touch a VGA register,
which should make things more robust in configurations with multiple
vga devices.
Swtiching back to VGA mode happens
On Mon, 27 Jan 2020 15:41:45 +0100
Halil Pasic wrote:
> On Mon, 27 Jan 2020 08:39:25 +0100
> Igor Mammedov wrote:
>
> > On Fri, 24 Jan 2020 20:17:48 +0100
> > Halil Pasic wrote:
> >
> > > On Thu, 23 Jan 2020 12:38:43 +0100
> > > Igor Mammedov wrote:
> > >
> > > > With main RAM now conve
On Tue, Jan 28, 2020 at 12:11:51PM +0100, Kamil Rytarowski wrote:
> On 28.01.2020 10:10, Sergio Lopez wrote:
> > On Tue, Jan 07, 2020 at 01:53:57PM +0100, Kamil Rytarowski wrote:
> >> Hello QEMU Community!
> >>
> >> Over the past year the NetBSD team has been working hard on a new
> >> user-mode A
On 28.01.2020 13:08, Sergio Lopez wrote:
> On Tue, Jan 28, 2020 at 12:11:51PM +0100, Kamil Rytarowski wrote:
>> On 28.01.2020 10:10, Sergio Lopez wrote:
>>> On Tue, Jan 07, 2020 at 01:53:57PM +0100, Kamil Rytarowski wrote:
Hello QEMU Community!
Over the past year the NetBSD team has
On 27/01/2020 21.56, Philippe Mathieu-Daudé wrote:
> Hey Wainer,
>
> On 1/27/20 6:45 PM, Wainer dos Santos Moschetta wrote:
>> On 1/27/20 1:41 PM, Philippe Mathieu-Daudé wrote:
>>> On 1/27/20 4:39 PM, Thomas Huth wrote:
On 27/01/2020 16.18, Philippe Mathieu-Daudé wrote:
> On 1/27/20 3:41
On Tue, Jan 28, 2020 at 10:52:50AM +, Peter Maydell wrote:
> On Tue, 28 Jan 2020 at 10:47, Auger Eric wrote:
> > When arm virt machine is run in accelerated mode with "-cpu host
> > -machine virt", the default gic version is 2.
> >
> > I understand the rationale with TCG where we don't have MS
Hi guys,
(Cc'ing Jon)
On 1/23/20 5:59 PM, Kevin Wolf wrote:
Am 23.01.2020 um 13:44 hat Felipe Franciosi geschrieben:
When querying an iSCSI server for the provisioning status of blocks (via
GET LBA STATUS), Qemu only validates that the response descriptor zero's
LBA matches the one requested.
I proposed a similar patch guarded by #ifdef TARGET_HEXAGON. I understand we
don't want to break things that are working, and we don't want to open the door
for a bunch of #ifdef's here. However, more than one scenario needs this
capability.
Would a suitable compromise be to provide a hook in
Hi Drew,
On 1/28/20 1:29 PM, Andrew Jones wrote:
> On Tue, Jan 28, 2020 at 10:52:50AM +, Peter Maydell wrote:
>> On Tue, 28 Jan 2020 at 10:47, Auger Eric wrote:
>>> When arm virt machine is run in accelerated mode with "-cpu host
>>> -machine virt", the default gic version is 2.
>>>
>>> I und
Kevin Wolf writes:
> Am 27.01.2020 um 21:11 hat John Snow geschrieben:
[...]
>> (The argument here is: It's a little harder and a little longer to type,
>> but the benefits from the schema organization may improve productivity
>> of using QEMU directly instead of harming it.)
>
> I think this is
On Tue, 28 Jan 2020 13:07:40 +0100
Igor Mammedov wrote:
> On Mon, 27 Jan 2020 15:41:45 +0100
> Halil Pasic wrote:
>
> > On Mon, 27 Jan 2020 08:39:25 +0100
> > Igor Mammedov wrote:
[..]
> > >
> > > one should be able to use memory-backend property to make it work
> > > instead of -m convenienc
On Tue, Jan 28, 2020 at 01:34:06PM +0100, Auger Eric wrote:
> Hi Drew,
>
> On 1/28/20 1:29 PM, Andrew Jones wrote:
> > On Tue, Jan 28, 2020 at 10:52:50AM +, Peter Maydell wrote:
> >> On Tue, 28 Jan 2020 at 10:47, Auger Eric wrote:
> >>> When arm virt machine is run in accelerated mode with "-
Am 28.01.2020 um 13:30 hat Philippe Mathieu-Daudé geschrieben:
> Hi guys,
>
> (Cc'ing Jon)
>
> On 1/23/20 5:59 PM, Kevin Wolf wrote:
> > Am 23.01.2020 um 13:44 hat Felipe Franciosi geschrieben:
> > > When querying an iSCSI server for the provisioning status of blocks (via
> > > GET LBA STATUS), Q
On Tue, 28 Jan 2020, Aleksandar Markovic wrote:
On Sunday, January 26, 2020, Aleksandar Markovic <
aleksandar.marko...@rt-rk.com> wrote:
From: Philippe Mathieu-Daudé
Some platforms (like AVR) need to determine cpu type by reading
the ELF flags (field e_flags oin ELF header).
This patch enabl
On Tue, 28 Jan 2020 at 12:33, Taylor Simpson wrote:
>
> I proposed a similar patch guarded by #ifdef TARGET_HEXAGON. I understand we
> don't want to break things that are working, and we don't want to open the
> door for a bunch of #ifdef's here. However, more than one scenario needs
> this c
Hello,
cc-ing the ppc list, maintainer and original author of the patch could
increase the chances that they actually see your message which they might
miss on qemu-devel. David explicitely said he usually cannot read all
mails on qemu-devel so likely should be cc-d on all PPC issues (or also
Am 28.01.2020 um 13:36 hat Markus Armbruster geschrieben:
> Kevin Wolf writes:
>
> > Am 27.01.2020 um 21:11 hat John Snow geschrieben:
> [...]
> >> (The argument here is: It's a little harder and a little longer to type,
> >> but the benefits from the schema organization may improve productivity
Juan Quintela wrote:
> Hi
>
> Please, send any topic that you are interested in covering.
Hi
As there is no topics on the agenda, call gets cancelled.
Happy hacking, Juan.
>
> At the end of Monday I will send an email with the agenda or the
> cancellation of the call, so hurry up.
>
> After di
Thomas Huth writes:
> On 25/01/2020 19.31, Philippe Mathieu-Daudé wrote:
>> The NAME variable can be used to describe nicely a job (see [*]).
>> As we currently have 32 jobs, use it. This helps for quickly
>> finding a particular job.
>>
>> before: https://travis-ci.org/qemu/qemu/builds/6398
Hi
Please, send any topic that you are interested in covering.
At the end of Monday I will send an email with the agenda or the
cancellation of the call, so hurry up.
After discussions on the QEMU Summit, we are going to have always open a
KVM call where you can add topics.
Call details:
B
Hi Shameer,
On 1/17/20 6:45 PM, Shameer Kolothum wrote:
> From: Kwangwoo Lee
>
> Prepare pre-plug and plug handlers for NVDIMM support.
> Please note nvdimm_support is not yet enabled.
>
> Signed-off-by: Kwangwoo Lee
> Signed-off-by: Eric Auger
> Signed-off-by: Shameer Kolothum
> ---
> hw/a
On Tue, Jan 28, 2020 at 1:55 PM Alex Bennée wrote:
> Thomas Huth writes:
> > On 25/01/2020 19.31, Philippe Mathieu-Daudé wrote:
> >> The NAME variable can be used to describe nicely a job (see [*]).
> >> As we currently have 32 jobs, use it. This helps for quickly
> >> finding a particular job.
>
On Tue, Jan 28, 2020 at 11:51:33AM +0100, Kamil Rytarowski wrote:
> From: Maxime Villard
>
> Introduces the configure support for the new NetBSD Virtual Machine Monitor
> that
> allows for hypervisor acceleration from usermode components on the NetBSD
> platform.
>
> Signed-off-by: Maxime Villa
On 1/26/20 5:54 AM, Thomas Huth wrote:
On 25/01/2020 19.31, Philippe Mathieu-Daudé wrote:
The NAME variable can be used to describe nicely a job (see [*]).
As we currently have 32 jobs, use it. This helps for quickly
finding a particular job.
before: https://travis-ci.org/qemu/qemu/builds/
Hi all.
I am totally lost in the email.
Are there any action items for me / someone else ?
Regards,
Michael Rolnik
On Mon, Jan 27, 2020 at 10:54 AM Michael Rolnik wrote:
> Thanks for you help guys.
>
> On Mon, Jan 27, 2020 at 12:55 AM Aleksandar Markovic <
> aleksandar.marko...@rt-rk.com> wro
On Tuesday, January 28, 2020, BALATON Zoltan wrote:
> On Tue, 28 Jan 2020, Aleksandar Markovic wrote:
>
>> On Sunday, January 26, 2020, Aleksandar Markovic <
>> aleksandar.marko...@rt-rk.com> wrote:
>>
>> From: Philippe Mathieu-Daudé
>>>
>>> Some platforms (like AVR) need to determine cpu type b
On 1/28/20 11:18 AM, Philippe Mathieu-Daudé wrote:
On Tue, Jan 28, 2020 at 1:55 PM Alex Bennée wrote:
Thomas Huth writes:
On 25/01/2020 19.31, Philippe Mathieu-Daudé wrote:
The NAME variable can be used to describe nicely a job (see [*]).
As we currently have 32 jobs, use it. This helps fo
Hi Gavin,
On 1/28/20 6:48 AM, Gavin Shan wrote:
[including more folks into the discussion]
On Fri, 17 Jan 2020 at 14:00, Peter Maydell
wrote:
On Thu, 19 Dec 2019 at 04:06, Gavin Shan wrote:
This supports NMI injection for virtual machine and currently it's only
supported on GICv3 controlle
On 1/27/20 6:56 PM, Philippe Mathieu-Daudé wrote:
Hey Wainer,
On 1/27/20 6:45 PM, Wainer dos Santos Moschetta wrote:
On 1/27/20 1:41 PM, Philippe Mathieu-Daudé wrote:
On 1/27/20 4:39 PM, Thomas Huth wrote:
On 27/01/2020 16.18, Philippe Mathieu-Daudé wrote:
On 1/27/20 3:41 PM, Thomas Huth w
1 - 100 of 441 matches
Mail list logo
