> > Bandan Das (3):
> > usb-mtp: fix return status of delete
> > usb-mtp: remove usb_mtp_object_free_one
> > usb-mtp: refactor the flow of usb_mtp_write_data
>
> Hi Bandan, Gerd -- what's the status of this patchset?
> I think this is the one that fixes the CID1399415
> Coverity issue about
From: David Hildenbrand
As far as I can see, there is only a tiny difference.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 4
target/s390x/translate_vx.inc.c | 21 +
tar
From: Gerd Hoffmann
Packages are fetched via proxy that way, if configured on the host.
That might be required to pass firewalls, and it allows to route
package downloads through a caching proxy server.
Needs AcceptEnv setup in sshd_config on the guest side to work.
Signed-off-by: Gerd Hoffmann
From: David Hildenbrand
1. We'll reuse op_vcdg() for similar instructions later, prepare for
that.
2. We'll reuse vop64_2() later for other instructions.
We have to mangle the erm (effective rounding mode) and the m4 into
the simd_data(), and properly unmangle them again.
Make sure to restor
Alex Bennée writes:
> From: Thomas Huth
>
> People often forget to run the iotests before submitting patches or
> pull requests - this is likely due to the fact that we do not run the
> tests during our mandatory "make check" tests yet. Now that we've got
> a proper "auto" group of iotests tha
A vfio-ccw device may provide an async command subregion for
issuing halt/clear subchannel requests. If it is present, use
it for sending halt/clear request to the device; if not, fall
back to emulation (as done today).
Message-Id: <20190507154733.28604-3-coh...@redhat.com>
Reviewed-by: Eric Farma
From: Jon Doron
Add a new query/set which changes the memory GDB sees to physical memory
only.
gdb> maint packet qqemu.PhyMemMode
will reply the current phy_mem_mode state (1 for enabled, 0 for disabled)
gdb> maint packet Qqemu.PhyMemMode:1
Will make GDB read/write only to physical memory, set t
From: David Hildenbrand
11e2bfef7990 ("tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store")
revealed that the vregs are not aligned to 16 bytes. Align them to
16 bytes, to avoid segfault'ing on x86.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/cpu.h | 2 +-
The following changes since commit 47fbad45d47af8af784bb12a5719489edcd89b4c:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
(2019-06-04 17:22:42 +0100)
are available in the Git repository at:
https://github.com/cohuck/qemu tags/s390x-20190607-1
From: David Hildenbrand
We can reuse most of the infrastructure introduced for
VECTOR FP CONVERT FROM FIXED 64-BIT and friends.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/tr
On 29/05/2019 08:49, David Gibson wrote:
> From: Richard Henderson
>
> The gvec expanders take care of masking the shift amount
> against the element width.
>
> Signed-off-by: Richard Henderson
> Message-Id: <20190518191430.21686-2-richard.hender...@linaro.org>
> Signed-off-by: David Gibson
>
From: David Hildenbrand
Similar to VECTOR FIND ELEMENT EQUAL. Core logic courtesy of Richard H.
Add s390_vec_read_element() that can deal with element sizes.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h| 6 +++
target/s390x/insn-data.
From: David Hildenbrand
Simulate XxC=0 and ERM=0 (current mode), so we can use the existing
helper function.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c |
From: David Hildenbrand
Unfortunately, there is no easy way to avoid looping over all elements
in v2. Provide specialized variants for !cc,!rt/!cc,rt/cc,!rt/cc,rt and
all element types. Especially for different values of rt, the compiler
might be able to optimize the code a lot.
Add s390_vec_wri
From: Gerd Hoffmann
Use git archive to create tarballs of qemu and submodules instead of
cloning the repository and the submodules. This is a order of magnitude
faster because it doesn't fetch the submodules from the internet each
time the script runs.
Signed-off-by: Gerd Hoffmann
Tested-by: T
The generic s390 section looks like the best resting place.
Message-Id: <20190529091243.25562-1-coh...@redhat.com>
Signed-off-by: Cornelia Huck
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a96829ea83a2..7be122541583 100644
--- a/MAINTAINERS
From: David Hildenbrand
Similar to VECTOR FP ADD.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 17 ++
From: David Hildenbrand
CPU_DoubleU is primarily used to reinterpret between integer and floats.
We don't really need this functionality. So let's just keep it simple
and use an uint64_t.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
linux-user/s390x/signal.c | 4 +-
On Fri, 7 Jun 2019 10:17:58 +0200
Cédric Le Goater wrote:
> On 07/06/2019 02:19, David Gibson wrote:
> > On Thu, Jun 06, 2019 at 07:08:59PM +0200, Greg Kurz wrote:
> >> If KVM is too old to support XIVE native exploitation mode, we might end
> >> up using the emulated XIVE after CAS. This is su
From: David Hildenbrand
Logic mostly courtesy of Richard H.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h| 6 +
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 34
target/s390x/v
From: David Hildenbrand
1. We'll reuse op_vfa() for similar instructions later, prepare for
that.
2. We'll reuse vop64_3() for other instructions later.
3. Take care of modifying the vector register only if no trap happened.
- on traps, flags are not updated and no elements are modified
- tr
From: David Hildenbrand
Let's add it to the max model, so we can enable it.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/gen-features.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index c346b
On Fri, 7 Jun 2019 at 10:05, Alex Bennée wrote:
>
> The following changes since commit 0d74f3b4277a7ecb0ccb80c865797d11f8e466f5:
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-06-06
> 14:09:14 +0100)
>
> are available in the Git reposit
From: David Hildenbrand
We can reuse most of the infrastructure added for VECTOR FP ADD.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x
From: David Hildenbrand
The PoP (z14, 7-382) says:
Doublewords to the right of the doubleword in which the
highest-numbered facility bit is assigned for a model
may or may not be stored.
However, stack protection in certain binaries can't deal with that.
"gzip" example code:
f1b4:
From: David Hildenbrand
Let's add all HWCAPs that we can support under TCG right now, when the
respective CPU facilities are enabled.
Cc: Riku Voipio
Cc: Laurent Vivier
Cc: Cornelia Huck
Cc: Laurent Vivier
Cc: Richard Henderson
Acked-by: Laurent Vivier
Reviewed-by: Richard Henderson
Signe
From: David Hildenbrand
Core logic courtesy of Richard H.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h| 6
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 31 +
target/s390x/vec_string_
From: Richard Henderson
This replaces the target-specific implementations for VSEL.
Signed-off-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/translate_vx.inc.c | 38 ++---
1 file changed, 6 insertions(+), 32 deletions(-)
diff --git a/targ
From: David Hildenbrand
Once we unlock S390_FEAT_VECTOR for TCG, we want linux-user to be
able to make use of it.
Reviewed-by: Richard Henderson
Reviewed-by: Laurent Vivier
Signed-off-by: David Hildenbrand
---
target/s390x/cpu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/s
From: David Hildenbrand
Vector floating-point instructions will require these functions, so
allow to use them from other files.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/fpu_helper.c | 4 ++--
target/s390x/internal.h | 4
2 files changed, 6 insert
From: David Hildenbrand
used_stfl_bytes is 0, before initialized via prepare_stfl() on the
first invocation. We have to move the calculation of max_bytes after
prepare_stfl().
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/misc_helper.c | 3 ++-
1 file change
From: David Hildenbrand
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 23 +++
4 files changed,
On Fri, Jun 07, 2019 at 08:59:31AM +0200, Markus Armbruster wrote:
> Paolo Bonzini writes:
>
> > On 27/05/19 10:00, Markus Armbruster wrote:
> >> As long as we don't have an active QOM maintainer[*], the benefit is
> >> low.
> >>
> >>
> >> [*] We need one. I'm not volunteering.
> >
> > I think
ilable in the Git repository at:
>
> https://github.com/cohuck/qemu tags/s390x-20190607-1
>
> for you to fetch changes up to 39f04d18406862bd98d6bef5415dbe7360c652de:
>
> Merge tag 's390x-tcg-2019-06-05' into s390-next-staging (2019-06-07
> 11:38:42 +0200)
>
>
From: David Hildenbrand
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 23 +++
4 files changed,
From: David Hildenbrand
Handling is similar to data exceptions, however we can always store the
VXC into the lowore and the FPC:
z14 PoP, 6-20, "Vector-Exception Code"
When a vector-processing exception causes a pro-
gram interruption, a vector-exception code (VXC) is
stored at locat
From: Aleksandar Markovic
Fix block-comment-related issues reported by checkpatch for file
msa_helper.c.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1559838440-9866-3-git-send-email-aleksandar.marko...@rt-rk.com>
---
target/mips/msa_helper.c | 42 +++
From: David Hildenbrand
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 23 +++
4 files changed,
From: Aleksandar Markovic
Amend and rearrange MSA wrappers to follow the same organization as
in MSA tests.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1559838440-9866-6-git-send-email-aleksandar.marko...@rt-rk.com>
---
tests/tcg/mips/include/wrappers_msa.h
From: David Hildenbrand
Provide for all three instructions all four combinations of cc bit and
s bit.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 12
target/s390x/insn-data.def | 6 ++
target/s390x/translate_vx.inc.c | 51
From: Aleksandar Markovic
Fix space-related format issues reported by checkpatch in file
msa_helper.c.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1559838440-9866-2-git-send-email-aleksandar.marko...@rt-rk.com>
---
target/mips/msa_helper.c | 28 +
From: David Hildenbrand
Very similar to VECTOR FP DIVIDE.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 17 ++
From: Aleksandar Markovic
Add README for MSA tests. This is just to explain how to run tests even
without Makefile. Makefile will be provided later on.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1559838440-9866-11-git-send-email-aleksandar.marko...@rt-rk.com
From: David Hildenbrand
We can reuse some of the infrastructure introduced for
VECTOR FP CONVERT FROM FIXED 64-BIT and friends.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/tr
From: David Hildenbrand
Take care of reading/indicating the 32-bit elements.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 19 ++
target/s3
On 6/7/19 12:08 PM, Daniel P. Berrangé wrote:
> On Thu, Jun 06, 2019 at 07:51:15PM +0200, Pino Toscano wrote:
>> On Thursday, 6 June 2019 13:12:32 CEST Daniel P. Berrangé wrote:
>>> On Wed, Jun 05, 2019 at 11:36:54PM +0200, Pino Toscano wrote:
Rewrite the implementation of the ssh block driver
From: David Hildenbrand
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 4 +++
target/s390x/insn-data.def | 4 +++
target/s390x/translate_vx.inc.c | 23
target/s390x/vec_fpu_helper.c | 48 ++
From: Aleksandar Markovic
Add function reset_msa_registers() and utilize it in each MSA test.
This is needed to ensure independency of test results on the state of
MSA registers before test execution. This also allows for correction
of tests for VSHF* instructions, that are now independent on the
On Fri, Jun 07, 2019 at 12:14:37PM +0200, Philippe Mathieu-Daudé wrote:
> On 6/7/19 12:08 PM, Daniel P. Berrangé wrote:
> > On Thu, Jun 06, 2019 at 07:51:15PM +0200, Pino Toscano wrote:
> >> On Thursday, 6 June 2019 13:12:32 CEST Daniel P. Berrangé wrote:
> >>> On Wed, Jun 05, 2019 at 11:36:54PM +0
From: David Hildenbrand
The only FP instruction we can implement without an helper.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 52 +
2 files changed, 54 insertio
From: David Hildenbrand
We don't care about the other two missing base features:
- S390_FEAT_DFP_PACKED_CONVERSION
- S390_FEAT_GROUP_GEN13_PTFF
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
hw/s390x/s390-virtio-ccw.c | 2 ++
target/s390x/cpu_models.c | 4 ++--
targe
On Fri, 24 May 2019 at 10:42, Alex Bennée wrote:
>
>
> Jan Bobek writes:
>
> > This patch series adds support for i386 and x86_64 architectures to
> > RISU. Notably, vector registers (SSE, AVX, AVX-512) are supported for
> > verification of the apprentice. This is V3 of the series posted in [1]
>
On Mon, 3 Jun 2019 at 22:47, John Snow wrote:
>
> Sphinx, through Pygments, does not like annotated json examples very
> much. In some versions of Sphinx (1.7), it will render the non-json
> portions of code blocks in red, but in newer versions (2.0) it will
> throw an exception and not highlight
From: David Hildenbrand
We can reuse float64_dcmask().
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 21 +++
target/s390x/vec_fpu_helper.c
On Sat, 25 May 2019 at 16:12, Cédric Le Goater wrote:
>
> Hello,
>
> This series improves the current models of the Aspeed machines in QEMU
> and adds new ones. It also prepares ground for the future Aspeed SoC.
> You will find patches for :
>
> - per SoC mappings of the memory space and the inte
From: Yunqiang Su
Add support for options SOL_ALG of the syscall setsockopt(). This
option is used in relation to Linux kernel Crypto API, and allows
a user to set additional information for the cipher operation via
syscall setsockopt(). The field "optname" must be one of the
following:
- ALG_
From: Aleksandar Markovic
Unroll loops in helpers for MSA logic instructions for better
performance.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1559838440-9866-5-git-send-email-aleksandar.marko...@rt-rk.com>
---
target/mips/msa_helper.c | 44 +++
m' into
> > staging (2019-06-04 17:22:42 +0100)
> >
> > are available in the Git repository at:
> >
> > https://github.com/cohuck/qemu tags/s390x-20190607-1
> >
> > for you to fetch changes up to 39f04d18406862bd98d6bef5415dbe7360c652de:
> >
From: Aleksandar Rikalo
Implement support for translation of system call statx().
The implementation is based on "best effort" approach: if host is
capable of executing statx(), host statx() is used. If not, the
implementation includes invoking other (more mature) system calls
(from the same 'st
On Tue, 4 Jun 2019 at 22:08, Richard Henderson
wrote:
>
> This changes the code generation for the tlb from e.g.
>
> ldr ip, [r6, #-0x10]
> ldr r2, [r6, #-0xc]
> and ip, ip, r4, lsr #8
> ldrd r0, r1, [r2, ip]!
> ldr r2, [r2, #0x18]
>
19489edcd89b4c:
> > >
> > > Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into
> > > staging (2019-06-04 17:22:42 +0100)
> > >
> > > are available in the Git repository at:
> > >
> > > https://github.com/co
From: Neng Chen
Add support for options IPV6_ADD_MEMBERSHIP and IPV6_DROP_MEMPEMBERSHIP
of the syscall setsockopt(). These options control membership in
multicast groups. Their argument is a pointer to a struct ipv6_mreq,
which is in turn defined in IP v6 header netinet/in.h as:
struct ipv6_mre
From: Aleksandar Markovic
Move tests for _Q. from "integer multiply" directory
to "fixed-point multiply" directory, since they do not operate on
integers, but on fixed point numbers.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1559838440-9866-8-git-send-email
19489edcd89b4c:
> > >
> > > Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into
> > > staging (2019-06-04 17:22:42 +0100)
> > >
> > > are available in the Git repository at:
> > >
> > > https://github.com/co
On Fri, 7 Jun 2019 at 11:05, Aleksandar Markovic
wrote:
>
> From: Aleksandar Markovic
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-06-06
> 14:09:14 +0100)
>
> are available in the git repository at:
>
> https://github.com/AMarkovic
From: Aleksandar Markovic
Merge remote-tracking branch
'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-06-06
14:09:14 +0100)
are available in the git repository at:
https://github.com/AMarkovic/qemu tags/mips-queue-jun-7-2019
for you to fetch changes up to 88e34ac06
From: Aleksandar Markovic
Outline places for future MSA helpers to follow the same organization
as in MSA tests.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1559838440-9866-4-git-send-email-aleksandar.marko...@rt-rk.com>
---
target/mips/msa_helper.c | 461 ++
On 07/06/19 10:25, Markus Armbruster wrote:
> Paolo Bonzini writes:
>
>> On 23/05/19 18:14, Markus Armbruster wrote:
>>> * Machine core (Eduardo, Marcel)
>>>
>>> query-machines, query-current-machine,
>>>
>>> ~60 lines. Hardly worthwhile from a "let's shrink misc.json" point of
>>> view.
From: Aleksandar Markovic
Add tests for MSA FP max/min instructions. This includes following
instructions:
* FMAX.W - float maximum (words)
* FMAX.D - float maximum (doublewords)
* FMAX_A.W - float maximum absolute (words)
* FMAX_A.D - float maximum absolute (doublewords)
* FMIN.W - fl
On 06/06/19 23:23, John Snow wrote:
> So: This looks right; does this fix a bug that can be observed? Do we
> have any regression tests for block/NVMe?
I don't think it fixes a bug; by the time the CQ entry is picked up by
QEMU, the device is not supposed to touch it anymore.
However, the idea be
Peter Maydell writes:
> On Fri, 24 May 2019 at 10:42, Alex Bennée wrote:
>>
>>
>> Jan Bobek writes:
>>
>> > This patch series adds support for i386 and x86_64 architectures to
>> > RISU. Notably, vector registers (SSE, AVX, AVX-512) are supported for
>> > verification of the apprentice. This
On 07/06/19 11:08, Yury Kotov wrote:
> Signed-off-by: Yury Kotov
> ---
> accel/kvm/kvm-all.c | 12
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
> index 524c4ddfbd..e4ac3386cb 100644
> --- a/accel/kvm/kvm-all.c
> +++ b/a
On Thu, Jun 06, 2019 at 07:51:15PM +0200, Pino Toscano wrote:
> On Thursday, 6 June 2019 13:12:32 CEST Daniel P. Berrangé wrote:
> > On Wed, Jun 05, 2019 at 11:36:54PM +0200, Pino Toscano wrote:
> > > Rewrite the implementation of the ssh block driver to use libssh instead
> > > of libssh2. The li
QOM is not a particularly active subsystem now: 51 commits in two years.
But, we need active maintainers to review and merge patches, and Git
shows the following top committers taking on QOM:
Markus Armbruster
Eduardo Habkost
Paolo Bonzini
Marc-André Lureau
Eric Blake
I v
07.06.2019 11:06, Kevin Wolf wrote:
> Am 07.06.2019 um 05:17 hat Eric Blake geschrieben:
>> On 4/11/19 12:27 PM, Vladimir Sementsov-Ogievskiy wrote:
>>> +static coroutine_fn void nbd_reconnect_loop(NBDConnection *con)
>>> +{
>>> +NBDClientSession *s = nbd_get_client_session(con->bs);
>>> +u
07.06.2019 6:17, Eric Blake wrote:
> On 4/11/19 12:27 PM, Vladimir Sementsov-Ogievskiy wrote:
>> Implement reconnect. To achieve this:
>>
>> 1. add new modes:
>> connecting-wait: means, that reconnecting is in progress, and there
>> were small number of reconnect attempts, so all requests
On Fri, 7 Jun 2019 10:22:40 +1000
David Gibson wrote:
> On Thu, Jun 06, 2019 at 02:10:48PM +0200, Greg Kurz wrote:
> > On Thu, 6 Jun 2019 16:45:30 +0530
> > Aravinda Prasad wrote:
> >
> > > On Thursday 06 June 2019 11:36 AM, Greg Kurz wrote:
> > > > On Thu, 6 Jun 2019 13:06:14 +1000
> > > >
Patchew URL:
https://patchew.org/QEMU/20190607091116.49044-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v17 00/24] Add RX archtecture support
Message-id: 20190607091116.49044-1-ys...
From: Aleksandar Markovic
This is a collection of misc patches for Linux user that I recently
accumulated from variuous sources. All of them originate from problems
observed on mips target. However, these changes actually affect and fix
problems on multiple targets.
v9->v10:
- improved commit
Aarushi Mehta writes:
> This patch series adds support for the newly developed io_uring Linux AIO
> interface. Linux io_uring is faster than Linux's AIO asynchronous I/O code,
> offers efficient buffered asynchronous I/O support, the ability to do I/O
> without performing a system call via polle
On Wed, Jun 05, 2019 at 07:58:32AM +0200, Markus Armbruster wrote:
> Aarushi Mehta writes:
>
> > Option only enumerates for hosts that support it.
>
> Blank line here, please. Same in other patches.
>
> > Signed-off-by: Aarushi Mehta
> > ---
> > qapi/block-core.json | 4 +++-
> > 1 file chan
Philippe Mathieu-Daudé writes:
> On 6/7/19 8:59 AM, Markus Armbruster wrote:
> [...]
>> QOM is not a particularly active subsystem now: 51 commits in two years.
>>
>> We obviously need maintainers to review and merge patches. The nominal
>> maintainer hasn't been doing that since 2015. Git sho
07.06.2019 10:57, Kevin Wolf wrote:
> Am 11.04.2019 um 19:27 hat Vladimir Sementsov-Ogievskiy geschrieben:
>> Introduce a function to gracefully wake-up a coroutine, sleeping in
>> qemu_co_sleep_ns() sleep.
>>
>> Signed-off-by: Vladimir Sementsov-Ogievskiy
>
> You can simply reenter the coroutine
On Fri, Jun 07, 2019 at 01:37:37PM +0200, Paolo Bonzini wrote:
> QOM is not a particularly active subsystem now: 51 commits in two years.
> But, we need active maintainers to review and merge patches, and Git
> shows the following top committers taking on QOM:
>
> Markus Armbruster
> Edua
On Fri, Jun 07, 2019 at 09:37:21AM +0200, Gerd Hoffmann wrote:
> Original q35 behavior was to split memory at 2.75 GB, leaving space for
> the mmconfig bar at 0xb00 and pci I/O window starting at 0xc000.
>
> Note: Those machine types have been removed from the qemu codebase
> meanwhile bec
Am 07.06.19 um 13:37 schrieb Paolo Bonzini:
> QOM is not a particularly active subsystem now: 51 commits in two years.
> But, we need active maintainers to review and merge patches, and Git
> shows the following top committers taking on QOM:
>
> Markus Armbruster
> Eduardo Habkost
>
On Fri, Jun 07, 2019 at 10:34:44AM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
Reviewed-by: Michael S. Tsirkin
> ---
> include/hw/virtio/virtio-gpu.h | 2 +-
> hw/core/machine.c | 8 +++-
> hw/display/bochs-display.c | 2 +-
> hw/display/vga-pci.c
06.06.2019 21:41, John Snow wrote:
> This simply makes this function a little more convenient to call, and in
> a forthcoming patch gives us a return code we can report to the
> caller. (Which in turn makes THOSE functions easier to call.)
>
> While we're here, remove the offset+size arguments whi
On 6/6/19 2:26 AM, Brenken, David (EFS-GH2) wrote:
>>> case OPC2_32_RRPW_INSERT:
>>> -if (pos + width <= 31) {
>>> -tcg_gen_deposit_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],
>>> - width, pos);
>> Can you explain the problem causing the b
Paolo Bonzini writes:
> On 07/06/19 10:25, Markus Armbruster wrote:
>> Paolo Bonzini writes:
>>
>>> On 23/05/19 18:14, Markus Armbruster wrote:
* Machine core (Eduardo, Marcel)
query-machines, query-current-machine,
~60 lines. Hardly worthwhile from a "let's shrin
19489edcd89b4c:
> > >
> > > Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into
> > > staging (2019-06-04 17:22:42 +0100)
> > >
> > > are available in the Git repository at:
> > >
> > > https://github.com/co
This pull request is not for master.
Hi Cornelia,
second attempt :)
The following changes since commit 33556237f652d8a712d0b6d29ecb442e6b65fe42:
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-7-2019'
into staging (2019-06-07 11:17:28 +0100)
are available in the Git repo
Ping for code review, please?
thanks
-- PMM
On Thu, 16 May 2019 at 15:47, Peter Maydell wrote:
>
>
> This patchset attempts to fix https://bugs.launchpad.net/qemu/+bug/1823998
> which reports that we don't handle kernels larger than 128MB
> correctly, because we allow the initrd to be placed ove
Ping for code review, please?
thanks
-- PMM
On Fri, 10 May 2019 at 12:03, Peter Maydell wrote:
>
> The NSACR register allows secure code to configure the FPU
> to be inaccessible to non-secure code. If the NSACR.CP10
> bit is set then:
> * NS accesses to the FPU trap as UNDEF (ie to NS EL1 or E
Am 07.06.2019 um 13:18 hat Vladimir Sementsov-Ogievskiy geschrieben:
> 07.06.2019 10:57, Kevin Wolf wrote:
> > Am 11.04.2019 um 19:27 hat Vladimir Sementsov-Ogievskiy geschrieben:
> >> Introduce a function to gracefully wake-up a coroutine, sleeping in
> >> qemu_co_sleep_ns() sleep.
> >>
> >> Signe
Ping for code review, please?
thanks
-- PMM
On Fri, 17 May 2019 at 18:40, Peter Maydell wrote:
>
> The SSE-200 hardware has configurable integration settings which
> determine whether its two CPUs have the FPU and DSP:
> * CPU0_FPU (default 0)
> * CPU0_DSP (default 0)
> * CPU1_FPU (default 1)
Ping for code review, please?
thanks
-- PMM
On Fri, 24 May 2019 at 13:42, Peter Maydell wrote:
>
> The GICv3 specification says that the GICD_TYPER.SecurityExtn bit
> is RAZ if GICD_CTLR.DS is 1. We were incorrectly making it RAZ
> if the security extension is unsupported. "Security extension
>
The following changes since commit 0d74f3b4277a7ecb0ccb80c865797d11f8e466f5:
Merge remote-tracking branch
'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-06-06
14:09:14 +0100)
are available in the Git repository at:
git://git.kraxel.org/qemu tags/ui-201
Add modifier parameter to egl_get_fd_for_texture(), to return the used
modifier on dmabuf exports.
Signed-off-by: Gerd Hoffmann
Message-id: 20190529072144.26737-4-kra...@redhat.com
---
include/ui/egl-helpers.h | 3 ++-
ui/egl-helpers.c | 5 +++--
ui/spice-display.c | 7 ---
3 f
From: Max Reitz
wchar_t may resolve to be an unsigned long on 32-bit architectures.
Using the %x conversion specifier will then give a compiler warning:
ui/curses.c: In function ‘get_ucs’:
ui/curses.c:492:49: error: format ‘%x’ expects argument of type ‘unsigned int’,
but argument 3 has type ‘w
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