On 21/05/2019 18:24, Cédric Le Goater wrote:
> This documents the overall XIVE architecture and the XIVE support for
> sPAPR guest machines (pseries).
>
> It also provides documentation on the 'info pic' command.
>
> Signed-off-by: Cédric Le Goater
> ---
>
> Changes since v2:
>
> - fixed
On Fri, May 31, 2019 at 06:21:13AM +, Denis Plotnikov wrote:
>
>
> On 30.05.2019 11:26, Stefano Garzarella wrote:
> > On Thu, May 30, 2019 at 11:10:55AM +0300, Denis Plotnikov wrote:
> >> The patch allows to provide a pattern file for write
> >> command. There was no similar ability before.
>
On Fri, May 31, 2019 at 08:43:41AM +0200, Philippe Mathieu-Daudé wrote:
> We already have 'make check-help', use the 'make vm-help' form
> to display helps about VM testing. Keep the old target to not
> bother old customs.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> Based-on: <2019053010160
On 31.05.2019 10:14, Stefano Garzarella wrote:
> On Fri, May 31, 2019 at 06:21:13AM +, Denis Plotnikov wrote:
>>
>>
>> On 30.05.2019 11:26, Stefano Garzarella wrote:
>>> On Thu, May 30, 2019 at 11:10:55AM +0300, Denis Plotnikov wrote:
The patch allows to provide a pattern file for write
The patch allows to provide a pattern file for write
command. There was no similar ability before.
Signed-off-by: Denis Plotnikov
---
v5:
* file name initiated with null to make compilers happy
v4:
* missing signed-off clause added
v3:
* missing file closing added
* exclusive flags pro
On Thu, May 30, 2019 at 11:15:44AM +0100, Alex Bennée wrote:
> The toolchain PPA has it so we might as well use it.
>
> Signed-off-by: Alex Bennée
> ---
> .travis.yml | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/.travis.yml b/.travis.yml
> index b053a836a3
On Thu, 30 May 2019 22:07:31 +0300
Michael Rolnik wrote:
> From: Sarah Harris
>
> This includes:
> - CPU data structures
> - object model classes and functions
> - migration functions
> - GDB hooks
>
> Signed-off-by: Sarah Harris
> Signed-off-by: Michael Rolnik
small note wrt CPU model hand
On Thu, 30 May 2019 22:07:37 +0300
Michael Rolnik wrote:
> From: Sarah Harris
>
> A simple board setup that configures an AVR CPU to run a given firmware image.
> This is all that's useful to implement without peripheral emulation as AVR
> CPUs include a lot of on-board peripherals.
>
> Signe
Philippe Mathieu-Daudé writes:
> Hi Alex,
>
> On 5/30/19 12:15 PM, Alex Bennée wrote:
>> From: Gerd Hoffmann
>>
>> Signed-off-by: Gerd Hoffmann
>> Reviewed-by: Philippe Mathieu-Daudé
>> Tested-by: Thomas Huth
>> Message-Id: <20190520124716.30472-9-kra...@redhat.com>
>> [AJB: fix minor conf
Stefano Garzarella writes:
> On Thu, May 30, 2019 at 11:15:44AM +0100, Alex Bennée wrote:
>> The toolchain PPA has it so we might as well use it.
>>
>> Signed-off-by: Alex Bennée
>> ---
>> .travis.yml | 10 +-
>> 1 file changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/.trav
Hi Igor.
Please explain what I should do.
thank you,
Michael
On Fri, May 31, 2019 at 11:02 AM Igor Mammedov wrote:
> On Thu, 30 May 2019 22:07:31 +0300
> Michael Rolnik wrote:
>
> > From: Sarah Harris
> >
> > This includes:
> > - CPU data structures
> > - object model classes and functions
>
no-re...@patchew.org writes:
> Patchew URL:
> https://patchew.org/QEMU/20190523204954.13122-1-richard.hender...@linaro.org/
>
>
>
> Hi,
>
> This series failed build test on s390x host. Please find the details below.
>
> === TEST SCRIPT BEGIN ===
> #!/bin/bash
> # Testing script will be invoked
* Michael S. Tsirkin (m...@redhat.com) wrote:
> On Thu, May 30, 2019 at 08:08:23PM +0100, Dr. David Alan Gilbert wrote:
> > * Michael S. Tsirkin (m...@redhat.com) wrote:
> > > On Thu, May 30, 2019 at 07:00:23PM +0100, Dr. David Alan Gilbert wrote:
> > > > * Michael S. Tsirkin (m...@redhat.com) wrot
Laurent Vivier writes:
> Le 30/05/2019 à 16:39, Alex Bennée a écrit :
>> This is ostensibly to avoid the weirdness of len looking like it might
>> come from a guest and sometimes being used. While we are at it fix up
>> the error checking for the arm-linux-user implementation of the API
>> whic
On Tue, May 28, 2019 at 11:45:43AM +0300, Vladimir Sementsov-Ogievskiy wrote:
> diff --git a/util/iov.c b/util/iov.c
> index 74e6ca8ed7..6bfd609998 100644
> --- a/util/iov.c
> +++ b/util/iov.c
> @@ -353,6 +353,95 @@ void qemu_iovec_concat(QEMUIOVector *dst,
> qemu_iovec_concat_iov(dst, src->io
On 5/31/19 3:20 AM, Alex Bennée wrote:
>
> no-re...@patchew.org writes:
>
>> Patchew URL:
>> https://patchew.org/QEMU/20190523204954.13122-1-richard.hender...@linaro.org/
>>
>>
>>
>> Hi,
>>
>> This series failed build test on s390x host. Please find the details below.
>>
>> === TEST SCRIPT BEGIN
On Thu, 30 May 2019 at 18:38, Richard Henderson
wrote:
>
> Explicitly ignore the return value of qemu_guest_getrandom.
> Because we use error_fatal, all errors are already caught.
>
> Fixes: CID 1401701
> Signed-off-by: Richard Henderson
> ---
> util/guest-random.c | 2 +-
> 1 file changed, 1 in
Am 27.05.2019 um 15:23 hat Markus Armbruster geschrieben:
> Gerd Hoffmann writes:
>
> > On Mon, May 27, 2019 at 10:18:42AM +0200, Markus Armbruster wrote:
> >> Marc-André Lureau writes:
> >>
> >> > Hi
> >> >
> >> > On Thu, May 23, 2019 at 9:52 AM Markus Armbruster
> >> > wrote:
> >> >> I'm no
On Tue, May 14, 2019 at 04:52:56PM +0100, Alex Bennée wrote:
> Now we have a common semihosting console interface use that for our
> string output. However ARM is currently unique in also supporting
> semihosting for linux-user so we need to replicate the API in
> linux-user. If other architectures
On 5/27/19 10:39 AM, Yoshinori Sato wrote:
> On Fri, 24 May 2019 00:07:57 +0900,
> Richard Henderson wrote:
>> Obviously there are still a few inconsistencies in the
>> format strings used for the immediates, but the format
>> is readable and it is easy to look at the opcode to see
>> how our decod
Roman Kagan writes:
> On Mon, May 27, 2019 at 06:39:53PM +0200, Vitaly Kuznetsov wrote:
>> Roman Kagan writes:
>> > On Fri, May 17, 2019 at 04:19:17PM +0200, Vitaly Kuznetsov wrote:
>> >> +static struct kvm_cpuid2 *try_get_hv_cpuid(CPUState *cs, int max)
>> >> +{
>> >> +struct kvm_cpuid2 *cp
On 30/05/19 23:57, Wainer dos Santos Moschetta wrote:
> Currently, -accel help shows all possible accelerators regardless
> if they are enabled in the binary or not. That is a different
> semantic from -cpu and -machine helps, for example. So this change
> makes it to list only the accelerators whi
On 5/30/19 7:38 PM, Richard Henderson wrote:
> Explicitly ignore the return value of qemu_guest_getrandom.
> Because we use error_fatal, all errors are already caught.
>
> Fixes: CID 1401701
> Signed-off-by: Richard Henderson
> ---
> util/guest-random.c | 2 +-
> 1 file changed, 1 insertion(+),
On 30.05.19 13:22, Peter Maydell wrote:
> On Mon, 20 May 2019 at 18:06, Cornelia Huck wrote:
>>
>> From: David Hildenbrand
>>
>> A galois field multiplication in field 2 is like binary multiplication,
>> however instead of doing ordinary binary additions, xor's are performed.
>> So no carries are
On Fri, 31 May 2019 11:15:01 +0300
Michael Rolnik wrote:
> Hi Igor.
>
> Please explain what I should do.
Maybe look at inline comments which are somewhere in the body of reply.
> thank you,
> Michael
>
> On Fri, May 31, 2019 at 11:02 AM Igor Mammedov wrote:
>
> > On Thu, 30 May 2019 22:07:31
Hi Miroslav,
On 5/31/19 11:12 AM, Miroslav Rezanina wrote:
> On Tue, May 14, 2019 at 04:52:56PM +0100, Alex Bennée wrote:
>> Now we have a common semihosting console interface use that for our
>> string output. However ARM is currently unique in also supporting
>> semihosting for linux-user so we
As far as I can see, there is only a tiny difference.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 4
target/s390x/translate_vx.inc.c | 21 +
target/s390x/vec_fpu_helper.c | 32
On Fri, May 31, 2019 at 12:42 PM Philippe Mathieu-Daudé
wrote:
>
> Hi Miroslav,
>
> On 5/31/19 11:12 AM, Miroslav Rezanina wrote:
> > On Tue, May 14, 2019 at 04:52:56PM +0100, Alex Bennée wrote:
> >> Now we have a common semihosting console interface use that for our
> >> string output. However AR
Handling is similar to data exceptions, however we can always store the
VXC into the lowore and the FPC:
z14 PoP, 6-20, "Vector-Exception Code"
When a vector-processing exception causes a pro-
gram interruption, a vector-exception code (VXC) is
stored at location 147, and zeros are sto
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 23 +++
4 files changed, 30 insertions(+)
diff --git a/target/s390x/helper.h b/ta
Provide for all three instructions all four combinations of cc bit and
s bit.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 12
target/s390x/insn-data.def | 6 ++
target/s390x/translate_vx.inc.c | 51 +++
target/s390x/vec_fpu_helper.c | 107 ++
1. We'll reuse op_vcdg() for similar instructions later, prepare for
that.
2. We'll reuse vop64_2() later for other instructions.
We have to mangle the erm (effective rounding mode) and the m4 into
the simd_data(), and properly unmangle them again.
Make sure to restore the erm before triggerin
Vector floating-point instructions will require these functions, so
allow to use them from other files.
Signed-off-by: David Hildenbrand
---
target/s390x/fpu_helper.c | 4 ++--
target/s390x/internal.h | 4
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/s390x/fpu_hel
This is the final part of vector instruction support for s390x. It is based
on part 2, which is will send a pull-request for to Conny soon.
Part 1: Vector Support Instructions
Part 2: Vector Integer Instructions
Part 3: Vector String Instructions
Part 4: Vector Floating-Point Instructions
The cur
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 23 +++
4 files changed, 30 insertions(+)
diff --git a/target/s390x/helper.h b/ta
1. We'll reuse op_vfa() for similar instructions later, prepare for
that.
2. We'll reuse vop64_3() for other instructions later.
3. Take care of modifying the vector register only if no trap happened.
- on traps, flags are not updated and no elements are modified
- traps don't modify the fpc f
CPU_DoubleU is primarily used to reinterpret between integer and floats.
We don't really need this functionality. So let's just keep it simple
and use an uint64_t.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
linux-user/s390x/signal.c | 4 +-
target/s390x/arch_dump.c
We can reuse most of the infrastructure added for VECTOR FP ADD.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 17 +
4 files change
Take care of reading/indicating the 32-bit elements.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 19 +
target/s390x/vec_fpu_helper.c | 36 +++
Let's add it to the max model, so we can enable it.
Signed-off-by: David Hildenbrand
---
target/s390x/gen-features.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c
index c346b76bdf..a818c80332 100644
--- a/target/s390x/gen-features.c
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 23 +++
4 files changed, 30 insertions(+)
diff --git a/target/s390x/helper.h b/ta
Very similar to VECTOR FP DIVIDE.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 17 +
4 files changed, 24 insertions(+)
diff --git
We can reuse most of the infrastructure introduced for
VECTOR FP CONVERT FROM FIXED 64-BIT and friends.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c
We can reuse some of the infrastructure introduced for
VECTOR FP CONVERT FROM FIXED 64-BIT and friends.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c
On 31.05.19 12:44, David Hildenbrand wrote:
> This is the final part of vector instruction support for s390x. It is based
> on part 2, which is will send a pull-request for to Conny soon.
>
> Part 1: Vector Support Instructions
> Part 2: Vector Integer Instructions
> Part 3: Vector String Instruct
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 4 +++
target/s390x/insn-data.def | 4 +++
target/s390x/translate_vx.inc.c | 23 +
target/s390x/vec_fpu_helper.c | 61 +
4 files changed, 92 insertions(+)
diff --git a/targ
We don't care about the other two missing base features:
- S390_FEAT_DFP_PACKED_CONVERSION
- S390_FEAT_GROUP_GEN13_PTFF
Signed-off-by: David Hildenbrand
---
hw/s390x/s390-virtio-ccw.c | 2 ++
target/s390x/cpu_models.c | 4 ++--
target/s390x/gen-features.c | 11 +++
3 files changed,
Public bug reported:
# Investigate migration cpu hog(100%) bug
I have some issues when migrating from kernel 4.14.63 running qemu 2.11.2 to
kernel 4.19.43 running qemu 2.11.2.
The hypervisors are running on debian jessie with libvirt v5.3.0.
Linux, libvirt and qemu are all custom compiled.
I mi
We can reuse float64_dcmask().
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 21 ++
target/s390x/vec_fpu_helper.c | 39 +
4 files changed,
The only FP instruction we can implement without an helper.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 42 +
2 files changed, 44 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s3
Once we unlock S390_FEAT_VECTOR for TCG, we want linux-user to be
able to make use of it.
Signed-off-by: David Hildenbrand
---
target/s390x/cpu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index b1df63d82c..6af1a1530f 100644
--- a/target/s390x/
Simulate XxC=0 and ERM=0 (current mode), so we can use the existing
helper function.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 19 +++
target/s390x/vec_fpu_helper.c |
On Tue, May 28, 2019 at 11:45:44AM +0300, Vladimir Sementsov-Ogievskiy wrote:
> We have similar padding code in bdrv_co_pwritev,
> bdrv_co_do_pwrite_zeroes and bdrv_co_preadv. Let's combine and unify
> it.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> block/io.c | 344 +
https://bugs.launchpad.net/qemu/+bug/1831225
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/177
Title:
guest migration 100% cpu freeze bug
Status in QEMU:
Fix Released
Bug description:
# I
Similar to VECTOR FP ADD.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 3 +++
target/s390x/vec_fpu_helper.c | 17 +
4 files changed, 24 insertions(+)
diff --git a/targe
Miroslav Rezanina writes:
> On Tue, May 14, 2019 at 04:52:56PM +0100, Alex Bennée wrote:
>> Now we have a common semihosting console interface use that for our
>> string output. However ARM is currently unique in also supporting
>> semihosting for linux-user so we need to replicate the API in
>
- Original Message -
> From: "Philippe Mathieu-Daudé"
> To: "Miroslav Rezanina" , "Alex Bennée"
>
> Cc: "Peter Maydell" , "Riku Voipio"
> , qemu-devel@nongnu.org,
> qemu-...@nongnu.org, "Laurent Vivier" , "Aleksandar
> Markovic"
> Sent: Friday, May 31, 2019 12:42:46 PM
> Subject: Re
On Thu, May 30, 2019 at 03:43:26PM +1000, Alexey Kardashevskiy wrote:
>
>
> On 30/05/2019 15:33, David Gibson wrote:
> > On Fri, May 24, 2019 at 03:31:54PM +1000, Alexey Kardashevskiy wrote:
> >>
> >>
> >> On 23/05/2019 15:29, David Gibson wrote:
> >>> Device nodes for PCI bridges (both host and
On Wed, 29 May 2019 11:12:43 +0200
Cornelia Huck wrote:
> The generic s390 section looks like the best resting place.
>
> Signed-off-by: Cornelia Huck
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1f5f8b7a2c37..0be23997e9fe 1006
- Original Message -
> From: "Alex Bennée"
> To: "Miroslav Rezanina"
> Cc: qemu-devel@nongnu.org, "Peter Maydell" , "Riku
> Voipio" ,
> qemu-...@nongnu.org, "Laurent Vivier"
> Sent: Friday, May 31, 2019 1:08:06 PM
> Subject: Re: [Qemu-devel] [RFC PATCH 06/11] target/arm: use the comm
From: Aleksandar Rikalo
Implement support for translation of system call statx(). The
implementation includes invoking other (more mature) system calls
(from the same 'stat' family) on the host side. This way, the
problems of potential lack of statx() availability of on the host
side are avoided.
From: Aleksandar Markovic
This is a collection of misc patches for Linux user that I recently
accumulated from variuous sources. All of them originate from problems
observed on mips target. However, these changes actually affect and fix
problems on multiple targets.
v6->v7:
- fixed a build er
From: Neng Chen
Add support for options IPV6_ADD_MEMBERSHIP and IPV6_DROP_MEMPEMBERSHIP
of the syscall setsockopt(). These options control membership in
multicast groups. Their argument is a pointer to a struct ipv6_mreq,
which is in turn defined in IP v6 header netinet/in.h as:
struct ipv6_mre
On 30.05.19 13:22, Peter Maydell wrote:
> On Mon, 20 May 2019 at 18:06, Cornelia Huck wrote:
>>
>> From: David Hildenbrand
>>
>> A galois field multiplication in field 2 is like binary multiplication,
>> however instead of doing ordinary binary additions, xor's are performed.
>> So no carries are
A virsh dumpxml of one of the guests:
vps12
-953c-d629-1276-0616
4194304
4194304
2
/machine
hvm
Westmere
destroy
restart
restart
/usr/bin/kvm
On 30.05.19 00:10, Kevin Wolf wrote:
> Am 24.05.2019 um 19:28 hat Max Reitz geschrieben:
>> This enum indicates whether a file is stored on a rotating disk or a
>> solid-state drive. Drivers report it via the .bdrv_get_info() callback,
>> and if they do not, the global bdrv_get_info() implementati
On 30.05.19 11:40, Kevin Wolf wrote:
> Am 28.05.2019 um 21:53 hat Max Reitz geschrieben:
>> img_rebase() can leak a QDict in two occasions. Fix it.
>>
>> Coverity: CID 1401416
>> Fixes: d16699b64671466b42079c45b89127aeea1ca565
>> Fixes: 330c72957196e0ae382abcaa97ebf4eb9bc8574f
>> Signed-off-by: Ma
On 5/31/19 6:32 AM, David Hildenbrand wrote:
> On 30.05.19 13:22, Peter Maydell wrote:
>> Hi -- Coverity (CID 1401703) complains that a lot of this
>> function is dead code:
>>
>>> +static S390Vector galois_multiply64(uint64_t a, uint64_t b)
>>> +{
>>> +S390Vector res = {};
>>> +S390Vector
On Wed, 29 May 2019 09:47:57 -0400
Eric Farman wrote:
> On 5/7/19 11:47 AM, Cornelia Huck wrote:
> > A vfio-ccw device may provide an async command subregion for
> > issuing halt/clear subchannel requests. If it is present, use
> > it for sending halt/clear request to the device; if not, fall
> >
On Tue, May 7, 2019 at 11:32 PM Tao Xu wrote:
>
> This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
> according to the command line. The ACPI HMAT describes the memory attributes,
> such as memory side cache attributes and bandwidth and latency details,
> related to the
Peter Xu wrote:
> cpu_physical_memory_sync_dirty_bitmap() has one RAMBlock* as
> parameter, which means that it must be with RCU read lock held
> already. Taking it again inside seems redundant. Removing it.
> Instead comment on the functions about the RCU read lock.
Anyways, hotplug/unplug is
Peter Xu wrote:
> Similar to 9460dee4b2 ("memory: do not touch code dirty bitmap unless
> TCG is enabled", 2015-06-05) but for the migration bitmap - we can
> skip the MIGRATION bitmap update if migration not enabled.
>
> Reviewed-by: Paolo Bonzini
> Signed-off-by: Peter Xu
Reviewed-by: Juan Qu
Peter Xu wrote:
> cpu_physical_memory_sync_dirty_bitmap() has one RAMBlock* as
> parameter, which means that it must be with RCU read lock held
> already. Taking it again inside seems redundant. Removing it.
> Instead comment on the functions about the RCU read lock.
>
> Reviewed-by: Paolo Bonzi
Peter Xu wrote:
> It's never used anywhere.
>
> Reviewed-by: Paolo Bonzini
> Signed-off-by: Peter Xu
Reviewed-by: Juan Quintela
Peter Xu wrote:
> According to: https://spdx.org/ids-how, let's still allow QEMU to use
> the SPDX license identifier:
>
> // SPDX-License-Identifier: ***
>
> Signed-off-by: Peter Xu
Reviewed-by: Juan Quintela
Althought this patch don't belong to the series O:-)
Miroslav Rezanina writes:
> - Original Message -
>> From: "Alex Bennée"
>> To: "Miroslav Rezanina"
>> Cc: qemu-devel@nongnu.org, "Peter Maydell" , "Riku
>> Voipio" ,
>> qemu-...@nongnu.org, "Laurent Vivier"
>> Sent: Friday, May 31, 2019 1:08:06 PM
>> Subject: Re: [Qemu-devel] [RFC P
This is a bug in the debian package that you mention. The 2MB firmware
executable (QEMU_EFI.fd) and the 768KB varstore template (QEMU_VARS.fd)
that the edk2 ArmVirtQemu platform build produces cannot be passed
directly to QEMU. Both files have to be padded to 64MB first. The
padding is generally do
Jon Doron writes:
> Signed-off-by: Jon Doron
Reviewed-by: Alex Bennée
> ---
> gdbstub.c | 39 ++-
> 1 file changed, 30 insertions(+), 9 deletions(-)
>
> diff --git a/gdbstub.c b/gdbstub.c
> index 57bfa4..fc9526b3f5 100644
> --- a/gdbstub.c
> +++ b/gd
Jon Doron writes:
> Signed-off-by: Jon Doron
Reviewed-by: Alex Bennée
> ---
> gdbstub.c | 86 +++
> 1 file changed, 67 insertions(+), 19 deletions(-)
>
> diff --git a/gdbstub.c b/gdbstub.c
> index db213cf173..57bfa4 100644
> --- a/gdb
When configuring device pass-through via VFIO to a VM, I noticed that QEMU
tries to register (DMA_MAP) all memory regions of a guest (not only RAM). That
includes firmware regions like "pc.rom". Would a physical device ever need
access to those? Am I missing something?
Jon Doron writes:
> Signed-off-by: Jon Doron
Reviewed-by: Alex Bennée
> ---
> gdbstub.c | 101 +-
> 1 file changed, 61 insertions(+), 40 deletions(-)
>
> diff --git a/gdbstub.c b/gdbstub.c
> index e6d895177b..1db322c15a 100644
> --- a/gdb
Jon Doron writes:
> Signed-off-by: Jon Doron
Reviewed-by: Alex Bennée
> ---
> gdbstub.c | 48 ++--
> 1 file changed, 26 insertions(+), 22 deletions(-)
>
> diff --git a/gdbstub.c b/gdbstub.c
> index 8a401e6527..ea85966b27 100644
> --- a/gdbstub.c
Jon Doron writes:
> Signed-off-by: Jon Doron
Reviewed-by: Alex Bennée
> ---
> gdbstub.c | 50 ++
> 1 file changed, 38 insertions(+), 12 deletions(-)
>
> diff --git a/gdbstub.c b/gdbstub.c
> index fc9526b3f5..07740ec0af 100644
> --- a/gdbstub.
Jon Doron writes:
> Signed-off-by: Jon Doron
Reviewed-by: Alex Bennée
> ---
> gdbstub.c | 48 ++--
> 1 file changed, 26 insertions(+), 22 deletions(-)
>
> diff --git a/gdbstub.c b/gdbstub.c
> index 8a401e6527..ea85966b27 100644
> --- a/gdbstub.c
From: Yoshinori Sato
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190516055244.95559
The v14 patch set, from which I had prepared the pull request,
contained errors within make check-qtest-rx. I have added 4
new patches, 12 through 15, to address those failures. These
are placed before the enablement patch 16 so that there is no
point at which these tests both run and fail.
I ha
From: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Message-Id: <20190516055244.95559-4-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
target/rx/cpu.h | 227
target/rx/cpu.c | 222
Jon Doron writes:
> Signed-off-by: Jon Doron
Reviewed-by: Alex Bennée
> ---
> gdbstub.c | 170 +++---
> 1 file changed, 110 insertions(+), 60 deletions(-)
>
> diff --git a/gdbstub.c b/gdbstub.c
> index 3fd1a1cddb..648191a3b0 100644
> --- a/gd
Fixes check-qtest-rx: tests/qmp-cmd-test
Cc: Eric Blake
Cc: Markus Armbruster
Signed-off-by: Richard Henderson
---
qapi/common.json | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/qapi/common.json b/qapi/common.json
index 99d313ef3b..d0fc931159 100644
--- a/qapi/common.js
From: Yoshinori Sato
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190516055
From: Yoshinori Sato
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190516055244.9555
From: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Message-Id: <20190516055244.95559-3-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
target/rx/helper.h| 31 +++
target/rx/helper.c| 148 +
target/rx/op_helper.c | 481 ++
From: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190516055244.95559-13-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
From: Yoshinori Sato
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Benn
From: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190516055244.95559-5-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h |5 +
target/rx/disas.c | 1480 ++
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Richard Henderson
---
target/rx/disas.c | 154 +
From: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190516055244.95559-12-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/qemu/bitops.h | 38 ++
1 fil
From: Yoshinori Sato
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190516055244.95559-11-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
Note that the ld == 3 case handled by prt_ldmi is decoded as
XCHG_rr and cannot appear here.
Reviewed-by: Yoshinori Sato
Signed-off-by: Richard Henderson
---
target/rx/disas.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/target/rx/disas.c b/target/rx/disas.c
index
From: Yoshinori Sato
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
Signed-off-by: Yoshinori Sato
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190516055244.95559-9-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/hw/rx/rx
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