Am 08.04.2019 um 16:35 hat Kevin Wolf geschrieben:
> This series adds optional feature lists to struct definitions in the
> QAPI schema and makes use of them to advertise the new behaviour of
> auto-read-only=on in file-posix.
Ping?
On Wed, Apr 17, 2019 at 05:48:50PM +0200, Kevin Wolf wrote:
> Even for block nodes with bs->drv == NULL, we can't just ignore a
> bdrv_set_aio_context() call. Leaving the node in its old context can
> mean that it's still in an iothread context in bdrv_close_all() during
> shutdown, resulting in an
On 17.4.19. 18:41, Aleksandar Markovic wrote:
From: Mateja Marjanovic
Subject: [PATCH] target/mips: Amend tests for MSA binary integer operations
Amend tests for certain MSA binary integer instructions
(for example DIV_S.B) by appending two missing test cases
to complete standard battery of 8
On Thu, Apr 18, 2019 at 12:45:01AM -0300, Eduardo Habkost wrote:
> Fix the following crash:
>
> $ qemu-system-x86_64 -cpu ''
> qemu-system-x86_64: qom/cpu.c:291: cpu_class_by_name: \
> Assertion `cpu_model && cc->class_by_name' failed.
>
> Regression test script included.
>
> Fixes: co
On 17.4.19. 22:22, Aleksandar Markovic wrote:
From: Aleksandar Markovic
Subject: Re: [PATCH] target/mips: Amend tests for MSA binary integer operations
From: Mateja Marjanovic
Subject: [PATCH] target/mips: Amend tests for MSA binary integer operations
Amend tests for certain MSA binary inte
Public bug reported:
On MIPS, data accesses to pages mapped in the TLB result in
mips_cpu_handle_mmu_fault() marking the page unconditionally executable,
even if the TLB entry has the XI bit set. Later on, when there is an
attempt to execute this page, no exception is generated, even though
TLBXI
Hi,
On Wed, Mar 13, 2019 at 6:36 AM Philippe Mathieu-Daudé wrote:
>
> '
> On Tue, Mar 12, 2019 at 6:44 PM Markus Armbruster wrote:
> >
> > Dear board code maintainers,
> >
> > This is a (rather late) follow-up to the last QEMU summit. Minutes[*]:
> >
> > * Deprecating unmaintained features (de
Paolo Bonzini writes:
> Hi all,
>
> lately I have been thinking of converting the QEMU build system to
> Meson. Meson is a relatively new build system that can replace
> Autotools or hand-written Makefiles such as QEMU; as a die-hard
> Autotools fan, I must say that Meson is by far better than a
Am 17.04.2019 um 19:10 hat Eric Blake geschrieben:
> since v2: Fix problems pointed out by Max:
> vmdk (test 59) output had not actually been tested
> 32-bit builds of size_to_str() have been been broken since 2.10
Thanks, applied to the block branch.
Kevin
On 18/04/19 10:21, Markus Armbruster wrote:
> Paolo Bonzini writes:
>
>> Hi all,
>>
>> lately I have been thinking of converting the QEMU build system to
>> Meson. Meson is a relatively new build system that can replace
>> Autotools or hand-written Makefiles such as QEMU; as a die-hard
>> Autoto
17.04.2019 19:22, Max Reitz wrote:
> On 16.04.19 12:02, Vladimir Sementsov-Ogievskiy wrote:
>> 10.04.2019 23:20, Max Reitz wrote:
>>> What bs->file and bs->backing mean depends on the node. For filter
>>> nodes, both signify a node that will eventually receive all R/W
>>> accesses. For format nod
On Wed, Apr 17, 2019 at 09:26:10PM +0200, Pavel Hrdina wrote:
> On Wed, Apr 17, 2019 at 10:53:04PM +0800, Pu Wen wrote:
> > On 2019/4/16 22:17, Pavel Hrdina wrote:
> > > On Tue, Apr 16, 2019 at 08:06:13PM +0800, Pu Wen wrote:
> > > > Add a new base CPU model called 'Dhyana' to model processors from
Hi all,
First some background:
For the userspace side of AArch64 guest SVE support we need to
expose KVM's allowed vector lengths bitmap to the user and allow
the user to choose a subset of that bitmap. Since bitmaps are a
bit awkward to work with then we'll likely want to expose it as
an array o
On Tue, 16 Apr 2019 13:09:08 +0200
Christian Borntraeger wrote:
> This fails with more than 8TB, e.g. "-m 9T "
>
> [pid 231065] ioctl(10, KVM_SET_USER_MEMORY_REGION, {slot=0, flags=0,
> guest_phys_addr=0, memory_size=0, userspace_addr=0x3ffc850}) = 0
> [pid 231065] ioctl(10, KVM_SET_USER_M
On 17/04/19 21:50, Frank Yang via Qemu-devel wrote:
> What's a quick fix for stuff like this?
It's a false positive. The access in T14 is protected via
rcu_read_lock/rcu_read_unlock.
Paolo
> WARNING: ThreadSanitizer: data race (pid=168036)
> Write of size 8 at 0x7b900017a100 by thread T1 (mut
On Tue, Apr 16, 2019 at 03:59:09PM +0300, Liran Alon wrote:
> Hi,
>
> This patch series aims to add supprot to migrate a VM with a vhost-scsi
> device.
>
> The 1st patch fixes a bug of mistakenly not stopping vhost-scsi backend when a
> VM is stopped (As happens on migratino pre-copy completion)
On Wed, 17 Apr 2019 09:40:36 +0800
Wei Yang wrote:
> To build MCFG, two information is necessary:
>
> * bus number
> * base address
>
> Abstract these two information to AcpiMcfgInfo so that build_mcfg and
> build_mcfg_q35 will have the same declaration.
>
> Signed-off-by: Wei Yang
>
On Thu, Apr 18, 2019 at 11:28:41AM +0200, Andrew Jones wrote:
> Hi all,
>
> First some background:
>
> For the userspace side of AArch64 guest SVE support we need to
> expose KVM's allowed vector lengths bitmap to the user and allow
> the user to choose a subset of that bitmap. Since bitmaps are
On 17/04/19 14:30, Stefan Hajnoczi wrote:
> On Wed, Apr 17, 2019 at 12:54 PM Paolo Bonzini wrote:
>> Linux places a limit of UIO_MAXIOV pages on SG_IO ioctls (and if the limit
>> is exceeded, a confusing ENOMEM error is returned[1]). Prevent the guest
>> from exceeding these limits, by capping th
On Wed, Apr 17, 2019 at 05:05:31PM +0300, Nikos Dragazis wrote:
> Hi everyone,
>
> as you may already know, there is an experimental feature in QEMU wiki
> page called “virtio-vhost-user” [1]. Stefan Hajnoczi launched this
> feature a year ago. He even wrote an RFC implementation [2]. However,
> t
On Thu, Apr 18, 2019 at 09:48:25AM +0100, Daniel P. Berrangé wrote:
> On Wed, Apr 17, 2019 at 09:26:10PM +0200, Pavel Hrdina wrote:
> > On Wed, Apr 17, 2019 at 10:53:04PM +0800, Pu Wen wrote:
> > > On 2019/4/16 22:17, Pavel Hrdina wrote:
> > > > On Tue, Apr 16, 2019 at 08:06:13PM +0800, Pu Wen wrot
Fixed in
https://lists.gnu.org/archive/html/qemu-devel/2019-04/msg02524.html
** Changed in: qemu
Status: New => In Progress
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https://bugs.launchpad.net/bugs/1824528
Title:
qem
Am 18.04.2019 um 11:48 hat Paolo Bonzini geschrieben:
> On 17/04/19 14:30, Stefan Hajnoczi wrote:
> > On Wed, Apr 17, 2019 at 12:54 PM Paolo Bonzini wrote:
> >> Linux places a limit of UIO_MAXIOV pages on SG_IO ioctls (and if the limit
> >> is exceeded, a confusing ENOMEM error is returned[1]). P
On Thu, Apr 18, 2019 at 10:46:34AM +0100, Andrew Jones wrote:
> On Thu, Apr 18, 2019 at 11:28:41AM +0200, Andrew Jones wrote:
> > Hi all,
> >
> > First some background:
> >
> > For the userspace side of AArch64 guest SVE support we need to
> > expose KVM's allowed vector lengths bitmap to the use
On Tue, 16 Apr 2019 23:59:40 -0300
Eduardo Habkost wrote:
> The "model[,option...]" string parsed by the function is not just
> a CPU model. Rename the function and its argument to indicate it
> expects the full "-cpu" option to be provided.
>
> Signed-off-by: Eduardo Habkost
Reviewed-by: Igo
Some machines (like the pxa2xx-based ARM machines) only have a sysbus
OHCI controller, but no PCI. With the new Kconfig-style build system,
it will soon be possible to create QEMU binaries that only contain
such PCI-less machines. However, the two OHCI controllers, for sysbus
and for PCI, are curre
On 04/18/19 07:02, Joachim Durchholz wrote:
> Am 17.04.19 um 20:27 schrieb Laszlo Ersek:
>> So, let's look at your original question again (which was not a problem
>> statement):
>
> So you need an explicit problem statement to know that somebody might
> have a problem?
You're on a technical mail
On Wed, 17 Apr 2019 09:40:38 +0800
Wei Yang wrote:
> build_append_foo() API doesn't need explicit endianness conversions
> which eliminates a source of errors and it makes build_mcfg() look like
> declarative definition of MCFG table in ACPI spec, which makes it easy
> to review.
>
> Signed-off-
On 18/04/19 12:47, Kevin Wolf wrote:
>> This is acually only an issue with kernels prior to 4.5, so it should be
>> fixed downstream instead.
>
> I don't think that upstream QEMU has kernels > 4.5 as an official
> requirement, though? We try to be compatible with quite old libs, so we
> should stay
On Thu, 18 Apr 2019 00:45:01 -0300
Eduardo Habkost wrote:
> Fix the following crash:
>
> $ qemu-system-x86_64 -cpu ''
> qemu-system-x86_64: qom/cpu.c:291: cpu_class_by_name: \
> Assertion `cpu_model && cc->class_by_name' failed.
>
> Regression test script included.
>
> Fixes: commit
On Wed, 17 Apr 2019 13:31:43 +0200
David Hildenbrand wrote:
> Rename qemu_getrampagesize() to qemu_minrampagesize(). While at it,
> properly rename find_max_supported_pagesize() to
> find_min_backend_pagesize().
>
> s390x is actually interested into the maximum ram pagesize, so
> introduce and u
Am 18.04.2019 um 13:01 hat Paolo Bonzini geschrieben:
> On 18/04/19 12:47, Kevin Wolf wrote:
> >> This is acually only an issue with kernels prior to 4.5, so it should be
> >> fixed downstream instead.
> >
> > I don't think that upstream QEMU has kernels > 4.5 as an official
> > requirement, though
On Thu, 18 Apr 2019 01:01:03 -0300
Eduardo Habkost wrote:
> hppa_cpu_list() is dead code and is never called. Delete it.
>
> Cc: Richard Henderson
> Signed-off-by: Eduardo Habkost
Reviewed-by: Igor Mammedov
> ---
> target/hppa/cpu.c | 22 --
> 1 file changed, 22 deleti
On 18.04.19 11:38, Igor Mammedov wrote:
> On Tue, 16 Apr 2019 13:09:08 +0200
> Christian Borntraeger wrote:
>
>> This fails with more than 8TB, e.g. "-m 9T "
>>
>> [pid 231065] ioctl(10, KVM_SET_USER_MEMORY_REGION, {slot=0, flags=0,
>> guest_phys_addr=0, memory_size=0, userspace_addr=0x3ffc8500
This bug report is invalid, for a less important reason and for a more
important reason.
(1) The less important reason is that "/pci@i0cf8/*@6" is a string that
would never be generated by QEMU, as a bootorder entry. QEMU places
specific OpenFirmware device paths into the "bootorder" fw_cfg file.
On Thu, Apr 18, 2019 at 11:28:41AM +0200, Andrew Jones wrote:
> Hi all,
>
> First some background:
>
> For the userspace side of AArch64 guest SVE support we need to
> expose KVM's allowed vector lengths bitmap to the user and allow
> the user to choose a subset of that bitmap. Since bitmaps are
* Markus Armbruster (arm...@redhat.com) wrote:
> The various TARGET_cpu_list() take an fprintf()-like callback and a
> FILE * to pass to it. Their callers (vl.c's main() via list_cpus(),
> bsd-user/main.c's main(), linux-user/main.c's main()) all pass
> fprintf() and stdout. Thus, the flexibility
On Thu, Apr 18, 2019 at 11:52:04AM +0100, Dave Martin wrote:
> On Thu, Apr 18, 2019 at 10:46:34AM +0100, Andrew Jones wrote:
> > On Thu, Apr 18, 2019 at 11:28:41AM +0200, Andrew Jones wrote:
> > > Hi all,
> > >
> > > First some background:
> > >
> > > For the userspace side of AArch64 guest SVE s
* Markus Armbruster (arm...@redhat.com) wrote:
> Commit dc99065b5f9 (v0.1.0) added dis-asm.h from binutils.
>
> Commit 43d4145a986 (v0.1.5) inlined bfd.h into dis-asm.h to remove the
> dependency on binutils.
>
> Commit 76cad71136b (v1.4.0) moved dis-asm.h to include/disas/bfd.h.
> The new name i
Adding generation 15.
Some interesting aspects:
- conditional SSKE and bpb are deprecated. This patch set addresses that
for csske.
- no name yet for gen15, I suggest to use the assigned numbers and
provide an alias later on. (I have split out this into a separate
patch)
Christian Borntraeg
Provide the "Miscellaneous-Instruction-Extensions Facility 3" via
stfle.61.
Signed-off-by: Christian Borntraeger
---
target/s390x/cpu_features.c | 1 +
target/s390x/cpu_features_def.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_feature
Add vector enhancements to the cpu model.
Signed-off-by: Christian Borntraeger
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c
index 4d624b2256..ed3f6aa969
add the deflate conversion facility.
Signed-off-by: Christian Borntraeger
---
target/s390x/cpu_features.c | 9 +
target/s390x/cpu_features.h | 1 +
target/s390x/cpu_features_def.h | 7 +++
target/s390x/gen-features.c | 12
target/s390x/kvm.c |
While we have removed csske and bpb from the default model, the very
common case of "host-model" in libvirt (expanded to a base model
+ features) would still contain bpb and csske. This can prevent
migration to a future machine for a host-model machine. Let us fence
bpb and csske when we run on a g
add several new features (msa9, sort, deflate, additional vector
instructions, new general purpose instructions) to generation 15.
Also disable csske and bpb from the default model. This will allow to
migrate generation 15 machines to future machines that do not have these
features.
Signed-off-by
8561 and 8562 will be gen15 machines. There is no name yet, lets us use
the cpu id as base name. Later on we can provide aliases with the proper
name.
Signed-off-by: Christian Borntraeger
---
target/s390x/cpu_models.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/s390x/cpu_models.
to be replaced by a proper one
Signed-off-by: Christian Borntraeger
---
linux-headers/asm-s390/kvm.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/linux-headers/asm-s390/kvm.h b/linux-headers/asm-s390/kvm.h
index 0265482f8f..03ab5968c7 100644
--- a/linux-headers/asm-s39
conditional sske is deprecated and a distant future machine (will be one
where the IBC will not allow to fully go back to z14) will remove this
feature. To prepare for this and allow for the z14 and older cpu model
to still run on systems without csske, remove csske from the base (and
thus the defa
add the enhanced sort facility.
Signed-off-by: Christian Borntraeger
---
target/s390x/cpu_features.c | 10 ++
target/s390x/cpu_features.h | 1 +
target/s390x/cpu_features_def.h | 8
target/s390x/gen-features.c | 14 ++
target/s390x/kvm.c |
Provide the MSA9 facility (stfle.155). This also contains pckmo
functions for key wrapping. Keep them in a separate group to allow
disabling/enabling those as a block if necessary.
Signed-off-by: Christian Borntraeger
---
target/s390x/cpu_features.c | 32 +
target/s3
On Thu, Apr 18, 2019 at 12:47:37PM +0200, Kevin Wolf wrote:
> Am 18.04.2019 um 11:48 hat Paolo Bonzini geschrieben:
> > On 17/04/19 14:30, Stefan Hajnoczi wrote:
> > > On Wed, Apr 17, 2019 at 12:54 PM Paolo Bonzini
> > > wrote:
> > >> Linux places a limit of UIO_MAXIOV pages on SG_IO ioctls (and
From: Mateja Marjanovic
Optimize set of MSA instructions ILVEV., using
directly tcg registers and performing logic on them
instead of using helpers.
In the following table, the first column is the performance
before this patch. The second represents the performance
after converting from helpers
From: Mateja Marjanovic
Optimize ILVL. instructions, using a hybrid
approach. For byte data elements, use a helper with an
unrolled loop (having much better performance than
direct tcg translation), for halfword, word and
doubleword data elements use directly tcg registers
and logic performed on
From: Mateja Marjanovic
Optimize set of MSA instructions ILVOD., using
directly tcg registers and performing logic on them instead
of using helpers.
In the following table, the first column is the performance
before this patch. The second represents the performance
after converting from helpers
From: Mateja Marjanovic
Optimize and refactor MSA instructions ILVEV.,
ILVOD., ILVL. and ILVR..
v8:
- Rebased onto current master branch.
- Inserted Reviewed-by in the applicable commit message.
v7:
- Use tcg constants, instead of uint64_t constants in
ILVEV. and ILVOD. instructions.
- R
From: Mateja Marjanovic
The implementation for ILVOD.D and ILVL.D instructions
is equivalent, so use a single handler for both of them.
Suggested-by: Aleksandar Markovic
Signed-off-by: Mateja Marjanovic
---
target/mips/translate.c | 27 ++-
1 file changed, 10 insertion
From: Mateja Marjanovic
Optimize ILVR. instructions, using a hybrid
approach. For byte data elements, use a helper with an
unrolled loop (having much better performance than
direct tcg translation), for halfword, word and
doubleword data elements use directly tcg registers
and logic performed on
From: Mateja Marjanovic
The implementation for ILVEV.D and ILVR.D instructions
is equivalent, so use a single handler for both of them.
Suggested-by: Aleksandar Markovic
Signed-off-by: Mateja Marjanovic
---
target/mips/translate.c | 30 +++---
1 file changed, 11 insert
On Thu, 18 Apr 2019 13:24:43 +0200
David Hildenbrand wrote:
> On 18.04.19 11:38, Igor Mammedov wrote:
> > On Tue, 16 Apr 2019 13:09:08 +0200
> > Christian Borntraeger wrote:
> >
> >> This fails with more than 8TB, e.g. "-m 9T "
> >>
> >> [pid 231065] ioctl(10, KVM_SET_USER_MEMORY_REGION, {sl
Patchew URL:
https://patchew.org/QEMU/20190418113110.160664-1-borntrae...@de.ibm.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190418113110.160664-1-borntrae...@de.ibm.com
Type: series
Subject: [Qemu-devel] [PATCH 00/10] s
On 18.04.19 14:01, Igor Mammedov wrote:
> On Thu, 18 Apr 2019 13:24:43 +0200
> David Hildenbrand wrote:
>
>> On 18.04.19 11:38, Igor Mammedov wrote:
>>> On Tue, 16 Apr 2019 13:09:08 +0200
>>> Christian Borntraeger wrote:
>>>
This fails with more than 8TB, e.g. "-m 9T "
[pid 23
Public bug reported:
commit 377b155bde451d5ac545fbdcdfbf6ca17a4228f5
Merge: c876180938 328eb60dc1
Author: Peter Maydell ; masked for anti-spamming purposes
Date: Mon Mar 11 18:26:37 2019 +
https://github.com/qemu/qemu/commit/377b155bde451d5ac545fbdcdfbf6ca17a4228f5
--
On 4/17/19 2:50 AM, Stephen Checkoway wrote:
> The SCC/ESCC will briefly stop asserting an interrupt when the
> transmit FIFO is filled.
>
> This code doesn't model the transmit FIFO/shift register so the
> pending transmit interrupt is never deasserted which means that an
> edge-triggered interru
On 4/17/19 12:00 PM, Ratnaraj Mirgal wrote:
> Hi All,
>
> At the outset, I do understand there is no mainstream requirement for
> having virtual wireless NIC, if et all there is any, mac80211_hwsim (part
> of Linux) is more than sufficient.
>
> So this is purely an academic attempt.
>
> In order
Extract from the libvirt log of todays launch of vms.
** Attachment added: "libvirt.log"
https://bugs.launchpad.net/qemu/+bug/1818367/+attachment/5256716/+files/libvirt.log
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On 4/17/19 3:40 AM, Wei Yang wrote:
> From: Igor Mammedov
>
> Dummy table (with signature "QEMU") creation came from original SeaBIOS
> codebase. And QEMU would have to keep it around if there were Q35 machine
> that depended on keeping ACPI tables blob constant size. Luckily there
> were no vers
On 4/18/19 1:02 PM, Igor Mammedov wrote:
> On Wed, 17 Apr 2019 09:40:38 +0800
> Wei Yang wrote:
>
>> build_append_foo() API doesn't need explicit endianness conversions
>> which eliminates a source of errors and it makes build_mcfg() look like
>> declarative definition of MCFG table in ACPI spec,
** Tags added: mips
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https://bugs.launchpad.net/bugs/1825311
Title:
mips_cpu_handle_mmu_fault renders all accessed pages executable
Status in QEMU:
New
Bug description:
On MIPS,
Hi Thomas,
On 4/18/19 1:10 PM, Thomas Huth wrote:
> Some machines (like the pxa2xx-based ARM machines) only have a sysbus
> OHCI controller, but no PCI. With the new Kconfig-style build system,
> it will soon be possible to create QEMU binaries that only contain
> such PCI-less machines. However,
Yeah, this looks like a bug -- we should pass the access_type through
rather than using MMU_DATA_LOAD.
** Changed in: qemu
Status: New => Confirmed
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Hi Eduardo,
On 4/18/19 6:01 AM, Eduardo Habkost wrote:
> hppa_cpu_list() is dead code and is never called. Delete it.
>
> Cc: Richard Henderson
> Signed-off-by: Eduardo Habkost
Tested-by: Philippe Mathieu-Daudé
> ---
> target/hppa/cpu.c | 22 --
> 1 file changed, 22 del
On 18.04.19 13:31, Christian Borntraeger wrote:
> conditional sske is deprecated and a distant future machine (will be one
> where the IBC will not allow to fully go back to z14) will remove this
> feature. To prepare for this and allow for the z14 and older cpu model
> to still run on systems with
On 18.04.19 13:31, Christian Borntraeger wrote:
> Provide the "Miscellaneous-Instruction-Extensions Facility 3" via
> stfle.61.
>
> Signed-off-by: Christian Borntraeger
> ---
> target/s390x/cpu_features.c | 1 +
> target/s390x/cpu_features_def.h | 1 +
> 2 files changed, 2 insertions(+)
>
>
On 18.04.19 13:31, Christian Borntraeger wrote:
> Provide the MSA9 facility (stfle.155). This also contains pckmo
> functions for key wrapping. Keep them in a separate group to allow
> disabling/enabling those as a block if necessary.
>
> Signed-off-by: Christian Borntraeger
> ---
> target/s390
On 18.04.19 14:48, David Hildenbrand wrote:
> On 18.04.19 13:31, Christian Borntraeger wrote:
>> While we have removed csske and bpb from the default model, the very
>> common case of "host-model" in libvirt (expanded to a base model
>> + features) would still contain bpb and csske. This can pre
On 18.04.19 13:31, Christian Borntraeger wrote:
> Add vector enhancements to the cpu model.
>
> Signed-off-by: Christian Borntraeger
> ---
> target/s390x/cpu_features.c | 2 ++
> target/s390x/cpu_features_def.h | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/target/s390x/cpu_fea
On 18.04.19 13:31, Christian Borntraeger wrote:
> While we have removed csske and bpb from the default model, the very
> common case of "host-model" in libvirt (expanded to a base model
> + features) would still contain bpb and csske. This can prevent
> migration to a future machine for a host-mode
Hi,
See the following 2 patches fixing some memory issues in
tcp_emu(). Those are not regressions, consider it for 4.1.
Marc-André Lureau (2):
slirp: ensure there is enough space in mbuf to null-terminate
slirp: don't manipulate so_rcv in tcp_emu()
slirp/src/tcp_subr.c | 27 +++-
Prevents from buffer overflows.
Related to: https://bugzilla.redhat.com/show_bug.cgi?id=1664205
Cc: Prasad J Pandit
Signed-off-by: Marc-André Lureau
---
slirp/src/tcp_subr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/slirp/src/tcp_subr.c b/slirp/src/tcp_subr.c
index fde9207b0c..c435
For some reason, EMU_IDENT is not like other "emulated" protocols and
tries to reconstitute the original buffer, if it came in multiple
packets. Unfortunately, it does so wrongly, as it doesn't respect the
sbuf circular buffer appending rules, nor does it maintain some of the
invariants (rptr is in
On 18.04.19 14:54, David Hildenbrand wrote:
> On 18.04.19 13:31, Christian Borntraeger wrote:
>> Provide the MSA9 facility (stfle.155). This also contains pckmo
>> functions for key wrapping. Keep them in a separate group to allow
>> disabling/enabling those as a block if necessary.
>>
>> Signe
On 18.04.19 14:45, David Hildenbrand wrote:
> On 18.04.19 13:31, Christian Borntraeger wrote:
>> conditional sske is deprecated and a distant future machine (will be one
>> where the IBC will not allow to fully go back to z14) will remove this
>> feature. To prepare for this and allow for the z1
On 18.04.19 14:56, David Hildenbrand wrote:
> On 18.04.19 13:31, Christian Borntraeger wrote:
>> Add vector enhancements to the cpu model.
>>
>> Signed-off-by: Christian Borntraeger
>> ---
>> target/s390x/cpu_features.c | 2 ++
>> target/s390x/cpu_features_def.h | 2 ++
>> 2 files changed,
On 18.04.19 15:00, Christian Borntraeger wrote:
>
>
> On 18.04.19 14:45, David Hildenbrand wrote:
>> On 18.04.19 13:31, Christian Borntraeger wrote:
>>> conditional sske is deprecated and a distant future machine (will be one
>>> where the IBC will not allow to fully go back to z14) will remove t
Patchew URL:
https://patchew.org/QEMU/20190418125908.11928-1-marcandre.lur...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH 0/2] Memory fixes for slirp tcp_emu()
Type: series
Message-id: 20190418125908
On Thu, Apr 18, 2019 at 01:22:16PM +0200, Igor Mammedov wrote:
> On Thu, 18 Apr 2019 00:45:01 -0300
> Eduardo Habkost wrote:
>
> > Fix the following crash:
> >
> > $ qemu-system-x86_64 -cpu ''
> > qemu-system-x86_64: qom/cpu.c:291: cpu_class_by_name: \
> > Assertion `cpu_model && cc->c
** Patch added: "bug1825359_io_readx.patch"
https://bugs.launchpad.net/qemu/+bug/1825359/+attachment/5256724/+files/bug1825359_io_readx.patch
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https://bugs.launchpad.net/bugs/1825359
Should I make a patch then?
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https://bugs.launchpad.net/bugs/1825359
Title:
cpu_ld*_code() triggers MMU_DATA_LOAD i.s.o. MMU_INST_FETCH
Status in QEMU:
Confirmed
Bug description:
On 18.04.19 14:45, David Hildenbrand wrote:
> On 18.04.19 13:31, Christian Borntraeger wrote:
>> conditional sske is deprecated and a distant future machine (will be one
>> where the IBC will not allow to fully go back to z14) will remove this
>> feature. To prepare for this and allow for the z1
On Thu, Apr 18, 2019 at 12:28:47PM +0100, Andrew Jones wrote:
> On Thu, Apr 18, 2019 at 11:52:04AM +0100, Dave Martin wrote:
> > On Thu, Apr 18, 2019 at 10:46:34AM +0100, Andrew Jones wrote:
> > > On Thu, Apr 18, 2019 at 11:28:41AM +0200, Andrew Jones wrote:
> > > > Hi all,
> > > >
> > > > First s
On Thu, Apr 18, 2019 at 11:59:35AM +0200, Pavel Hrdina wrote:
> On Thu, Apr 18, 2019 at 09:48:25AM +0100, Daniel P. Berrangé wrote:
> > On Wed, Apr 17, 2019 at 09:26:10PM +0200, Pavel Hrdina wrote:
> > > On Wed, Apr 17, 2019 at 10:53:04PM +0800, Pu Wen wrote:
> > > > On 2019/4/16 22:17, Pavel Hrdin
The patch looks OK code-wise, but could you submit it to the mailing list,
please?
https://wiki.qemu.org/Contribute/SubmitAPatch has the details, but the most
important part is that it needs a Signed-off-by: line from you that says you
have the legal right and are willing to contribute it to QEM
The uncommented piece of my /etc/libvirt/qemu.conf.
vnc_listen = "192.168.0.61"
user = "root"
group = "root"
dynamic_ownership = 0
nvram = [
"/usr/share/edk2-ovmf/OVMF_CODE.fd:/usr/share/edk2-ovmf/OVMF_VARS.fd",
]
For some reason, emails directly from mailing list are not hitting my inbox
* Yury Kotov (yury-ko...@yandex-team.ru) wrote:
> 15.04.2019, 14:30, "Dr. David Alan Gilbert" :
> > * Daniel P. Berrangé (berra...@redhat.com) wrote:
> >> On Mon, Apr 15, 2019 at 12:15:12PM +0100, Dr. David Alan Gilbert wrote:
> >> > * Daniel P. Berrangé (berra...@redhat.com) wrote:
> >> > > On
call stack for SEGFAULT that happens during the execution of small
region. This will go away IF THE ENTRY ADDED TO TLB FOR THIS REGION IS
OF SIZE TARGET_PAGE_SIZE. However, that would not be correct behavior.
** Attachment added: "segfault_bt.txt"
https://bugs.launchpad.net/qemu/+bug/1825359/+
I have to say, after applying this patch, my test still fails while
fetching the instructions from this _small_ region. Although there is no
MMU_DATA_LOAD anymore, a few iterations later (while guest code has just
jumped to the beginning of the executable region), QEmu segfaults (call
stack is atta
On Thu, Apr 18, 2019 at 01:02:41PM +0200, Igor Mammedov wrote:
>On Wed, 17 Apr 2019 09:40:38 +0800
>Wei Yang wrote:
>
>> build_append_foo() API doesn't need explicit endianness conversions
>> which eliminates a source of errors and it makes build_mcfg() look like
>> declarative definition of MCFG
That should not happen unless you have some device that is incorrectly
not providing a suitable read function in its MemoryRegionOps. If you
look at 'mr' in the debugger you should be able to figure out which
device is the problem.
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On Thu, Apr 18, 2019 at 02:46:00PM +0800, Tao Xu wrote:
> The aim of this patch is to add struct NumaState in MachineState
> and move existing numa global nb_numa_nodes into NumaState.
> And add variable numa_support into MachineClass to decide which
> submachines support NUMA.
>
> Suggested-by: I
On Thu, Apr 18, 2019 at 11:05:20AM -0300, Eduardo Habkost wrote:
> On Thu, Apr 18, 2019 at 11:59:35AM +0200, Pavel Hrdina wrote:
> > On Thu, Apr 18, 2019 at 09:48:25AM +0100, Daniel P. Berrangé wrote:
> > > On Wed, Apr 17, 2019 at 09:26:10PM +0200, Pavel Hrdina wrote:
> > > > On Wed, Apr 17, 2019 a
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