Re: [Qemu-devel] [PATCH] riscv: Add proper alignment check and pending 'C' extension upon misa writes

> > >> > It seems to me that the C extension can be enabled at any point, since >> if C is >> > off, you know that the next insn is aligned modulo 4. >> > >> > > > Ok, This is mostly right. When C extension is enabled 32-bit base > instructions can be aligned on 2 bytes boundaries instead of 4 byt

Re: [Qemu-devel] [PATCH v7 00/17] ARM virt: Initial RAM expansion and PCDIMM/NVDIMM support

Hi Igor, On 2/25/19 10:42 AM, Igor Mammedov wrote: > On Fri, 22 Feb 2019 18:35:26 +0100 > Auger Eric wrote: > >> Hi Igor, >> >> On 2/22/19 5:27 PM, Igor Mammedov wrote: >>> On Wed, 20 Feb 2019 23:39:46 +0100 >>> Eric Auger wrote: >>> This series aims to bump the 255GB RAM limit in machvirt

[Qemu-devel] mirror questions

Hi! A question about s->cow_bitmap, introduced in far b812f6719c "mirror: perform COW if the cluster size is bigger than the granularity" cow_bitmap is just a bitmap which tracks, what clusters of target are allocated, to prevent COW in target, if target backing is not ready yet. And it is

Re: [Qemu-devel] [PATCH v3] iotests: use -M accel=qtest in 238

Am 25.02.2019 um 17:18 hat Stefan Hajnoczi geschrieben: > Test 238 does not require the kvm accelerator. tcg and qtest work too. > > Use qtest since it's always built in while kvm and tcg are not. > > Suggested-by: Thomas Huth > Signed-off-by: Stefan Hajnoczi > --- > tests/qemu-iotests/238 |

Re: [Qemu-devel] Build error with git commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116 on x86_64

On 25/02/2019 18.29, Andrew Randrianasulu wrote: > В сообщении от Monday 25 February 2019 19:19:01 Philippe Mathieu-Daudc3a9 > написал(а): >> Hi Andrew, >> >> On 2/23/19 1:35 AM, Andrew Randrianasulu wrote: >>> Hello! >>> >>> I just pulled latest git >> >> [...] >> >>> and default build with simpl

Re: [Qemu-devel] Build error with git commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116 on x86_64

В сообщении от Tuesday 26 February 2019 11:54:12 вы написали: > On 25/02/2019 18.29, Andrew Randrianasulu wrote: > > В сообщении от Monday 25 February 2019 19:19:01 Philippe Mathieu-Daudc3a9 > > > > написал(а): > >> Hi Andrew, > >> > >> On 2/23/19 1:35 AM, Andrew Randrianasulu wrote: > >>> Hello! >

Re: [Qemu-devel] Build error with git commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116 on x86_64

On 26/02/2019 09.58, Andrew Randrianasulu wrote: > В сообщении от Tuesday 26 February 2019 11:54:12 вы написали: >> On 25/02/2019 18.29, Andrew Randrianasulu wrote: >>> В сообщении от Monday 25 February 2019 19:19:01 Philippe Mathieu-Daudc3a9 >>> >>> написал(а): Hi Andrew, On 2/23/19

Re: [Qemu-devel] [PATCH v2 0/7] s390x/tcg: Cleanups and refactorings for vector instructions

On Mon, 25 Feb 2019 21:03:11 +0100 David Hildenbrand wrote: > Before we start with the real magic, some more cleanups and refactorings. > This series does not depend on other patches not yet in master. > > Also add a variant of "LOAD LENGTHENED" that is used along with > vector instructions in l

Re: [Qemu-devel] [PATCH] qmp: add query-qemu-capabilities

Stefan Hajnoczi writes: > On Mon, Feb 25, 2019 at 10:28:46AM +0100, Peter Krempa wrote: >> On Mon, Feb 25, 2019 at 09:50:26 +0100, Markus Armbruster wrote: >> > Stefan Hajnoczi writes: >> > >> > > QMP clients can usually detect the presence of features via schema >> > > introspection. There ar

Re: [Qemu-devel] [PATCH v3 0/3] softmmu demacro

Mark Cave-Ayland writes: > On 19/02/2019 18:25, Emilio G. Cota wrote: > >> On Tue, Feb 19, 2019 at 14:22:37 +, Alex Bennée wrote: >>> Emilio, >>> >>> Any chance you could run it through your benchmark suite? >> >> Something isn't quite right. For instance, gcc in SPEC doesn't >> complete; i

Re: [Qemu-devel] mirror questions

Am 26.02.2019 um 09:48 hat Vladimir Sementsov-Ogievskiy geschrieben: > Hi! > > A question about s->cow_bitmap, introduced in far b812f6719c > "mirror: perform COW if the cluster size is bigger than the granularity" > > cow_bitmap is just a bitmap which tracks, what clusters of target are >

Re: [Qemu-devel] [PATCH 5/5] decodetree: Allow grouping of overlapping patterns

On 2/24/19 12:29 AM, Richard Henderson wrote: Signed-off-by: Richard Henderson --- docs/decodetree.rst | 58 + scripts/decodetree.py | 144 ++ 2 files changed, 191 insertions(+), 11 deletions(-) diff --git a/docs/decodetree.rst b/

Re: [Qemu-devel] [RFC PATCH 6/6] pc: Support firmware configuration with -blockdev

Hi Markus, On 02/25/19 19:37, Markus Armbruster wrote: > The PC machines put firmware in ROM by default. To get it put into > flash memory (required by OVMF), you have to use -drive > if=pflash,unit=0,... and optionally -drive if=pflash,unit=1,... > > Why two -drive? This permits setting up one

[Qemu-devel] [Bug 1520730] Re: 32-bit editors vim/rhide broken keyboard handling in freedos 1.1 and ms-dos 6.22

Can you still reproduce this issue with the latest version of QEMU? Are you using a SDL or GTK build for the graphical interface? ** Changed in: qemu Status: New => Incomplete -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. ht

Re: [Qemu-devel] Build error with git commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116 on x86_64

В сообщении от Tuesday 26 February 2019 12:05:02 Thomas Huth написал(а): > On 26/02/2019 09.58, Andrew Randrianasulu wrote: > > В сообщении от Tuesday 26 February 2019 11:54:12 вы написали: > >> On 25/02/2019 18.29, Andrew Randrianasulu wrote: > >>> В сообщении от Monday 25 February 2019 19:19:01 P

Re: [Qemu-devel] Build error with git commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116 on x86_64

On 26/02/2019 10.46, Andrew Randrianasulu wrote: [...] > also, -g 1186x864x32 resulted in funnuy diagonal corruption even at firmware > screen level, and probably same happening with x86-64/kvm guest if I select > some less comon, but exposed via xrandr mode. (this bit for -vga std, default) 118

Re: [Qemu-devel] [Qemu-block] [PATCH v2] iotests: handle TypeError for Python3 in test 242

On 26/02/2019 04:42, Nir Soffer wrote: > On Mon, Feb 25, 2019 at 10:36 PM Eduardo Habkost > wrote: > > On Fri, Feb 22, 2019 at 02:26:13PM +0300, Andrey Shinkevich wrote: > > The data type for bytes in Python3 differs from the one in Python2. > > Those c

Re: [Qemu-devel] [Qemu-block] [PATCH v2] iotests: handle TypeError for Python3 in test 242

On Tue, Feb 26, 2019 at 03:42:11AM +0200, Nir Soffer wrote: > On Mon, Feb 25, 2019 at 10:36 PM Eduardo Habkost [...] > > -c = f.read(1) > > -toggled = chr(ord(c) ^ bitmap_flag_unknown) > > +# The casts to bytearray() below are only necessary > > +# for Python 2 comp

Re: [Qemu-devel] [PATCH 1/3] Migration/colo.c: Fix double close bug when occur COLO failover

* Zhang Chen (chen.zh...@intel.com) wrote: > From: Zhang Chen > > In migration_incoming_state_destroy(void) will check the mis->to_src_file > to double close the mis->to_src_file when occur COLO failover. > > Signed-off-by: Zhang Chen Reviewed-by: Dr. David Alan Gilbert > --- > migration/co

Re: [Qemu-devel] [regression] Clock jump on VM migration

On Tue, Feb 12, 2019 at 10:56:58AM +0800, Stefan Hajnoczi wrote: > I'll return to this issue on Monday. I have played around with posix_fadvise(POSIX_FADV_DONTNEED) and measured 100+ millisecond latencies. This is not a great primitive to rely on during migration downtime since it can be slow. O

Re: [Qemu-devel] Build error with git commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116 on x86_64

В сообщении от Tuesday 26 February 2019 12:58:11 вы написали: > On 26/02/2019 10.46, Andrew Randrianasulu wrote: > [...] > > > also, -g 1186x864x32 resulted in funnuy diagonal corruption even at > > firmware screen level, and probably same happening with x86-64/kvm guest > > if I select some less c

Re: [Qemu-devel] [PATCH 2/3] Migration/colo.c: Fix COLO failover status error

* Zhang Chen (chen.zh...@intel.com) wrote: > From: Zhang Chen > > When finished COLO failover, the status is FAILOVER_STATUS_COMPLETED. > The origin codes misunderstand the FAILOVER_STATUS_REQUIRE. > > Signed-off-by: Zhang Chen Why do these 'case's have to only deal with COMPLETED - what stops

Re: [Qemu-devel] [PATCH 3/3] Migration/colo.c: Make COLO node running after failover

* Zhang Chen (chen.zh...@intel.com) wrote: > From: Zhang Chen > > Delay to close COLO for auto start VM after failover. > > Signed-off-by: Zhang Chen Yes, I guess the state sent over the global state is probably RUN_STATE_COLO so it doesn't autostart on new machine types, and this looks like i

Re: [Qemu-devel] Build error with git commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116 on x86_64

On Tue, 26 Feb 2019 at 09:06, Thomas Huth wrote: > Ok, then that's the problem here: GCC often produces some additional > "may be unused" warnings with -O3, and we normally only guarantee that > QEMU compiles without warnings when using the standard -O2 optimization > level. > So if you want to co

Re: [Qemu-devel] [PATCH 2/3] Migration/colo.c: Fix COLO failover status error

-Original Message- From: Dr. David Alan Gilbert [mailto:dgilb...@redhat.com] Sent: Tuesday, February 26, 2019 6:55 PM To: Zhang, Chen Cc: Li Zhijian ; Zhang Chen ; Juan Quintela ; zhanghailiang ; qemu-dev Subject: Re: [PATCH 2/3] Migration/colo.c: Fix COLO failover status error * Zh

[Qemu-devel] [PATCH] Added periodic IRQ support for bcm2836_control local timer

Dear qemu developers, Honestly SubmitAPatch is a bit complicated for me, so I'm hoping I've done everything right. To be sure, you can find my patch here: https://github.com/bztsrc/qemu-local-timer and diff against the latest github repo here: https://github.com/bztsrc/qemu-local-timer/blob/patche

[Qemu-devel] [PATCH v1 00/33] s390x/tcg: Vector Instruction Support Part 1

This is the first part of vector instruction support for s390x. Parts will be sent and reviewed piece by piece. Part 1: Vector Support Instructions Part 2: Vector Integer Instructions Part 3: Vector String Instructions Part 4: Vector Floating-Point Instructions The current state can be found at (

[Qemu-devel] [PATCH v1 10/33] s390x/tcg: Implement VECTOR LOAD ELEMENT

Fairly easy, load with desired size and store it into the right element. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 5 + target/s390x/translate_vx.inc.c | 18 ++ 2 files changed, 23 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s

[Qemu-devel] [PATCH v1 12/33] s390x/tcg: Implement VECTOR LOAD GR FROM VR ELEMENT

To avoid an helper, we have to do the actual calculation of the element address (offset in cpu_env + cpu_env) manually. Factor that out into get_vec_element_ptr_i64(). The same logic will be reused for "VECTOR LOAD VR ELEMENT FROM GR". Signed-off-by: David Hildenbrand --- target/s390x/insn-data.

[Qemu-devel] [PATCH v1 01/33] s390x/tcg: Define vector instruction formats

These are the new instruction formats related to vector instructions as up to the z14 (a.k.a. latest PoP). As v2 appeares (like x2 in VRX) with d2/b2 in VRV, we have to assign it a higher field number to avoid collisions. Properly take care of the MSB (to be able to address 32 registers) for each

[Qemu-devel] [PATCH v1 06/33] s390x/tcg: Implement VECTOR GENERATE BYTE MASK

As we are working on byte elements, we can use i32 for element access. Add write_vec_element_i32(). Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 39 + 2 files changed, 41 insertions(+) diff --git

[Qemu-devel] [PATCH v1 09/33] s390x/tcg: Implement VECTOR LOAD AND REPLICATE

We can use tcg_gen_gvec_dup_i64() to carry out the duplication. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 17 + 2 files changed, 19 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-dat

[Qemu-devel] [PATCH v1 13/33] s390x/tcg: Implement VECTOR LOAD LOGICAL ELEMENT AND ZERO

Fairly easy, zero out the vector before we load the desired element. Use a temporary vector so we don't modify the target vector on exceptions. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 43 + 2

[Qemu-devel] [PATCH v1 07/33] s390x/tcg: Implement VECTOR GENERATE MASK

This is the first instruction that uses gvec expansion for duplicating elements. We will use makros for most gvec calls to simplify translating vector numbers into offsets (and to not have to worry about oprsz and maxsz). Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2

[Qemu-devel] [PATCH v1 11/33] s390x/tcg: Implement VECTOR LOAD ELEMENT IMMEDIATE

Take care of properly sign-extending the immediate. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 5 + target/s390x/translate_vx.inc.c | 17 + 2 files changed, 22 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def ind

[Qemu-devel] [PATCH v1 16/33] s390x/tcg: Implement VECTOR LOAD VR ELEMENT FROM GR

Very similar to VECTOR LOAD GR FROM VR ELEMENT, just the opposite direction. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 33 + 2 files changed, 35 insertions(+) diff --git a/target/s390x/insn-dat

[Qemu-devel] [PATCH v1 03/33] s390x: Add one temporary vector register in CPU state for TCG

We sometimes want to work on a temporary vector register instead of the actual destination, because source and destination might overlap. An alternative would be loading the vector into two i64 variables, but than separate handling for accessing the vector elements would be needed. This is easier.

[Qemu-devel] [PATCH v1 02/33] s390x/tcg: Check vector register instructions at central point

Check them at a central point. We'll use a new instruction flag to flag all vector instructions (IF_VEC) and handle it very similar to AFP, whereby we use another unused position in the PSW mask to store the state of vector register enablement per translation block. Signed-off-by: David Hildenbran

[Qemu-devel] [PATCH v1 04/33] s390x/tcg: Utilities for vector instruction helpers

We'll have to read/write vector elements quite frequently from helpers. The tricky bit is properly taking care of endianess. Handle it similar to aarch64. target/s390x/vec_helper.c will later also contain vector support instruction helpers. Signed-off-by: David Hildenbrand --- target/s390x/Make

[Qemu-devel] [PATCH v1 20/33] s390x/tcg: Implement VECTOR PACK

We cannot use gvex expansion as the element size of source and destination differs. So expand manually. Luckily, VECTOR PACK does not care about saturation or setting the CC, so it can be implemented without a helper. We have to watch out for overlapping source and destination registers and use a t

[Qemu-devel] [PATCH v1 08/33] s390x/tcg: Implement VECTOR LOAD

When loading from memory, load to our temporary vector first, so in case we get an access exception on the second 64 bit element, the vector won't get modified. Loading with strange alingment from the end of the address space will not properly wrap, we can ignore that for now. Signed-off-by: Davi

[Qemu-devel] [PATCH v1 17/33] s390x/tcg: Implement VECTOR LOAD VR FROM GRS DISJOINT

Fairly easy, just load from to gprs into a single vector. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 7 +++ 2 files changed, 9 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 8b6957b

[Qemu-devel] [PATCH v1 14/33] s390x/tcg: Implement VECTOR LOAD MULTIPLE

Also fairly easy to implement. One issue we have is that exceptions will result in some vectors already being modified. At least handle it consistently per vector by using a temporary vector. Good enough for now, add a FIXME. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def |

[Qemu-devel] [PATCH v1 19/33] s390x/tcg: Implement VECTOR MERGE (HIGH|LOW)

We cannot use gvec expansion as source and destination elements are have different element numbers. So we'll expand using a fancy loop. Also, we have to take care of overlapping source and target registers and use a temporary register in case they do. Signed-off-by: David Hildenbrand --- target/

[Qemu-devel] [PATCH v1 22/33] s390x/tcg: Implement VECTOR PERMUTE

Take care of overlying inputs and outputs by using a temporary vector. Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 1 + target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 12 target/s390x/vec_helper.c | 20 +++

[Qemu-devel] [PATCH v1 05/33] s390x/tcg: Implement VECTOR GATHER ELEMENT

Let's start with a more involved one, but it is the first in the list of vector support instructions (introduced with the vector facility). Good thing is, we need a lot of basic infrastructure for this. Reading and writing vector elements, checking element validity as well as loading vector elemen

[Qemu-devel] [PATCH v1 15/33] s390x/tcg: Implement VECTOR LOAD TO BLOCK BOUNDARY

Very similar to LOAD COUNT TO BLOCK BOUNDARY, but instead of only calculating, the actual vector is loaded. Use a temporary vector to not modify the real vector on exceptions. Initialize that one to zero, to not leak any data. As we don't have gvec ool handlers for single vectors, just calculate t

[Qemu-devel] [PATCH v1 21/33] s390x/tcg: Implement VECTOR PACK (LOGICAL) SATURATE

We'll implement both via gvec ool helpers. As these can't return values, we'll return the CC via env->cc_op. Generate different C functions for the different cases using makros. In the future we might want to do a translation like VECTOR PACK or use separate handlers in case no CC update is needed

[Qemu-devel] [PATCH v1 18/33] s390x/tcg: Implement VECTOR LOAD WITH LENGTH

We can reuse the helper introduced along with VECTOR LOAD TO BLOCK BOUNDARY. We just have to take care of converting the highest index into a length. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate.c| 7 +++ target/s390x/translate

[Qemu-devel] [PATCH v1 24/33] s390x/tcg: Implement VECTOR REPLICATE

Load the element and replicate it using gvec_dup. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 18 ++ 2 files changed, 20 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index e

[Qemu-devel] [PATCH v1 28/33] s390x/tcg: Implement VECTOR SIGN EXTEND TO DOUBLEWORD

Load both elements signed and store them into the two 64 bit elements. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 33 + 2 files changed, 35 insertions(+) diff --git a/target/s390x/insn-data.def

[Qemu-devel] [PATCH v1 23/33] s390x/tcg: Implement VECTOR PERMUTE DOUBLEWORD IMMEDIATE

Read the whole input before modifying the destination vector. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 16 2 files changed, 18 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.d

[Qemu-devel] [PATCH v1 26/33] s390x/tcg: Implement VECTOR SCATTER ELEMENT

Similar to VECTOR GATHER ELEMENT, but the other direction. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 3 +++ target/s390x/translate_vx.inc.c | 22 ++ 2 files changed, 25 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-da

[Qemu-devel] [PATCH v1 33/33] s390x/tcg: Implement VECTOR UNPACK *

Combine all variant in a single handler. As source and destination have different element sizes, we can't use gvec expansion. Expand manually. Also watch out for overlapping source and destination and use a temporary register in that case. Signed-off-by: David Hildenbrand --- target/s390x/insn-d

[Qemu-devel] [PATCH v1 30/33] s390x/tcg: Implement VECTOR STORE ELEMENT

As we only store one element, there is nothing to consider regarding exceptions. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 5 + target/s390x/translate_vx.inc.c | 18 ++ 2 files changed, 23 insertions(+) diff --git a/target/s390x/insn-data.def b/

Re: [Qemu-devel] can we disable the migration-test for TCG targets ?

On Mon, 25 Feb 2019 at 14:00, Peter Maydell wrote: > > Hi; the migration-test is failing really frequently for me > for TCG targets (usually on sparc64 host) -- can we just disable > it from the test set until we've figured out and implemented a > fix for the underlying TCG bug, please? Here's a

[Qemu-devel] [PATCH v1 27/33] s390x/tcg: Implement VECTOR SELECT

Provide an implementation based on i64 and on real host vectors. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 43 + 2 files changed, 45 insertions(+) diff --git a/target/s390x/insn-data.def b/targ

[Qemu-devel] [PATCH v1 32/33] s390x/tcg: Implement VECTOR STORE WITH LENGTH

Very similar to VECTOR LOAD WITH LENGTH, just the opposite direction. Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 1 + target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 13 + target/s390x/vec_helper.c | 15 +++ 4

Re: [Qemu-devel] [PATCH 1/3] migration: Add multifd-compress parameter

* Juan Quintela (quint...@redhat.com) wrote: > Signed-off-by: Juan Quintela > --- > hmp.c| 17 + > hw/core/qdev-properties.c| 11 +++ > include/hw/qdev-properties.h | 1 + > migration/migration.c| 25 + > migrati

[Qemu-devel] [PATCH v1 29/33] s390x/tcg: Implement VECTOR STORE

Add a FIXME regarding exceptions during the second store. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 22 ++ 2 files changed, 24 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data

[Qemu-devel] [PATCH v1 31/33] s390x/tcg: Implement VECTOR STORE MULTIPLE

Similar to VECTOR LOAD MULTIPLE, just the opposite direction. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 25 + 2 files changed, 27 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/in

[Qemu-devel] [PATCH v1 25/33] s390x/tcg: Implement VECTOR REPLICATE IMMEDIATE

Like VECTOR REPLICATE, but the element to be replicated comes from an immediate. Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 18 ++ 2 files changed, 20 insertions(+) diff --git a/target/s390x/insn-data.def b/tar

Re: [Qemu-devel] mirror questions

26.02.2019 12:28, Kevin Wolf wrote: > Am 26.02.2019 um 09:48 hat Vladimir Sementsov-Ogievskiy geschrieben: >> Hi! >> >> A question about s->cow_bitmap, introduced in far b812f6719c >> "mirror: perform COW if the cluster size is bigger than the >> granularity" >> >> cow_bitmap is just a bitma

Re: [Qemu-devel] can we disable the migration-test for TCG targets ?

* Peter Maydell (peter.mayd...@linaro.org) wrote: > On Mon, 25 Feb 2019 at 14:00, Peter Maydell wrote: > > > > Hi; the migration-test is failing really frequently for me > > for TCG targets (usually on sparc64 host) -- can we just disable > > it from the test set until we've figured out and implem

Re: [Qemu-devel] Build error with git commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116 on x86_64

On 26/02/2019 12.05, Peter Maydell wrote: > On Tue, 26 Feb 2019 at 09:06, Thomas Huth wrote: >> Ok, then that's the problem here: GCC often produces some additional >> "may be unused" warnings with -O3, and we normally only guarantee that >> QEMU compiles without warnings when using the standard -

[Qemu-devel] [PATCH v2 3/6] target/mips: Add emulation of MMI instruction PCPYLD

Add emulation of MMI instruction PCPYLD. The emulation is implemented using TCG front end operations directly to achieve better performance. Signed-off-by: Mateja Marjanovic Reviewed-by: Aleksandar Rikalo --- target/mips/translate.c | 43 ++- 1 file chang

[Qemu-devel] [PATCH v2 0/6] target/mips: Add emulation of data communication MMI instructions

From: Mateja Marjanovic This series adds emulation of PCPYH, PCPYLD, and PCPYUD MMI instructions. v2: - The patch for PCPYH is split into two patches - Cleaned up handler for PCPYH - Fixed bugs and cleaned up in handler for PCPYLD - Fixed bugs and cleaned up in handler for PCPYUD - A

[Qemu-devel] [PATCH v2 1/6] target/mips: Preparing for adding MMI instructions

From: Mateja Marjanovic Set up MMI code to be compiled only for TARGET_MIPS64. This is needed so that GPRs are 64 bit, and combined with MMI registers, they will form full 128 bit registers. Signed-off-by: Mateja Marjanovic Reviewed-by: Aleksandar Rikalo --- target/mips/translate.c | 43 +

[Qemu-devel] [PATCH v2 2/6] target/mips: Add emulation of MMI instruction PCPYH

From: Mateja Marjanovic Add emulation of MMI instruction PCPYH. The emulation is implemented using TCG front end operations directly to achieve better performance. Signed-off-by: Mateja Marjanovic Reviewed-by: Aleksandar Rikalo --- target/mips/translate.c | 66

[Qemu-devel] [PATCH v2 4/6] target/mips: Add emulation of MMI instruction PCPYUD

From: Mateja Marjanovic Add emulation of MMI instruction PCPYUD. The emulation is implemented using TCG front end operations directly to achieve better performance. Signed-off-by: Mateja Marjanovic Reviewed-by: Aleksandar Rikalo --- target/mips/translate.c | 43 +++

[Qemu-devel] [PATCH v2 5/6] target/mips: Add emulation of MMI instruction PEXCH

From: Mateja Marjanovic Add emulation of MMI instruction PEXCH. The emulation is implemented using TCG front end operations directly to achieve better performance. Signed-off-by: Mateja Marjanovic --- target/mips/translate.c | 97 - 1 file change

[Qemu-devel] [PATCH v2 6/6] target/mips: Add emulation of MMI instruction PEXCW

From: Mateja Marjanovic Add emulation of MMI instruction PEXCW. The emulation is implemented using TCG front end operations directly to achieve better performance. Signed-off-by: Mateja Marjanovic --- target/mips/translate.c | 73 - 1 file change

Re: [Qemu-devel] [PATCH] Added periodic IRQ support for bcm2836_control local timer

On Tue, 26 Feb 2019 at 11:38, bzt wrote: > > Dear qemu developers, > > Honestly SubmitAPatch is a bit complicated for me, so I'm hoping I've > done everything right. To be sure, you can find my patch here: > https://github.com/bztsrc/qemu-local-timer and diff against the latest > github repo here:

Re: [Qemu-devel] [RFC PATCH 1/6] qdev: Fix latent bug with compat_props and onboard devices

Hi On Mon, Feb 25, 2019 at 7:38 PM Markus Armbruster wrote: > > Compatibility properties started life as a qdev property thing: we > supported them only for qdev properties, and implemented them with the > machinery backing command line option -global. > > Recent commit fa0cb34d221 put them to us

Re: [Qemu-devel] can we disable the migration-test for TCG targets ?

On Tue, 26 Feb 2019 at 12:17, Dr. David Alan Gilbert wrote: > > * Peter Maydell (peter.mayd...@linaro.org) wrote: > > Backtrace of process 125450: > > Thread 6 (Thread 0xfff800012de0b900 (LWP 127434)): > > #0 0xfff80001034c5cdc in futex_abstimed_wait_cancelable (private=0, > > abstime=0xfff800012

Re: [Qemu-devel] [RFC PATCH 6/6] pc: Support firmware configuration with -blockdev

Laszlo Ersek writes: > Hi Markus, > > On 02/25/19 19:37, Markus Armbruster wrote: >> The PC machines put firmware in ROM by default. To get it put into >> flash memory (required by OVMF), you have to use -drive >> if=pflash,unit=0,... and optionally -drive if=pflash,unit=1,... >> >> Why two -dr

[Qemu-devel] [Bug 1556044] Re: Redox GUI hangs with 100% CPU on ARM

Which QEMU version have you been using here? Can you still reproduce the problem with the latest upstream version of QEMU? ** Changed in: qemu Status: New => Incomplete -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://b

Re: [Qemu-devel] [RFC PATCH 2/6] qom: Move compat_props machinery from qdev to QOM

Hi On Mon, Feb 25, 2019 at 7:46 PM Markus Armbruster wrote: > > See the previous commit for rationale. > > Signed-off-by: Markus Armbruster Reviewed-by: Marc-André Lureau > --- > hw/core/qdev.c | 39 --- > include/hw/qdev-core.h | 4 > includ

Re: [Qemu-devel] [RFC PATCH 3/6] vl: Fix latent bug with -global and onboard devices

On Mon, Feb 25, 2019 at 7:41 PM Markus Armbruster wrote: > > main() registers the user's -global only after we create the machine > object, i.e. too late for devices created in the machine's > .instance_init(). > > Fortunately, we know the bug is only latent: the commit before > previous fixed a b

Re: [Qemu-devel] [RFC PATCH 4/6] sysbus: Fix latent bug with onboard devices

Hi On Mon, Feb 25, 2019 at 7:40 PM Markus Armbruster wrote: > > The first call of sysbus_get_default() creates the main system bus and > stores it in QOM as "/machine/unattached/sysbus". This must not > happen before main() creates "/machine", or else container_get() would > "helpfully" create i

[Qemu-devel] [PATCH v4 3/9] qemu-doc: Move section on MIPS' mipssim pseudo board

From: Aleksandar Markovic Move section on MIPS' mipssim pseudo board to the more appropriate place. Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Rikalo --- qemu-doc.texi | 26 +- 1 file changed, 13 insertions(+), 13 de

[Qemu-devel] [PATCH v4 6/9] tests/tcg: target/mips: Add wrappers for MSA integer max/min instructions

From: Aleksandar Markovic Add wrappers for MSA integer max/min instructions. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo --- tests/tcg/mips/include/wrappers_msa.h | 30 ++ 1 file changed, 30 insertions(+) diff --git a/tests/tcg/mips/include/w

[Qemu-devel] [PATCH v4 8/9] disas: nanoMIPS: Correct comments to handlers of some DSP instructions

From: Aleksandar Markovic Correct comments to handlers of some DSP instructions. Signed-off-by: Aleksandar Markovic --- disas/nanomips.cpp | 285 - 1 file changed, 150 insertions(+), 135 deletions(-) diff --git a/disas/nanomips.cpp b/disas/n

[Qemu-devel] [PATCH v4 4/9] qemu-doc: Add section on MIPS' Fulong 2E board

From: Aleksandar Markovic Add section on MIPS' Fulong 2E board in QEMU user documentation. Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Rikalo --- qemu-doc.texi | 13 + 1 file changed, 13 insertions(+) diff --git a/qemu-doc.texi

[Qemu-devel] [PATCH v4 5/9] qemu-doc: Add section on MIPS' Boston board

From: Aleksandar Markovic Add section on MIPS' Boston board in QEMU user documentation. Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Rikalo --- qemu-doc.texi | 9 + 1 file changed, 9 insertions(+) diff --git a/qemu-doc.texi b/qemu-do

[Qemu-devel] [PATCH v4 2/9] disas: nanoMIPS: Fix a function misnomer

From: Aleksandar Markovic Rename function extract_ac_13_12() to extract_ac_15_14(). Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo --- disas/nanomips.cpp | 96 +++--- disas/nanomips.h | 2 +- 2 files changed, 49 insertions(

[Qemu-devel] [PATCH v4 9/9] target/mips: Add support for DSPRAM

From: Yongbok Kim The optional Data Scratch Pad RAM (DSPRAM) block provides a general scratch pad RAM used for temporary storage of data. The DSPRAM provides a connection to on-chip memory or memory-mapped registers, which are accessed in parallel with the L1 data cache to minimize access laten

[Qemu-devel] [PATCH v4 0/9] Misc target/mips fixes and improvements

From: Aleksandar Markovic A collection of misc target/mips fixes and improvements for February 2019. v3->v4: - added a patch on DSPRAM support - order of patches slightly changed - minor changes in commit messages - rebased to the latest code v2->v3: - added a patches on documenting

Re: [Qemu-devel] [PATCH v7 00/17] ARM virt: Initial RAM expansion and PCDIMM/NVDIMM support

Hi Igor, On 2/26/19 9:40 AM, Auger Eric wrote: > Hi Igor, > > On 2/25/19 10:42 AM, Igor Mammedov wrote: >> On Fri, 22 Feb 2019 18:35:26 +0100 >> Auger Eric wrote: >> >>> Hi Igor, >>> >>> On 2/22/19 5:27 PM, Igor Mammedov wrote: On Wed, 20 Feb 2019 23:39:46 +0100 Eric Auger wrote:

[Qemu-devel] [PATCH 2/3] hmp: add compress-type parameter to migration parameters

Signed-off-by: Denis Plotnikov --- hmp.c | 8 1 file changed, 8 insertions(+) diff --git a/hmp.c b/hmp.c index b2a2b1f84e..5f105b816f 100644 --- a/hmp.c +++ b/hmp.c @@ -334,6 +334,10 @@ void hmp_info_migrate_parameters(Monitor *mon, const QDict *qdict) params = qmp_query_migrate_p

[Qemu-devel] [PATCH 3/3] migration: add zstd compression

zstd allows to migrate with less cpu consumption maintaining the the same level of data compression as qzip (zlib). Compression level for zstd is set with migration parameter "compress-level" in the range 1 - 22. 1 - the best speed, 22 - the best compression. Levels in the range of 20-22 should b

Re: [Qemu-devel] can we disable the migration-test for TCG targets ?

On Tue, 26 Feb 2019 at 12:30, Peter Maydell wrote: > > On Tue, 26 Feb 2019 at 12:17, Dr. David Alan Gilbert > wrote: > > > > * Peter Maydell (peter.mayd...@linaro.org) wrote: > > > Backtrace of process 125450: > > > Thread 6 (Thread 0xfff800012de0b900 (LWP 127434)): > > > #0 0xfff80001034c5cdc i

[Qemu-devel] [PATCH 1/3] migration: rework compression code for adding more data compressors

Also, the patch adds new migration parameter parameter: compress-type to be able choose between data compressors available. By the moment, the only available data compressor is gzip (zlib) Signed-off-by: Denis Plotnikov --- migration/migration.c | 42 - migration/migration.h | 1 + m

[Qemu-devel] [PATCH 0/3] migration: add sztd compression

zstd date compression algorithm shows better performance on data compression. It might be useful to employ the algorithm in VM migration to reduce CPU usage. A user will be able to choose between those algorithms, therefor compress-type migration parameter is added. Here are some results of perfor

Re: [Qemu-devel] [PATCH] qcow2: avoid lseek on block_status if possible

ping 06.02.2019 15:30, Vladimir Sementsov-Ogievskiy wrote: > ping. > > Finally, what about this? > > 25.01.2019 17:21, Vladimir Sementsov-Ogievskiy wrote: >> drv_co_block_status digs bs->file for additional, more accurate search >> for hole inside region, reported as DATA by bs since 5daa74a6ebc

Re: [Qemu-devel] [Qemu-block] Guest unresponsive after Virtqueue size exceeded error

On 23/02/19 12:49, Natanael Copa wrote: > I suspect this happens due to the Alpine toolchain will enable > _FORTIFY_SOURCE=2 by default and the way this is implemented via > fortify-headers: > http://git.2f30.org/fortify-headers/file/include/string.h.html#l39 The call to __orig_memcpy is the culp

Re: [Qemu-devel] [PATCH 17/51] i386: express dependencies with Kconfig

On 25/02/19 09:44, Stefano Garzarella wrote: >> config I440FX >> bool >> +select PC_PCI >> +select PC_ACPI >> +select ACPI_SMBUS >> +select PCI_PIIX >> +select FDC > Should we move "select FDC" under "config PC"? > > I'm not able to build the Q35 machine without enable FD

Re: [Qemu-devel] [PATCH 2/2] block-stream: include base into job node list

On Mon 25 Feb 2019 05:39:14 PM CET, Vladimir Sementsov-Ogievskiy wrote: >> --- a/block/stream.c >> +++ b/block/stream.c >> @@ -259,6 +259,15 @@ void stream_start(const char *job_id, BlockDriverState >> *bs, >> &error_abort); >> } >> >> +if (base) { >> +

Re: [Qemu-devel] [PATCH 17/51] i386: express dependencies with Kconfig

Paolo Bonzini writes: > On 25/02/19 09:44, Stefano Garzarella wrote: >>> config I440FX >>> bool >>> +select PC_PCI >>> +select PC_ACPI >>> +select ACPI_SMBUS >>> +select PCI_PIIX >>> +select FDC >> Should we move "select FDC" under "config PC"? >> >> I'm not able to bui

[Qemu-devel] [PATCH v8 01/18] hw/arm/boot: introduce fdt_add_memory_node helper

From: Shameer Kolothum We introduce an helper to create a memory node. Signed-off-by: Eric Auger Signed-off-by: Shameer Kolothum Reviewed-by: Igor Mammedov --- v7 -> v8: - Added Igor's R-b v6 -> v7: - msg error in the caller - add comment about NUMA ID --- hw/arm/boot.c | 54 ++

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