Hi Stefan,
Indeed, this is really strange.
Could it be a systemd bug ? (as you use proxmox, and proxmox use systemd scope
to launch vm ?)
- Mail original -
De: "Stefan Priebe, Profihost AG"
À: "qemu-devel"
Envoyé: Dimanche 16 Septembre 2018 15:30:34
Objet: [Qemu-devel] Overcommiting c
Hi,
Am 17.09.2018 um 08:38 schrieb Jack Wang:
> Stefan Priebe - Profihost AG 于2018年9月16日周日 下午3:31写道：
>>
>> Hello,
>>
>> while overcommiting cpu I had several situations where all vms gone offline
>> while two vms saturated all cores.
>>
>> I believed all vms would stay online but would just not
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
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Hi Andrew,
Le 09/14/2018 à 06:54 PM, Andrew Baumann a écrit :
Thanks for digging into this Fred, and sorry -- it seems Andrey and I both
missed that subtlety with TryAcquireSRWLockExclusive when we first made this
change.
On the other hand, since these OSes are a decade old (mainstream supp
Am 12.09.18 um 22:08 schrieb Tony Krowiak:
> A new CPU model feature and two new CPU model facilities are
> introduced to support AP devices for a KVM guest.
>
> CPU model features:
>
> 1. The KVM_S390_VM_CPU_FEAT_AP CPU model feature indicates that
>AP facilities are installed. This feature
Am 17.09.18 um 10:19 schrieb David Hildenbrand:
> Am 12.09.18 um 22:08 schrieb Tony Krowiak:
>> A new CPU model feature and two new CPU model facilities are
>> introduced to support AP devices for a KVM guest.
>>
>> CPU model features:
>>
>> 1. The KVM_S390_VM_CPU_FEAT_AP CPU model feature indicate
EDID is a metadata format to describe monitors. On physical hardware
the monitor has an eeprom with that data block which can be read over
i2c bus.
On a linux system you can usually find the EDID data block in
/sys/class/drm/$card/$connector/edid. xorg ships a edid-decode utility
which you can u
This patch adds edid support to the qemu stdvga. It is turned off by
default and can be enabled with the new edid property. The patch also
adds xres and yres properties to specify the video mode you want the
guest use. Works only with edid enabled and updated guest driver.
The mmio bar of the s
This series adds edid support to stdvga. The biggest chunk is the
actual edid generator code (patch #1). Patch #2 adds a small helper,
patch #3 wires up support in stdvga.
Gerd Hoffmann (3):
display/edid: add edid generator to qemu.
display/edid: add region helper.
display/stdvga: add edid
Create a io region for an EDID data block.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/display/edid.h | 4
hw/display/edid-region.c | 33 +
hw/display/Makefile.objs | 1 +
3 files changed, 38 insertions(+)
create mode
This option is added together with scsi-disk but is never honoured,
becuase we don't emulate the VPD page for scsi-block. We could intercept
and inject the user specified value like for max xfer len, but it's
probably not helpful since the intent of 070f80095ad was for random
entropy aspects, not f
From: Damien Hedde
This series corresponds to the v4 of "clock framework api" patches
which were discussed in 2017, here:
https://lists.gnu.org/archive/html/qemu-devel/2017-02/msg07218.html
It is a big refactoring trying to respond to comments and to integrate the
clock gating cases I sent recen
From: Damien Hedde
Add the connection between the slcr's output clocks and the uarts inputs.
Signed-off-by: Damien Hedde
---
hw/arm/xilinx_zynq.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index f1496d2927.
From: Damien Hedde
Add bus interface and uart reference clock inputs.
Note: it is hard to find out from the doc what is the behavior when only one
of the clock is disabled and what does each clock domain reset.
Right now, register access needs both clock being active.
The bus interface control
From: Damien Hedde
This prints the clocks attached to a DeviceState when using "info qtree" monitor
command. For every clock, it displays the direction, the name and if the
clock is forwarded.
This is based on the original work of Frederic Konrad.
Signed-off-by: Damien Hedde
---
qdev-monitor.
Am 12.09.18 um 22:08 schrieb Tony Krowiak:
> From: Tony Krowiak
>
> Let's use the KVM_SET_DEVICE_ATTR ioctl to enable or disable
> hardware interpretation of AP instructions executed on the guest.
> If the S390_FEAT_AP feature is installed, AP instructions will
> be interpreted by default; otherw
From: Damien Hedde
Introduce a function and macro helpers to setup several clocks
in a device from a static array description.
An element of the array describes the clock (name and direction) as
well as the related callback and an optional offset to store the
created object pointer in the device
From: Damien Hedde
Add an optional bus interface clock to sysbus devices.
This clock can be added by the subclasses if required using the
sysbus_init_bus_interface_clock function given the target name of the
clock.
The default behavior of the clock is to enable or disable the mmios in
function o
From: Damien Hedde
Add the documentation about the clock inputs and outputs in devices.
This is based on the original work of Frederic Konrad.
Signed-off-by: Damien Hedde
---
docs/devel/clock.txt | 144 +++
1 file changed, 144 insertions(+)
create mode
From: Damien Hedde
Introduce clock port objects: ClockIn and ClockOut.
Theses ports may be used to distribute a clock from a object to several
other objects. They do not contain any state and serve only as intermediate
to carry a ClockState which contains 2 fields:
* an integer which represent t
From: Damien Hedde
Add 2 clock outputs for each uart (uart0 & 1):
+ the reference clock
+ the bus interface clock
The clock frequencies, and their respective resets, are computed using the
internal pll & uart configuration registers.
All clocks depend on the main input clock (ps_clk), which is
From: Damien Hedde
Add functions to easily add input or output clocks to a device.
The clock port objects are added as children of the device.
A function allows to connect two clocks together.
It should be called by some toplevel to make a connection between
2 (sub-)devices.
Also add a function
From: Damien Hedde
Replace the zynq_slcr registers enum and macros using the
hw/registerfields.h macros.
Signed-off-by: Damien Hedde
---
hw/misc/zynq_slcr.c | 468 ++--
1 file changed, 234 insertions(+), 234 deletions(-)
diff --git a/hw/misc/zynq_slcr.c
Am 12.09.18 um 22:08 schrieb Tony Krowiak:
> From: Tony Krowiak
>
> This patch series is the QEMU counterpart to the KVM/kernel support for
> guest dedicated crypto adapters. The KVM/kernel model is built on the
> VFIO mediated device framework and provides the infrastructure for
> granting ex
On 2018-09-17 10:31, Fam Zheng wrote:
> This option is added together with scsi-disk but is never honoured,
> becuase we don't emulate the VPD page for scsi-block. We could intercept
> and inject the user specified value like for max xfer len, but it's
> probably not helpful since the intent of 070
On Mon, 09/17 10:55, Thomas Huth wrote:
> On 2018-09-17 10:31, Fam Zheng wrote:
> > This option is added together with scsi-disk but is never honoured,
> > becuase we don't emulate the VPD page for scsi-block. We could intercept
> > and inject the user specified value like for max xfer len, but it'
Am 30.08.18 um 21:55 schrieb Richard Henderson:
> On 08/30/2018 05:27 AM, David Hildenbrand wrote:
>> Valid register pairs are 0/2, 1/3, 4/6, 5/7, 8/10, 9/11, 12/14, 13/15.
>>
>> R1/R2 always selects the lower number, so the current checks are not
>> correct as e.g. 2/4 could be selected as a pair.
I tried it again today with qemu master:
19b599f7664b2ebfd0f405fb79c14dd241557452
Unfortunately it did not work better than with qemu 2.11.2
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https://bugs.launchpad.net/bugs/1791947
Tit
* Gerd Hoffmann (kra...@redhat.com) wrote:
> > > And even if it turns out autosuspend is still an issue: I think
> > > meanwhile we can really stop worrying about guests running in old qemu
> > > versions with broken usb suspend (fixed in 0.13 !). If needed we can
> > > enable autosuspend uncondi
May be amissing piece:
vm.overcommit_memory=0
Greets,
Stefan
Am 17.09.2018 um 09:00 schrieb Stefan Priebe - Profihost AG:
> Hi,
>
> Am 17.09.2018 um 08:38 schrieb Jack Wang:
>> Stefan Priebe - Profihost AG 于2018年9月16日周日 下午3:31写道：
>>>
>>> Hello,
>>>
>>> while overcommiting cpu I had several sit
I wanted to add AFP-register control related checks for a long time.
However, doing these checks in each and every relevant handler is ugly.
As I will need similar checks for vector instructions (yes, I'm looking into
that but it might take some time), I decided to introduce per-instruction
flags,
Let's check this also at a central place.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 138 ++---
target/s390x/translate.c | 83 ++
2 files changed, 76 insertions(+), 145 deletions(-)
dif
The DXC is to be stored in the low core, and only in the FPC in case AFP
is enabled in CR0. Stub is not required in current code, but this way
we never run into problems.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/cpu.h | 1 +
target/s390x/excp_hel
Move it into TCG-only code and provide a stub. Turn it into noreturn.
As Richard noted, we currently don't log the psw.addr before restoring
the state, fix that by moving (duplicating) the qemu_log_mask in the
tcg/kvm handlers.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
With the annotated functions, we can now easily check this at a central
place.
DXC 1 is to be injected if an AFP register is used (for a HFP instruction)
when AFP is disabled.
DXC 2 is to be injected if a BFP instruction is used when AFP is
disabled.
DXC 3 is to be injected if a DFP instruction is
Storing flags for instructions allows us to efficiently verify certain
properties at a central point. Examples might later be handling if
AFP is disabled in CR0, we are not in problem state, or if vector
instructions are disabled in CR0.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenb
We exit the TB when changing the control registers, so just like PSW
bits, this should always be consistent for a TB.
Using the PSW bit semantic makes things a lot easier compared to
manually defining the spare, shifted bits.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
Valid register pairs are 0/2, 1/3, 4/6, 5/7, 8/10, 9/11, 12/14, 13/15.
R1/R2 always selects the lower number, so the current checks are not
correct as e.g. 2/4 could be selected as a pair.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/translate.c | 22 +++
We can fit this nicely into less LOC, without harming readability.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/translate.c | 34 ++
1 file changed, 6 insertions(+), 28 deletions(-)
diff --git a/target/s390x/translate.c b/targ
These flags allow us to later on detect if a DATA program interrupt
is to be injected, and which DXC (1,2,3) is to be used.
Interestingly, some support FP instructions are considered as HFP
instructions (I assume simply because they were available very early).
Reviewed-by: Richard Henderson
Sign
Stefan Priebe - Profihost AG 于2018年9月17日周一 上午9:00写道：
>
> Hi,
>
> Am 17.09.2018 um 08:38 schrieb Jack Wang:
> > Stefan Priebe - Profihost AG 于2018年9月16日周日 下午3:31写道：
> >>
> >> Hello,
> >>
> >> while overcommiting cpu I had several situations where all vms gone
> >> offline while two vms saturated
From: Bandan Das
Stale values in this field may result in qemu
expecting more data on the next operation
Signed-off-by: Bandan Das
Message-id: 20180907220851.9658-4-...@redhat.com
Signed-off-by: Gerd Hoffmann
---
hw/usb/dev-mtp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/usb/de
The following changes since commit 19b599f7664b2ebfd0f405fb79c14dd241557452:
Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-08-27-v2'
into staging (2018-08-27 16:44:20 +0100)
are available in the git repository at:
git://git.kraxel.org/qemu tags/usb-20180917-pu
From: Bandan
Return STORE_FULL if we can't write all the bytes but
return incomplete transfer if data received is less then
what was specified in the metadata. Also, use d->offset
as the file size which is valid for all file sizes.
Signed-off-by: Bandan
Message-id: 20180907220851.9658-2-...@red
Signed-off-by: Gerd Hoffmann
Message-id: 20180912114012.6034-1-kra...@redhat.com
---
hw/usb/dev-hub.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c
index 5d9743ef93..dc368179d1 100644
--- a/hw/usb/dev-hub.c
+++ b/hw/usb/dev-hub.c
@@ -191,6 +191,10 @@
Windows guests have trouble dealing with usb devices having identical
serial numbers. So, assign unique serial numbers to usb hid devices.
All other usb devices have this already.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Dr. David Alan Gilbert
Message-id: 20180914104835.26019-1-kra...@redhat.c
Signed-off-by: Gerd Hoffmann
Message-id: 20180830045324.21584-1-kra...@redhat.com
---
default-configs/usb.mak | 2 ++
hw/usb/Makefile.objs| 4 ++--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/default-configs/usb.mak b/default-configs/usb.mak
index e42cfeabbe..3ee117dbf6 100
From: Bandan
Signed-off-by: Bandan
Message-id: 20180907220851.9658-3-...@redhat.com
Signed-off-by: Gerd Hoffmann
---
qemu-doc.texi | 2 +-
scripts/device-crash-test | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 7bd449f398
Am 17.09.2018 um 11:40 schrieb Jack Wang:
> Stefan Priebe - Profihost AG 于2018年9月17日周一 上午9:00写道：
>>
>> Hi,
>>
>> Am 17.09.2018 um 08:38 schrieb Jack Wang:
>>> Stefan Priebe - Profihost AG 于2018年9月16日周日 下午3:31写道：
Hello,
while overcommiting cpu I had several situations where all
Am 30.08.18 um 10:53 schrieb Dr. David Alan Gilbert:
> * David Hildenbrand (da...@redhat.com) wrote:
>> The "at" should actually be a "before".
>> if (new_addr < address_space_start)
>> -> "can't add memory ... before... $address_space_start"
>>
>> So it looks similar to the other check
>>
Hi Peter/shannon,
when you are free, hope you can have a look at this series of patches.
Thanks a lot for your time in advance.
On 2018/9/16 1:32, Dongjiu Geng wrote:
> This patch extends the qemu-kvm state sync logic with support for
> KVM_GET/SET_VCPU_EVENTS, giving access to yet missing SEr
Am 03.09.18 um 15:40 schrieb Igor Mammedov:
> On Wed, 29 Aug 2018 17:36:08 +0200
> David Hildenbrand wrote:
>
>> Let's properly forward the error, so errors from get_region_size() /
>> get_plugged_size(), can be handled.
>>
>> Users right now call both functions after the device has been realized
Am 13.09.18 um 14:20 schrieb Igor Mammedov:
> On Wed, 29 Aug 2018 17:36:09 +0200
> David Hildenbrand wrote:
>
>> To factor out plugging and unplugging of memory device we need access to
>> the memory region. So let's replace get_region_size() by
>> get_memory_region().
>>
>> If any memory device
Am 13.09.18 um 14:14 schrieb Igor Mammedov:
> On Wed, 29 Aug 2018 17:36:12 +0200
> David Hildenbrand wrote:
>
>> Keep it simple for now and simply set the static property, that will
>> fail once realized.
> I'd merge this with previous patch and mention that set_addr will replace
> 'addr' propert
Am 14.09.18 um 16:34 schrieb Igor Mammedov:
> On Thu, 13 Sep 2018 14:20:25 +0200
> Igor Mammedov wrote:
>
>> On Wed, 29 Aug 2018 17:36:09 +0200
>> David Hildenbrand wrote:
>>
>>> To factor out plugging and unplugging of memory device we need access to
>>> the memory region. So let's replace get_
Am 17.09.2018 um 00:05 hat Max Reitz geschrieben:
> On 14.09.18 18:25, Kevin Wolf wrote:
> > Am 13.09.2018 um 22:55 hat Max Reitz geschrieben:
> >> On 13.09.18 14:52, Kevin Wolf wrote:
> >>> When starting an active commit job, other callbacks can run before
> >>> mirror_start_job() calls bdrv_ref()
Am 14.09.2018 um 19:38 hat Paolo Bonzini geschrieben:
> On 14/09/2018 19:14, Kevin Wolf wrote:
> >> As you mention, you could have a nested aio_poll() in the main thread,
> >> for example invoked from a bottom half, but in that case I'd rather
> >> track the caller that is creating the bottom half
On 9/16/18 11:33 PM, Peter Xu wrote:
> On Fri, Sep 14, 2018 at 01:26:58PM -0500, Brijesh Singh wrote:
>> Currently, the amdvi_validate_dte() assumes that a valid DTE will
>> always have V=1. This is not true. The V=1 means that bit[127:1] are
>> valid. A valid DTE can have IV=1 and V=0 (i.e pt=o
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> On 14 September 2018 at 16:19, Paolo Bonzini wrote:
> > On 14/09/2018 16:00, John Snow wrote:
> >>> Maybe not. We can hardly analyze all peripheral devices code and fix all
> >>> the calls.
> >>> But I think we can improve that patch and a
> From: John Snow [mailto:js...@redhat.com]
> On 09/14/2018 03:27 AM, Pavel Dovgalyuk wrote:
> >> From: Pavel Dovgalyuk [mailto:dovga...@ispras.ru]
> >>> From: John Snow [mailto:js...@redhat.com]
> >>> On 09/12/2018 04:19 AM, Pavel Dovgalyuk wrote:
> This patch makes IDE trim BH deterministic,
On 17/09/2018 13:48, Kevin Wolf wrote:
> Am 14.09.2018 um 19:38 hat Paolo Bonzini geschrieben:
>> On 14/09/2018 19:14, Kevin Wolf wrote:
As you mention, you could have a nested aio_poll() in the main thread,
for example invoked from a bottom half, but in that case I'd rather
track th
Am 17.09.2018 um 14:38 hat Paolo Bonzini geschrieben:
> On 17/09/2018 13:48, Kevin Wolf wrote:
> > Am 14.09.2018 um 19:38 hat Paolo Bonzini geschrieben:
> >> On 14/09/2018 19:14, Kevin Wolf wrote:
> As you mention, you could have a nested aio_poll() in the main thread,
> for example invok
On Fri, Sep 14, 2018 at 01:26:58PM -0500, Brijesh Singh wrote:
> Currently, the amdvi_validate_dte() assumes that a valid DTE will
> always have V=1. This is not true. The V=1 means that bit[127:1] are
> valid. A valid DTE can have IV=1 and V=0 (i.e pt=off, intremap=on).
>
> Remove the V=1 check f
On 09/17/2018 07:56 AM, Eduardo Habkost wrote:
On Fri, Sep 14, 2018 at 01:26:58PM -0500, Brijesh Singh wrote:
Currently, the amdvi_validate_dte() assumes that a valid DTE will
always have V=1. This is not true. The V=1 means that bit[127:1] are
valid. A valid DTE can have IV=1 and V=0 (i.e pt
On 17/09/2018 13:57, Pavel Dovgalyuk wrote:
>> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
>> On 14 September 2018 at 16:19, Paolo Bonzini wrote:
>>> On 14/09/2018 16:00, John Snow wrote:
> Maybe not. We can hardly analyze all peripheral devices code and fix all
> the calls.
>>>
Before, we did not clear callback like handle_output when delete
the virtqueue which may result be segmentfault.
The scene is as follows:
1. Start a vm with multiqueue vhost-net,
2. then we write VIRTIO_PCI_GUEST_FEATURES in PCI configuration to
triger multiqueue disable in this vm which will delet
Hi,
I couldn't review the whole patch yet, but I have some comments
below:
On Fri, Sep 14, 2018 at 01:26:59PM -0500, Brijesh Singh wrote:
> Register the interrupt remapping callback and read/write ops for the
> amd-iommu-ir memory region.
>
> amd-iommu-ir is set to higher priority to ensure that
On 15/09/2018 22:48, Liran Alon wrote:
>
>
>> On 14 Sep 2018, at 18:08, Paolo Bonzini wrote:
>>
>> On 14/09/2018 16:31, Liran Alon wrote:
There is still a problem, however, in that the same input stream would
be parsed differently depending on the kernel version. In particular,
i
Use bdrv_dirty_bitmap_next_dirty_area() instead of
bdrv_dirty_iter_next_area(), because of the following problems of
bdrv_dirty_iter_next_area():
1. Using HBitmap iterators we should carefully handle unaligned offset,
as first call to hbitmap_iter_next() may return a value less than
original offse
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/test-hbitmap.c | 32
1 file changed, 28 insertions(+), 4 deletions(-)
diff --git a/tests/test-hbitmap.c b/tests/test-hbitmap.c
index b04a45a2de..c0da31a6bd 100644
--- a/tests/test-hbitmap.c
+++ b/tests/test-hb
This reverts commit 269576848ec3d57d2d958cf5ac69b08c44adf816.
The functionality is unused. Drop tests.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: John Snow
---
tests/test-hbitmap.c | 36
1 file changed, 12 insertions(+), 24 deletions(-)
diff
The function alters bdrv_dirty_iter_next_area(), which is wrong and
less efficient (see further commit
"block/mirror: fix and improve do_sync_target_write" for description).
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/dirty-bitmap.h | 2 ++
include/qemu/hbitmap.h | 16 ++
This reverts commit 72d10a94213a954ad569095cb4491f2ae0853c40.
The function is unused now.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: John Snow
---
include/block/dirty-bitmap.h | 2 --
block/dirty-bitmap.c | 55
2 files changed, 57 del
Hi all.
1. bdrv_dirty_iter_next_area don't use hbitmap_next_zero and uses
inefficient loop instead. Let's improve it.
2. bdrv_dirty_iter_next_area don't handle unaligned offset and
max_offset correctly. I'm not sure that it is a real bug. But if it is,
we need these series in 3.0.
Details are in
Add bytes parameter to the function, to limit searched range.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/dirty-bitmap.h | 3 ++-
include/qemu/hbitmap.h | 10 +++---
block/backup.c | 3 ++-
block/dirty-bitmap.c | 5 +++--
nbd/server.c
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/test-hbitmap.c | 107 +++
1 file changed, 107 insertions(+)
diff --git a/tests/test-hbitmap.c b/tests/test-hbitmap.c
index c0da31a6bd..4f312e9da3 100644
--- a/tests/test-hbitmap.c
+++ b/tests/test-hbitm
pxb-pcie may only consumes a subset of 256 busses in a pci domain, but seabios
does not know it unless pxb-pcies passes it to seabios. This patch places
desired mcfg size into a hidden pci bar. The size is calculated based on
desired bus number of a pxb-pcie
Signed-off-by: Zihan Yang
---
hw/pci-
Allocate new segment for pxb-pcie host bridges in MCFG table, and reserve
corresponding MCFG space for them. This allows user-defined pxb-pcie
host bridges to be placed in different pci domain than q35 host.
The pci_host_bridges list is changed to be tail list to ensure the q35 host
is always the
pxb-pcie resides in pci domain 0 by default and users can not specify the
domain number. This patch adds 2 new property 'domain_nr' and 'max_bus'
to pxb-pcie device.
The first property allows user to choose a non-zero pci domain so that
they can hopefully add more pcie devices without being restri
This reverts commit a33fbb4f8b64226becf502a123733776ce319b24.
The functionality is unused.
Note: in addition to automatic revert, drop second parameter in
hbitmap_iter_next() call from hbitmap_next_dirty_area() too.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: John Snow
---
includ
The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default,
add a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe
Signed-off-by: Zihan Yang
---
hw/pci-bridge/pci_expander_bridge.c | 86 +++--
1 file changed, 82 insertions(+), 4 deletions(
Hi all
Here is a minimal working version of supporting multiple pci domains.
The next a few paragraphs will illustrate the purpose and use example.
Current issue and limitations will be in last 2 paragraphs, followed
by the changelog of each verison.
Currently only q35 host bridge is allocated an
Describe new pci segments of host bridges in AML as new pci devices,
with _SEG and _BBN to let them be in DSDT.
Signed-off-by: Zihan Yang
---
hw/i386/acpi-build.c | 53 +---
1 file changed, 30 insertions(+), 23 deletions(-)
diff --git a/hw/i386/ac
On 09/17/2018 12:52 AM, Peter Xu wrote:
On Fri, Sep 14, 2018 at 01:27:00PM -0500, Brijesh Singh wrote:
Emulate the interrupt remapping support when guest virtual APIC is
not enabled.
For more info Refer: AMD IOMMU spec Rev 3.0 - section 2.2.5.1
When VAPIC is not enabled, it uses interrupt r
This allows SeaBIOS to configure MCFG base during initialization.
The mcfg size is calculated using based on desired bus number
Signed-off-by: Zihan Yang
---
hw/pci-bridge/pci_expander_bridge.c | 37 +
include/hw/pci-bridge/pci_expander_bridge.h | 7 ++
2
ping
31.07.2018 20:30, Vladimir Sementsov-Ogievskiy wrote:
Hi all.
Here is NBD reconnect. Previously, if connection failed all current
and future requests will fail. After the series, nbd-client driver
will try to reconnect unlimited times. During first @reconnect-delay
seconds of reconnecting
ping. Finally, what about this?
07.08.2018 20:43, Vladimir Sementsov-Ogievskiy wrote:
Hi all!
Here is an asynchronous scheme for handling fragmented qcow2
reads and writes. Both qcow2 read and write functions loops through
sequential portions of data. The series aim it to parallelize these
loop
Hmm, ping, anybody here ?)
02.08.2018 22:10, John Snow wrote:
On 08/02/2018 03:05 PM, Denis V. Lunev wrote:
On 08/02/2018 12:50 PM, Dr. David Alan Gilbert wrote:
* Denis V. Lunev (d...@openvz.org) wrote:
I don't quite understand the last two paragraphs.
we are thinking right now to elimin
On 17/09/2018 14:53, Kevin Wolf wrote:
>>> I think I can drop the ref/unref pair, but not the whole patch (whose
>>> main point is reordering dec_in_flight vs. the AIO callback).
>>
>> You're right, though I think I did that on purpose back in the day.
>> IIRC it was related to bdrv_drain, which mi
On 17/09/2018 10:31, Fam Zheng wrote:
> This option is added together with scsi-disk but is never honoured,
> becuase we don't emulate the VPD page for scsi-block. We could intercept
> and inject the user specified value like for max xfer len, but it's
> probably not helpful since the intent of 070
On 09/17/2018 08:49 AM, Eduardo Habkost wrote:
Hi,
I couldn't review the whole patch yet, but I have some comments
below:
On Fri, Sep 14, 2018 at 01:26:59PM -0500, Brijesh Singh wrote:
Register the interrupt remapping callback and read/write ops for the
amd-iommu-ir memory region.
amd-iomm
05.07.2018 19:18, Vladimir Sementsov-Ogievskiy wrote:
05.07.2018 18:59, Eric Blake wrote:
On 07/04/2018 06:23 AM, Vladimir Sementsov-Ogievskiy wrote:
This is necessary for efficient block-status export, for clients which
support it.
qemu as client doesn't currently process additional informat
On 17/09/2018 07:32, Mark Cave-Ayland wrote:
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/scsi/lsi53c895a.c | 214
> +--
> hw/scsi/trace-events | 62 +++
> 2 files changed, 165 insertions(+), 111 deletions(-)
>
> diff --git a/hw/scsi/
From: Paolo Bonzini
It will be changed to an atomic operation soon.
Cc: Cornelia Huck
Cc: Richard Henderson
Cc: Alexander Graf
Cc: David Hildenbrand
Cc: qemu-s3...@nongnu.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/s390x/excp_helper.c | 2 +-
1 file changed,
From: Paolo Bonzini
Cc: Richard Henderson
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/alpha/cpu.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index b08078e7fc..76001e66f1 100644
--- a/target/alph
From: Paolo Bonzini
It will be changed to an atomic operation soon.
Cc: Stafford Horne
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/openrisc/sys_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/openrisc/sys_helper.c b/target/openris
From: Paolo Bonzini
Cc: Aurelien Jarno
Cc: Aleksandar Markovic
Cc: James Hogan
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/mips/cpu.c | 7 ---
target/mips/kvm.c | 2 +-
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/mips/cpu.c b/target/mi
From: Paolo Bonzini
It will be changed to an atomic operation soon.
Cc: David Gibson
Cc: Alexander Graf
Cc: qemu-...@nongnu.org
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/ppc/excp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/
From: Paolo Bonzini
Cc: "Edgar E. Iglesias"
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/cris/cpu.c| 3 ++-
target/cris/helper.c | 8
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index a23aba2688..84
This series comes originally from a series of patches that Paolo
sent to me a long time ago. I have kept most of his S-o-b tags,
but I have done the forward port of the patches to the current
QEMU code base, so please blame all possible bugs on me, not him.
The goal of this series is to push the B
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