Signed-off-by: Mark Cave-Ayland
---
hw/scsi/lsi53c895a.c | 214 +--
hw/scsi/trace-events | 62 +++
2 files changed, 165 insertions(+), 111 deletions(-)
diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c
index 955ba94800..77e48ba0
On Fri, Sep 14, 2018 at 01:27:00PM -0500, Brijesh Singh wrote:
> Emulate the interrupt remapping support when guest virtual APIC is
> not enabled.
>
> For more info Refer: AMD IOMMU spec Rev 3.0 - section 2.2.5.1
>
> When VAPIC is not enabled, it uses interrupt remapping as defined in
> Table 20
So we have a boot display when using a vgpu as primary display.
Gerd Hoffmann (2):
stubs: add ramfb
hw/vfio/display: add ramfb support
hw/vfio/pci.h | 1 +
include/hw/vfio/vfio-common.h | 2 ++
hw/vfio/display.c | 12
hw/vfio/pci.c |
Needed to make sure code using ramfb (vfio) compiles properly even on
platforms without fw_cfg (and therefore no ramfb) support.
Signed-off-by: Gerd Hoffmann
---
stubs/ramfb.c | 13 +
stubs/Makefile.objs | 1 +
2 files changed, 14 insertions(+)
create mode 100644 stubs/ramfb.
So we have a boot display when using a vgpu as primary display.
ramfb depends on a fw_cfg file. fw_cfg files can not be added and
removed at runtime, therefore a ramfb-enabled vfio device can't be
hotplugged.
Add a nohotplug variant of the vfio-pci device (as child class). Add
the ramfb propert
On Fri, Sep 07, 2018 at 10:36:34AM +0400, Marc-André Lureau wrote:
> VNC server is calling sasl_server_init() during startup of QEMU, even
> if SASL auth has not been enabled.
>
> This may create undesirable warnings like "Could not find keytab file:
> /etc/qemu/krb5.tab" when the user didn't conf
Stefan Priebe - Profihost AG 于2018年9月16日周日 下午3:31写道：
>
> Hello,
>
> while overcommiting cpu I had several situations where all vms gone offline
> while two vms saturated all cores.
>
> I believed all vms would stay online but would just not be able to use all
> their cores?
>
> My original idea
Hello Michael,
On 09/12/2018 07:26 PM, Michael S. Tsirkin wrote:
> On Wed, Sep 12, 2018 at 07:12:58PM +0200, Claudio wrote:
>> Hi Michael,
>>
>> On 09/12/2018 05:31 PM, Michael S. Tsirkin wrote:
>>> On Wed, Sep 12, 2018 at 05:16:38PM +0200, Claudio wrote:
Thank you both for your responses,
>>
Hello everyone,
Recently when I reboot my guest installed kernel 4.4.114, qemu-kvm
throws the error
qemu-kvm: hw/char/serial.c:232: serial_xmit: Assertion `!(s->lsr &
0x40)' failed.
shutting down
then qemu-kvm powers off the VM, I can meet the issue after a lot of
time to reboot the VM. The issu
Hi again,
Could be there any workaround to avoid VM shutdown?
Thanks,
Brs,
Bao
On Sun, 16 Sep 2018 at 16:01, Naruto Nguyen wrote:
>
> Hello everyone,
>
> Recently when I reboot my guest installed kernel 4.4.114, qemu-kvm
> throws the error
>
> qemu-kvm: hw/char/serial.c:232: serial_xmit: Assert
While at it, also rename var to indicate it is not used only in KVM.
Reviewed-by: Nikita Leshchenko
Reviewed-by: Patrick Colp
Reviewed-by: Mihai Carabas
Signed-off-by: Liran Alon
---
target/i386/cpu.h | 4 +++-
target/i386/hvf/README.md | 2 +-
target/i386/hvf/hvf.c | 2 +-
target
Kernel commit 8fcc4b5923af ("kvm: nVMX: Introduce KVM_CAP_NESTED_STATE")
introduced new IOCTLs to extract and restore KVM internal state used to
run a VM that is in VMX operation.
Utilize these IOCTLs to add support of migration of VMs which are
running nested hypervisors.
Reviewed-by: Nikita Les
Hi,
This series aims to add support for QEMU to be able to migrate VMs that
are running nested hypervisors. In order to do so, it utilizes the new
IOCTLs introduced in KVM commit 8fcc4b5923af ("kvm: nVMX: Introduce
KVM_CAP_NESTED_STATE") which were created for this purpose.
1st patch is not reall
Hello,
while overcommiting cpu I had several situations where all vms gone offline
while two vms saturated all cores.
I believed all vms would stay online but would just not be able to use all
their cores?
My original idea was to automate live migration on high host load to move vms
to anothe
On 9/15/18 6:32 PM, Peter Maydell wrote:
> In the current scheme of doing things I'd look for whether
> we could say that some more generic thing implied SWP
> rather than setting it in a lot of initfns (eg v5-but-not-v7VE?),
> but maybe the later patches make that a bad approach
> (haven't looked
Many thanks for your review, Maciej,
> I have been more thorough on this occasion, and I do hope I have caught
> everything. See the notes below, in addition to what the others wrote.
>
> Please apply to v3 accordingly; I started writing this before you sent
> that version.
Sure, next ver
On 16 September 2018 at 16:53, Richard Henderson
wrote:
> On 9/15/18 6:32 PM, Peter Maydell wrote:
>> We want to arrange to have SWP work anyway on linux-user,
>> I think, since the kernel will typically trap-and-emulate
>> it assuming it was built with CONFIG_SWP_EMULATE. (I don't
>> know if thos
The primary purpose of this change is to support programs compiled by
GCC for the R5900 target and thereby run R5900 Linux distributions, for
example Gentoo. In particular, this avoids issues with cross compilation.
This change has been tested with Gentoo compiled for R5900, including
native compi
The R5900 implements the 64-bit MIPS III instruction set except DMULT,
DMULTU, DDIV, DDIVU, LL, SC, LLD and SCD. The MIPS IV instructions MOVN,
MOVZ and PREF are implemented. It has the R5900 specific three-operand
instructions MADD, MADDU, MULT and MULTU as well as pipeline 1 versions
MULT1, MULTU
Signed-off-by: Fredrik Noring
---
linux-user/mips/target_elf.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/linux-user/mips/target_elf.h b/linux-user/mips/target_elf.h
index fa5d30bf99..a98c9bd6ad 100644
--- a/linux-user/mips/target_elf.h
+++ b/linux-user/mips/target_elf.h
@@ -12,6 +12,
Signed-off-by: Fredrik Noring
---
target/mips/translate.c | 53 +
1 file changed, 53 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index ab16cdb911..fb571e278e 100644
--- a/target/mips/translate.c
+++ b/target/mips/tr
The Linux kernel traps and emulates certain instructions. For user only,
QEMU is the kernel, so we emulate those traps by simply emulating the
instructions directly.
Signed-off-by: Fredrik Noring
---
target/mips/translate.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/targ
These MIPS III instructions are unavailable and therefore trapped and
emulated by the Linux kernel.
Signed-off-by: Fredrik Noring
---
target/mips/translate.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 77d6783
The primary purpose of this change is to support programs compiled by
GCC for the R5900 target and thereby run R5900 Linux distributions, for
example Gentoo. In particular, this avoids issues with cross compilation.
This change has been tested with Gentoo compiled for R5900, including
native compi
CPU_R5900 is defined as CPU_MIPS3 but it has the MIPS IV instructions
MOVN, MOVZ and PREF as well.
Signed-off-by: Fredrik Noring
---
target/mips/translate.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index fb571e278e
Sources [1][2] indicate that the Emotion Engine was designed by Toshiba
and licensed to Sony. Others [3][4] claim it was a joint effort. It may
therefore make sense to refer to the CPU as "Toshiba/Sony R5900".
[1]
http://cs.nyu.edu/courses/spring02/V22.0480-002/projects/aldrich/emotionengine.ppt
Hi Fredrik,
> Many thanks for your review, Maciej,
You are welcome!
> > Eventually you'll have to remove all these instructions (plus LL and SC)
> > from the system emulation mode. In fact I think it would make sense to do
> > that right away, because I believe it will be a reasonably simpl
On 14.09.18 18:25, Kevin Wolf wrote:
> Am 13.09.2018 um 22:55 hat Max Reitz geschrieben:
>> On 13.09.18 14:52, Kevin Wolf wrote:
>>> When starting an active commit job, other callbacks can run before
>>> mirror_start_job() calls bdrv_ref() where needed and cause the nodes to
>>> go away. Add anothe
On 9/15/18 11:08 AM, Fredrik Noring wrote:
> Signed-off-by: Fredrik Noring
Reviewed-by: Philippe Mathieu-Daudé
> ---
> linux-user/mips/target_elf.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/linux-user/mips/target_elf.h b/linux-user/mips/target_elf.h
> index fa5d30bf99..a98c9
On 9/16/18 5:13 PM, Fredrik Noring wrote:
> These MIPS III instructions are unavailable and therefore trapped and
> emulated by the Linux kernel.
>
> Signed-off-by: Fredrik Noring
Reviewed-by: Philippe Mathieu-Daudé
> ---
> target/mips/translate.c | 8 +++-
> 1 file changed, 7 insertions(
On 9/15/18 12:28 PM, Fredrik Noring wrote:
> Sources [1][2] indicate that the Emotion Engine was designed by Toshiba
> and licensed to Sony. Others [3][4] claim it was a joint effort. It may
> therefore make sense to refer to the CPU as "Toshiba/Sony R5900".
This looks fair.
BTW Maciej do you rem
On 9/7/18 7:43 PM, Fredrik Noring wrote:
> The R5900 implements the 64-bit MIPS III instruction set except DMULT,
> DMULTU, DDIV, DDIVU, LL, SC, LLD and SCD. The MIPS IV instructions MOVN,
> MOVZ and PREF are implemented. It has the R5900 specific three-operand
> instructions MADD, MADDU, MULT and
On 9/15/18 10:43 AM, Fredrik Noring wrote:
> CPU_R5900 is defined as CPU_MIPS3 but it has the MIPS IV instructions
> MOVN, MOVZ and PREF as well.
>
> Signed-off-by: Fredrik Noring
Reviewed-by: Philippe Mathieu-Daudé
> ---
> target/mips/translate.c | 5 +++--
> 1 file changed, 3 insertions(+),
On 9/16/18 5:04 PM, Fredrik Noring wrote:
> The Linux kernel traps and emulates certain instructions. For user only,
> QEMU is the kernel, so we emulate those traps by simply emulating the
> instructions directly.
>
> Signed-off-by: Fredrik Noring
Reviewed-by: Philippe Mathieu-Daudé
> ---
> t
On 2018年09月14日 21:14, liujunjie (A) wrote:
-Original Message-
From: Jason Wang [mailto:jasow...@redhat.com]
Sent: Friday, September 14, 2018 8:45 PM
To: liujunjie (A) ; m...@redhat.com
Cc: Huangweidong (C) ; wangxin (U)
; qemu-devel@nongnu.org; Gonglei (Arei)
; Zhoujian (jay)
Subjec
Also make the definition and declare of this function's argument name
the same.
Signed-off-by: Li Qiang
---
include/qom/qom-qobject.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/qom/qom-qobject.h b/include/qom/qom-qobject.h
index 77cd717e3f..11803c6b57 100644
>
>
> *(That's what I said range is different)*
>> Ex: 1st chunk of device will save into image.000
>> 2nd chunk of device will save into image.001
>> Nth chunk of device will save into image.(N-1)
>> ...etc
>>
>> I can see all block device data when I mount image.(N-1) by qemu-nbd cuz
>> the chunk
On Mon, Sep 10, 2018 at 09:46:29PM +0100, Mark Cave-Ayland wrote:
> According to the PReP specification section 6.1.6 "System Interrupt
> Assignments", all PCI interrupts are routed via IRQ 15.
>
> In the case of the 40p machine this isn't quite true in that it has a routing
> quirk: the LSI SCSI
On Fri, Sep 14, 2018 at 06:04:28PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> This is a pair of related migration fixes for cases where the loadvm
> state doesn't get cleaned up.
>
> In the first case this is because the code hasn't cleared the postcopy
> fla
On 17/09/18 04:54, David Gibson wrote:
> On Mon, Sep 10, 2018 at 09:46:29PM +0100, Mark Cave-Ayland wrote:
>> According to the PReP specification section 6.1.6 "System Interrupt
>> Assignments", all PCI interrupts are routed via IRQ 15.
>>
>> In the case of the 40p machine this isn't quite true in
On Fri, Sep 14, 2018 at 01:26:58PM -0500, Brijesh Singh wrote:
> Currently, the amdvi_validate_dte() assumes that a valid DTE will
> always have V=1. This is not true. The V=1 means that bit[127:1] are
> valid. A valid DTE can have IV=1 and V=0 (i.e pt=off, intremap=on).
"pt" might be a bit confus
> > And even if it turns out autosuspend is still an issue: I think
> > meanwhile we can really stop worrying about guests running in old qemu
> > versions with broken usb suspend (fixed in 0.13 !). If needed we can
> > enable autosuspend unconditionally in guests.
>
> OK, so what about the othe
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