On 07/06/2018 07:16 PM, Alex Williamson wrote:
> On Fri, 6 Jul 2018 18:36:14 +0200
> Cédric Le Goater wrote:
>
>> PCI devices needing a ROM allocate an optional MemoryRegion with
>> pci_add_option_rom(). pci_del_option_rom() does the cleanup when the
>> device is destroyed. The only action taken
Ari Sundholm writes:
> This was accidentally omitted. Thanks to Eric Blake for spotting this.
>
> Signed-off-by: Ari Sundholm
> ---
> qapi/block-core.json | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/qapi/block-core.json b/qapi/block-core.json
> index 38b3125..62a92fa 100644
> ---
Applied to qapi-next.
On 07/05/2018 07:25 PM, Jason J. Herne wrote:
> From: "Jason J. Herne"
> +void await_io_int(uint16_t sch_no)
> +{
> +/*
> + * wait_psw and ctl6 must be static to avoid stack allocation as gcc
> cannot
> + * align stack variables. The stctg, lctlg and lpswe instructions require
> +
On 06/28/2018 10:36 AM, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> This is a model of the PCIe Host Bridge (PHB3) found on a Power8
> processor. It includes the PowerBus logic interface (PBCQ), IOMMU
> support, PCIe root complex, the XICS MSI and LSI interrupt sources.
>
> The Po
On Fri, Jul 06, 2018 at 16:56:46 +0200, Kevin Wolf wrote:
> Am 06.07.2018 um 13:11 hat Cornelia Huck geschrieben:
> > On Wed, 4 Jul 2018 17:14:02 +0100
> > Peter Maydell wrote:
> >
> > > On 4 July 2018 at 14:34, Kevin Wolf wrote:
> > > > Essentially, what is important to me isn't getting these o
On Thu, Jul 05, 2018 at 03:11:32PM +0100, Richard W.M. Jones wrote:
> VMware represents these internally as two signed 64 bit integers, eg:
>
> vm.genid = "-570734802784577186"
> vm.genidx = "-5042519231342505152"
>
> I am still trying to get verification, but I believe the first is the
> low
From: Cédric Le Goater
commit efe2add7cb7f ("spapr/vio: deprecate the "irq" property")
introduced get/set accessors for the "irq" property to warn of its
usage, but the warning in the get pollutes the monitor 'info qtree'.
Signed-off-by: Cédric Le Goater
Signed-off-by: David Gibson
---
hw/ppc
From: Mark Cave-Ayland
Commit 29f9cef39e "ppc: Include vga cirrus card into the compiling process"
changed the default display adapter for all PPC machines to cirrus.
Unfortunately
it missed setting the default display type to stdvga for both Mac machines
causing the display to fail to initialis
From: Laurent Vivier
When I try to build a ppc64 target on a ppc64 host (gcc 8.1.1), I have:
.../target/ppc/int_helper.c: In function 'helper_vinsertb':
.../target/ppc/int_helper.c:1954:32: error: array subscript
18446744073709551608 is above array bounds of 'uint8_t[16]' {aka 'unsigned
char[1
From: BALATON Zoltan
Emulate the i2c part of SM501 which is used to access the EDID info
from a monitor.
The vmstate structure is changed and its version is increased but
SM501 is only used on SH and PPC sam460ex machines that don't support
cross-version migration.
Signed-off-by: BALATON Zoltan
The following changes since commit 43a473993fd9378bf850dcafa68eb6dee8c300f8:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2018-07-06 18:18:08 +0100)
are available in the Git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-3.0-201
From: Sebastian Bauer
Changing the palette of a color index has as an immediate effect on
all pixels with the corresponding index on real hardware. Performing a
full update after a palette change is a simple way to emulate this
effect.
Signed-off-by: Sebastian Bauer
Signed-off-by: BALATON Zolta
From: Sebastian Bauer
Before, crt_h_total was used for src_width and dst_width. This is a
property of the current display setting and not relevant for the 2D
operation that also can be done off-screen. The pitch register's purpose
is to describe line pitch relevant of the 2D operation.
Signed-of
From: BALATON Zoltan
Set the changed memory region dirty after performed a 2D operation to
ensure that the screen is updated properly.
Signed-off-by: BALATON Zoltan
Signed-off-by: David Gibson
---
hw/display/sm501.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
dif
From: Sebastian Bauer
The sm501 currently implements only a very limited set of raster operation
modes. After this change, unknown raster operation modes are logged so
these can be easily spotted.
Signed-off-by: BALATON Zoltan
Signed-off-by: David Gibson
---
hw/display/sm501.c | 23 ++
sam460ex_load_device_tree() handles nearly all possible errors by simply
exiting (within helper functions and macros). It handles two early error
cases by returning an error.
There's no particular point to this, so make it handle those directly as
well, removing the need for the caller to handle
From: Mark Cave-Ayland
Commit 29f9cef "ppc: Include vga cirrus card into the compiling process"
changed the default display adapter for all PPC machines to cirrus.
Unfortunately
it missed setting the default display type to stdvga for both PReP machines
causing the display to fail to initialise
I can reproduce it. But there is one interesting thing.
When I replace "-nographic" with "-serial stdio" everything is ok,
icount works normally.
But "-nographic" runs are very slow in icount mode.
It seems that GUI produces some events that force main loop to iterate.
--
You received this bug n
From: Sebastian Bauer
Add support for the negated destination operation mode. This is used e.g.
by AmigaOS for the INVERSEVID drawing mode. With this change, the cursor
in the shell and non-immediate window adjustment are working now.
Signed-off-by: BALATON Zoltan
Signed-off-by: David Gibson
-
The qemu_fdt_*() helper functions already exit with a message instead of
returning errors, so we don't need to check for errors in the caller.
Signed-off-by: David Gibson
---
hw/ppc/sam460ex.c | 26 ++
1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/hw/ppc/
From: BALATON Zoltan
Display updates and drawing hardware cursor did not work when frame
buffer address was non-zero. Fix this by taking the frame buffer
address into account in these cases. This fixes screen dragging on
AmigaOS. Based on patch by Sebastian Bauer.
Signed-off-by: Sebastian Bauer
In a couple of places sam460ex_load_device_tree() calls "raw" libfdt
functions which can fail, but doesn't check for error codes. At best,
if these fail the guest will be silently started in a non-standard state,
or it could fail entirely.
Fix this by using the _FDT() helper macro which aborts on
From: BALATON Zoltan
Update the submodule and u-boot-sam460-20100605.bin to include
following fixes from Sebastian Bauer:
- Fix build with newer gcc
- Decrease unnecessary delay which fixes slow booting from CD
Signed-off-by: BALATON Zoltan
Signed-off-by: David Gibson
---
pc-bios/u-boot-sam46
From: Philippe Mathieu-Daudé
Missed in 3c409c1927e, hopefully reported by Coverity.
Fixes: Coverity CID 1393788 (Copy-paste error)
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: BALATON Zoltan
Signed-off-by: David Gibson
---
hw/ppc/ppc440_uc.c | 2 +-
1 file changed, 1 insertion(+), 1 de
On 07/09/18 09:36, Richard W.M. Jones wrote:
> On Thu, Jul 05, 2018 at 03:11:32PM +0100, Richard W.M. Jones wrote:
>> VMware represents these internally as two signed 64 bit integers, eg:
>>
>> vm.genid = "-570734802784577186"
>> vm.genidx = "-5042519231342505152"
>>
>> I am still trying to get
On Mon, Jul 09, 2018 at 11:05:34AM +0200, Laszlo Ersek wrote:
> On 07/09/18 09:36, Richard W.M. Jones wrote:
> > On Thu, Jul 05, 2018 at 03:11:32PM +0100, Richard W.M. Jones wrote:
> >> VMware represents these internally as two signed 64 bit integers, eg:
> >>
> >> vm.genid = "-570734802784577186
Add pci-bus-pc node and pci-bus interface, moved QPCIBusPC struct
declaration in its header (since it will be needed by other drivers)
and introduced a setter method for drivers that do not need to allocate
but have to initialize QPCIBusPC.
Signed-off-by: Emanuele Giuseppe Esposito
---
tests/lib
qgraph API for the qtest driver framework
This series of patches introduce a different qtest driver
organization, viewing machines, drivers and tests as node in a
graph, each having one or multiple edges relations.
The idea is to have a framework where each test asks for a specific
driver, and
Add arm/raspi2 machine to the graph. This machine contains a generic-sdhci, so
its constructor must take care of setting it properly when called.
Signed-off-by: Emanuele Giuseppe Esposito
---
tests/Makefile.include| 3 +-
tests/libqos/raspi2-machine.c | 68 ++
Add qgraph API that allows to add/remove nodes and edges from the graph,
implementation of Depth First Search to discover the paths and basic unit
test to check correctness of the API.
graph.h provides the public API to manage the graph nodes/edges
graph_extra.h provides a more private API used su
Add qgraph nodes for sdhci-pci and generic-sdhci (memory mapped) drivers.
Both drivers implement (produce) the same interface sdhci, that provides the
readw - readq - writeq functions.
Signed-off-by: Emanuele Giuseppe Esposito
---
tests/Makefile.include | 1 +
tests/libqos/sdhci.c | 142
Add main executable that takes care of starting the framework, create the
nodes, set the available drivers/machines, discover the path and run tests.
Signed-off-by: Emanuele Giuseppe Esposito
---
tests/Makefile.include | 3 +
tests/qos-test.c | 310 +++
Add pc machine for the x86_64 QEMU binary. This machine contains an
i440FX-pcihost
driver, that contains itself a pci-bus-pc that produces the pci-bus interface.
Signed-off-by: Emanuele Giuseppe Esposito
---
tests/Makefile.include | 2 +-
tests/libqos/x86_64_pc-machine.c | 93 +++
Convert tests/sdhci-test in first qgraph test node, sdhci-test. This test
consumes an sdhci interface and checks that its function return the
expected values.
Note that this test does not allocate any sdhci structure, it's all done by the
qtest walking graph mechanism
Signed-off-by: Emanuele Gius
Am 06.07.2018 um 23:20 hat Eric Blake geschrieben:
> On 07/06/2018 11:45 AM, Kevin Wolf wrote:
> > If the virtual disk size isn't aligned to full clusters,
> > bdrv_co_do_copy_on_readv() may get pnum == 0 before having the full
> > cluster completed, which will let it run into an assertion failure:
On 8 July 2018 at 02:55, Eric Blake wrote:
> The following changes since commit 43a473993fd9378bf850dcafa68eb6dee8c300f8:
>
> Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into
> staging (2018-07-06 18:18:08 +0100)
>
> are available in the Git repository at:
>
> git://repo.
09.07.2018 04:15, Fam Zheng wrote:
On Fri, 07/06 21:30, Vladimir Sementsov-Ogievskiy wrote:
Here two things are fixed:
1. Architecture
On each recursion step, we go to the child of src or dst, only for one
of them. So, it's wrong to create tracked requests for both on each
step. It leads to tr
What is the state of the sifive_u emulation? When I tried to boot a bbl
with an included kernel I get these errors:
qemu-system-riscv64: plic: invalid register write: 2090
qemu-system-riscv64: plic: invalid register write: 2094
qemu-system-riscv64: plic: invalid register write: 2098
q
Hi
On Tue, Jun 5, 2018 at 11:18 AM, Paolo Bonzini wrote:
> On 05/06/2018 09:54, Sergio Lopez wrote:
>> Only retry on serial_xmit if qemu_chr_fe_write returns 0, as this is the
>> only recoverable error.
>>
>> Retrying with any other scenario, in addition to being a waste of CPU
>> cycles, can com
On 07/05/2018 07:25 PM, Jason J. Herne wrote:
Instead of doing this
> +void await_io_int(uint16_t sch_no)
> +{
> +/*
> + * wait_psw and ctl6 must be static to avoid stack allocation as gcc
> cannot
> + * align stack variables. The stctg, lctlg and lpswe instructions require
> +
On Mon, 09 Jul 2018 08:33:05 +0200
Markus Armbruster wrote:
> Peter Maydell writes:
>
> > On 6 July 2018 at 15:56, Kevin Wolf wrote:
> >> Am 06.07.2018 um 13:11 hat Cornelia Huck geschrieben:
> >>> That way, we can still easily remove old cruft (case (a)), but still
> >>> accommodate cases
On Mon, Jul 09, 2018 at 01:08:38PM +0200, Cornelia Huck wrote:
> On Mon, 09 Jul 2018 08:33:05 +0200
> Markus Armbruster wrote:
>
> > Peter Maydell writes:
> >
> > > On 6 July 2018 at 15:56, Kevin Wolf wrote:
> > >> Am 06.07.2018 um 13:11 hat Cornelia Huck geschrieben:
> > >>> That way, we
On 07/09/2018 10:07 AM, Markus Armbruster wrote:
Ari Sundholm writes:
This was accidentally omitted. Thanks to Eric Blake for spotting this.
Signed-off-by: Ari Sundholm
---
qapi/block-core.json | 2 ++
1 file changed, 2 insertions(+)
diff --git a/qapi/block-core.json b/qapi/block-core.js
On Fri, Jul 06, 2018 at 05:39:00PM +0100, Suzuki K Poulose wrote:
> On 07/06/2018 04:09 PM, Marc Zyngier wrote:
> >On 06/07/18 14:49, Suzuki K Poulose wrote:
> >>On 04/07/18 23:03, Suzuki K Poulose wrote:
> >>>On 07/04/2018 04:51 PM, Will Deacon wrote:
> Hi Suzuki,
>
> On Fri, Jun 29,
There are some situations when this patch still doesn't help.
I think this happens due to the race condition in qemu_tcg_rr_wait_io_event
static void qemu_tcg_rr_wait_io_event(CPUState *cpu)
{
while (all_cpu_threads_idle()) {
stop_tcg_kick_timer();
qemu_cond_wait(cpu->halt_cond
> Currently we use memory_region_init_rom_nomigrate() to create
> the "dp3893x-prom" memory region, and we don't manually register
> it with vmstate_register_ram(). This currently means that its
> contents are migrated but as a ram block whose name is the empty
> string; in future it may mean they
Git repository at:
>
> git://github.com/dgibson/qemu.git tags/ppc-for-3.0-20180709
>
> for you to fetch changes up to 51b0d834c414f494410cc94e56886b6584ae3c54:
>
> sam460ex: Make sam460ex_load_device_tree() handle all e
Does reverting the commit fix it? It was just a cleanup I think.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1774677
Title:
-icount increases boot time by >10x
Status in QEMU:
Confirmed
Bug d
From: Aleksandar Markovic
Update email addresses of Aleksandar Markovic and Paul Burton in the
MAINTAINERS file. Also, add corresponding items in the .mailmap file.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
---
.mailmap| 7 +--
MAINTAINERS | 9 +
2
From: Aleksandar Markovic
v4->v5:
- patch 5 (Add CP0 BadInstrX) corrected to work for both 32-bit and
64-bit targets, and using correct tcg function
- patch 7 (Amend CP0 WatchHi) was removed from the series until it
is reimplemented in a better way
v3->v4:
- accepted suggestion o
From: Aleksandar Markovic
If checkpatch.pl is applied (using switch "-f") on file
target/mips/msa_helper.c, it will hang.
This is a workaround by correcting the source file. The workaround is
found by partial deleting and undeleting of the code in msa_helper.c
in binary search fashion.
The bug
From: Aleksandar Markovic
Update CP0 registers Config0, Config1, and Config5 bit definitions.
Some of these bits will be utilized by upcoming nanoMIPS changes.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
---
target/mips/cpu.h | 38 +-
From: Stefan Markovic
Add CP0 BadInstrX register. This register will be used in nanoMIPS.
Signed-off-by: Stefan Markovic
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
---
target/mips/cpu.h | 1 +
ta
On Mon, 9 Jul 2018 08:58:05 +0200
Thomas Huth wrote:
> On 06.07.2018 13:11, Cornelia Huck wrote:
> > On Wed, 4 Jul 2018 17:14:02 +0100
> > Peter Maydell wrote:
> >
> >> On 4 July 2018 at 14:34, Kevin Wolf wrote:
> >>> Essentially, what is important to me isn't getting these options dropped
Yes, I tried to revert (with some updates to the current code base) and
the bug was fixed:
diff --git a/cpus.c b/cpus.c
index 181ce33..e2fc972 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1172,6 +1172,13 @@ static void qemu_tcg_rr_wait_io_event(CPUState *cpu)
{
while (all_cpu_threads_idle()) {
From: Yongbok Kim
BadVAddr should not be updated if (env->hflags & MIPS_HFLAG_DM) is
set.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
---
target/mips/helper.c| 4 +++-
target/mips/op_helper.c | 12 +---
2 files changed, 12 in
From: Aleksandar Markovic
Remove "range style" case statements to make code analysis easier.
This is needed also for some upcoming nanoMIPS-related refactorings.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
---
target/mips/translate.c | 249 +
From: Yongbok Kim
MFHC0 and MTHC0 used to handle EntryLo0 and EntryLo1 registers only,
and placing ELPA flag checks before switch statement were technically
correct. However, after adding handling more registers, these checks
should be moved to act only in cases of handling EntryLo0 and
EntryLo1.
On 9 July 2018 at 11:25, Marc-André Lureau wrote:
> Shouldn't it rety if it returns -1 and the errno == EAGAIN? I am not
> sure when it would return 0 and a retry would make sense.
This came up in previous discussion on an earlier version of this:
https://lists.gnu.org/archive/html/qemu-devel/201
Hi
On Mon, Jul 9, 2018 at 2:11 PM, Peter Maydell wrote:
> On 9 July 2018 at 11:25, Marc-André Lureau wrote:
>> Shouldn't it rety if it returns -1 and the errno == EAGAIN? I am not
>> sure when it would return 0 and a retry would make sense.
>
> This came up in previous discussion on an earlier v
On 09/07/18 12:23, Dave Martin wrote:
> On Fri, Jul 06, 2018 at 05:39:00PM +0100, Suzuki K Poulose wrote:
>> On 07/06/2018 04:09 PM, Marc Zyngier wrote:
>>> On 06/07/18 14:49, Suzuki K Poulose wrote:
On 04/07/18 23:03, Suzuki K Poulose wrote:
> On 07/04/2018 04:51 PM, Will Deacon wrote:
>>
For M-profile exception returns, the mmu index to use for exception
return unstacking is supposed to be that of wherever we are returning to:
* if returning to handler mode, privileged
* if returning to thread mode, privileged or unprivileged depending on
CONTROL.nPRIV for the destination secu
On Tue, Jul 03, 2018 at 03:27:23PM -0700, si-wei liu wrote:
> On 7/3/2018 2:58 AM, Roman Kagan wrote:
> > So how is this coordination going to work? One possibility is that the
> > PV device emits a QMP event upon the guest driver confirming the support
> > for failover, the management layer inter
On 6 July 2018 at 17:21, Philippe Mathieu-Daudé wrote:
> DeviceClass::reset models a "cold power-on" reset which can
> also be use to powercycle a device; but there is no "hot reset"
> (a.k.a. soft-reset) method available.
>
> The OMAP MMC Power-Up Control bit is not designed to powercycle
> a car
On 6 July 2018 at 17:21, Philippe Mathieu-Daudé wrote:
> Hi Peter,
>
> This bug was previously reported here:
> http://lists.nongnu.org/archive/html/qemu-devel/2018-06/msg01824.html
>
> Diff before/after ecd219f7abb using -append "console=ttyS1 printk.time=0"
> option to boot http://people.linaro.
On Fri, Jul 06, 2018 at 03:54:06PM +0200, Cornelia Huck wrote:
> If we want to extend that to other device types, we can add the field
> in their config space; but I'd rather prefer a more generic "host
> relays config metainformation" approach.
The problem with this approach is that it's too gene
Ping for review? I can put this in via target-arm.next...
thanks
-- PMM
On 2 July 2018 at 14:06, Peter Maydell wrote:
> commit b08199c6fbea1 accidentally added a reference to a doc
> comment to a nonexistent memory_region_allocate_aux_memory().
> This was a leftover from a previous version of th
On 09/07/2018 14:23, Marc-André Lureau wrote:
> I suppose the patch should also change qemu_chr_fe_write() to
> qemu_chr_fe_write_all() to be complete and let the chardev handle
> EAGAIN.
No, using qemu_chr_fe_write_all() is even more wrong, because hw/char
devices should never block (and hw/char/
On Mon, 07/09 12:43, Vladimir Sementsov-Ogievskiy wrote:
> 09.07.2018 04:15, Fam Zheng wrote:
> > On Fri, 07/06 21:30, Vladimir Sementsov-Ogievskiy wrote:
> > > Here two things are fixed:
> > >
> > > 1. Architecture
> > >
> > > On each recursion step, we go to the child of src or dst, only for on
On 02/07/2018 15:06, Peter Maydell wrote:
> commit b08199c6fbea1 accidentally added a reference to a doc
> comment to a nonexistent memory_region_allocate_aux_memory().
> This was a leftover from a previous version of the patchset
> which defined memory_region_allocate_aux_memory() for
> "allocate
On 9 July 2018 at 14:17, Paolo Bonzini wrote:
> On 09/07/2018 14:23, Marc-André Lureau wrote:
>> I suppose the patch should also change qemu_chr_fe_write() to
>> qemu_chr_fe_write_all() to be complete and let the chardev handle
>> EAGAIN.
>
> No, using qemu_chr_fe_write_all() is even more wrong, b
On 9 July 2018 at 12:27, Aleksandar Markovic wrote:
>> Currently we use memory_region_init_rom_nomigrate() to create
>> the "dp3893x-prom" memory region, and we don't manually register
>> it with vmstate_register_ram(). This currently means that its
>> contents are migrated but as a ram block whos
On Mon, Jul 09, 2018 at 01:29:42PM +0100, Marc Zyngier wrote:
> On 09/07/18 12:23, Dave Martin wrote:
> > On Fri, Jul 06, 2018 at 05:39:00PM +0100, Suzuki K Poulose wrote:
> >> On 07/06/2018 04:09 PM, Marc Zyngier wrote:
> >>> On 06/07/18 14:49, Suzuki K Poulose wrote:
> On 04/07/18 23:03, Suz
Hi,
This is a small patch to gdbstub rather insignificant at first sight:
fix null pointer dereference. It actually allows to take benefit of
gdb features (breakpoints/sstep) internally (ie. special purpose
board) without connecting a gdb client to the Qemu instance gdbserver
stub.
Regards,
Sign
On 09/07/2018 15:21, Peter Maydell wrote:
>>
>> However, indeed it seems to me that the logic of the patch is backwards:
>>
>> - -1/EAGAIN should retry
>>
>> - 0 should *not* retry, because it means the other side has hung up
> This seems weird, because it doesn't follow the usual pattern
> for non
Hi,
I recently noticed that iotest 147 was hanging on my laptop, but worked
fine on my s390x LPAR. Turned out that the architecture was a red
herring; on both platforms, things fail with the 'simple' trace backend
and work with e.g. the 'log' trace backend. Some details on the
failures with the 's
Hi; this target-arm pull request has a collection of generally
fairly minor bugs to sneak in before 3.0 rc0 tomorrow...
thanks
-- PMM
The following changes since commit a98ff0ec2ba3538dd766b349518ee18d03942ed8:
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.0-20180709&
From: Eric Auger
smmu_iommu_mr() aims at returning the IOMMUMemoryRegion corresponding
to a given sid. The function extracts both the PCIe bus number and
the devfn to return this data. Current computation of devfn is wrong
as it only returns the PCIe function instead of slot | function.
Fixes 32
From: Richard Henderson
These instructions must perform the sve_access_check, but
since they are implemented as NOPs there is no generated
code to elide when the access check fails.
Fixes: Coverity issues 1393780 & 1393779.
Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off
From: Guenter Roeck
The CMSDK APB timer is currently always configured as periodic timer.
This results in the following messages when trying to boot Linux.
Timer with delta zero, disabling
If the timer limit set with the RELOAD command is 0, the timer
needs to be enabled as one-shot timer.
Sig
commit b08199c6fbea1 accidentally added a reference to a doc
comment to a nonexistent memory_region_allocate_aux_memory().
This was a leftover from a previous version of the patchset
which defined memory_region_allocate_aux_memory() for
"allocate RAM MemoryRegion and register it for migration"
and
The CMSDK timer interrupt triggers when the counter goes from 1 to 0,
so we want to trigger immediately, rather than waiting for a
clock cycle. Drop the incorrect NO_IMMEDIATE_TRIGGER setting.
We also do not want to get an interrupt if the guest sets the
counter directly to zero, so use the new TRI
The CMSDK timer behaviour is that an interrupt is triggered when the
counter counts down from 1 to 0; however one is not triggered if the
counter is manually set to 0 by a guest write to the counter register.
Currently ptimer can't handle this; add a policy option to allow
a ptimer user to request
From: Richard Henderson
Normally this is automatic in the size restrictions that are placed
on vector sizes coming from the implementation. However, for the
legitimate size tuple [oprsz=8, maxsz=32], we need to clear the final
24 bytes of the vector register. Without this check, do_dup selects
If the CMSDK APB timer is set up with a zero RELOAD value
then it will count down to zero, fire once and then stay
at zero. From the point of view of the ptimer system, the
timer is disabled; but the enable bit in the CTRL register
is still set and if the guest subsequently writes to the
RELOAD or
From: Philippe Mathieu-Daudé
DeviceClass::reset models a "cold power-on" reset which can
also be used to powercycle a device; but there is no "hot reset"
(a.k.a. soft-reset) method available.
The OMAP MMC Power-Up Control bit is not designed to powercycle
a card, but to disable it without poweri
From: Richard Henderson
Use MAKE_64BIT_MASK instead of open-coding. Remove an odd
vector size check that is unlikely to be more profitable
than 3 64-bit integer stores. Correct the iteration for WORD
to avoid writing too much data.
Fixes RISU tests of PTRUE for VL 256.
Signed-off-by: Richard
Currently we use memory_region_init_rom_nomigrate() to create
the "dp3893x-prom" memory region, and we don't manually register
it with vmstate_register_ram(). This currently means that its
contents are migrated but as a ram block whose name is the empty
string; in future it may mean they are not mi
On Mon, 2 Jul 2018 10:54:13 -0400
Stefan Berger wrote:
> On 07/02/2018 07:57 AM, Igor Mammedov wrote:
> > On Fri, 29 Jun 2018 08:20:38 -0400
> > Stefan Berger wrote:
> >
> >> On 06/28/2018 01:26 PM, Marc-André Lureau wrote:
> >>> Hi,
> >>>
> >>> The following patches implement the TPM Physic
On 07/09/2018 10:05 AM, Igor Mammedov wrote:
On Mon, 2 Jul 2018 10:54:13 -0400
Stefan Berger wrote:
On 07/02/2018 07:57 AM, Igor Mammedov wrote:
On Fri, 29 Jun 2018 08:20:38 -0400
Stefan Berger wrote:
On 06/28/2018 01:26 PM, Marc-André Lureau wrote:
Hi,
The following patches implement
On Mon, 9 Jul 2018 09:04:47 +0200
Cédric Le Goater wrote:
> On 07/06/2018 07:16 PM, Alex Williamson wrote:
> > On Fri, 6 Jul 2018 18:36:14 +0200
> > Cédric Le Goater wrote:
> >
> >> PCI devices needing a ROM allocate an optional MemoryRegion with
> >> pci_add_option_rom(). pci_del_option_rom
On 07/09/2018 05:45 AM, Peter Maydell wrote:
> For M-profile exception returns, the mmu index to use for exception
> return unstacking is supposed to be that of wherever we are returning to:
> * if returning to handler mode, privileged
> * if returning to thread mode, privileged or unprivileged d
The AST2500 SoC family changes the runtime behaviour of the hardware
strapping register (SCU70) to write-1-set/write-1-clear, with
write-1-clear implemented on the "read-only" SoC revision register
(SCU7C). For the the AST2400, the hardware strapping is
runtime-configured with read-modify-write sem
09.07.2018 16:17, Fam Zheng wrote:
On Mon, 07/09 12:43, Vladimir Sementsov-Ogievskiy wrote:
09.07.2018 04:15, Fam Zheng wrote:
On Fri, 07/06 21:30, Vladimir Sementsov-Ogievskiy wrote:
Here two things are fixed:
1. Architecture
On each recursion step, we go to the child of src or dst, only fo
Would there be a chance of getting this included in 3.0?
On 07/06/2018 03:00 PM, Ari Sundholm wrote:
The sector size needs to be large enough to accommodate the data
structures for the log super block and log write entries. This was
previously not properly checked, which made it possible to caus
The NSEvent class method scrollingDeltaY is available
for Mac OS 10.7 and newer. Since QEMU supports Mac OS
10.5 and up, we need to be using a method that is
available on these version of Mac OS X. The deltaY
method is a method that does the same thing as
scrollingDeltaY and is available on Mac OS
On 07/09/2018 04:57 AM, Aleksandar Markovic wrote:
> From: Stefan Markovic
>
> Add CP0 BadInstrX register. This register will be used in nanoMIPS.
>
> Signed-off-by: Stefan Markovic
> Signed-off-by: Yongbok Kim
> Signed-off-by: Aleksandar Markovic
> Reviewed-by: Aleksandar Markovic
> Reviewe
A couple of drivers produced build errors after the mod_devicetable.h
header was split out from the platform_device one, e.g.
drivers/media/platform/davinci/vpbe_osd.c:42:40: error: array type has
incomplete element type 'struct platform_device_id'
drivers/media/platform/davinci/vpbe_venc.c:42:40
Not all docker images can run the check step. Let's everything into a
common helper so we don't need to replicate checks in the future.
Signed-off-by: Alex Bennée
---
tests/docker/common.rc | 10 ++
tests/docker/test-clang | 2 +-
tests/docker/test-debug | 2 +-
tests/docker/test-full
1 - 100 of 293 matches
Mail list logo
