On 20.06.2017 02:04, Richard Henderson wrote:
> Since we require all registers saved on input, read R0 from ENV instead
> of passing it manually. Recognize the specification exception when R0
> contains incorrect data.
>
> Signed-off-by: Richard Henderson
Reviewed-by: David Hildenbrand
> ---
On Mon, 19 Jun 2017 14:59:52 -0600
Bruce Rogers wrote:
> Commit a0e640a8 introduced a path processing error.
> Pass fstatat the dirpath based path component instead
> of the entire path.
>
Good catch. Thanks!
Pushed to https://github.com/gkurz/qemu/commits/9p-next
> Signed-off-by: Bruce Roger
On Tue, Jun 20, 2017 at 8:30 AM, Fernando Casas Schössow
wrote:
> Hi Ladi,
>
> In this case both guests are CentOS 7.3 running the same kernel
> 3.10.0-514.21.1.
> Also the guest that fails most frequently is running Docker with 4 or 5
> containers.
>
> Another thing I would like to mention is tha
Am 19.06.2017 um 23:24 hat Keith Busch geschrieben:
> On Tue, Jun 13, 2017 at 04:08:35AM -0600, sba...@raithlin.com wrote:
> > From: Stephen Bates
> >
> > Add the ability for the NVMe model to support both the RDS and WDS
> > modes in the Controller Memory Buffer.
> >
> > Although not currently
On 19 June 2017 at 23:49, Richard Henderson wrote:
> On 06/16/2017 02:18 AM, Peter Maydell wrote:
>>
>> (As an aside I wonder whether any still-used hardware has
>> the cache aliasing constraints in question :-))
>
>
> I strongly doubt it. Certainly none of the 64-bit chips have this.
If so then
On 14 June 2017 at 08:56, Gerd Hoffmann wrote:
> Hi,
>
> Here is the ui patch queue. Switches the default
> to gtk3 and sdl2 and fixes some bugs.
>
> This version drops the two patches adding deprecation
> warnings to configure.
>
> please pull,
> Gerd
>
> The following changes since commit 3
> +uint64_t HELPER(srstu)(CPUS390XState *env, uint64_t end, uint64_t str)
> +{
> +uintptr_t ra = GETPC();
> +uint32_t len;
> +uint16_t v, c = env->regs[0];
> +uint64_t adj_end;
> +
> +/* Bits 32-47 of R0 must be zero. */
> +if (env->regs[0] & 0xu) {
> +cpu_r
On Thu, Jun 08, 2017 at 03:09:28PM +1000, David Gibson wrote:
> The reset handler for DRCs attempts several state transitions which are
> subject to various checks and restrictions. But at reset time we know
> there is no guest, so we can ignore most of the usual sequencing rules and
> just set th
> Apart from special wrapping conditions, looks good to me!
>
> (will scan the PoP how wrapping is to be handled in general during an
> instruction. Some (like mvcos) mention it explicitly, others don't)
>
Answering my own questions:
1. We always have to wrap addresses that we generate except
From: Xiao Guangrong
It is used to track possible writable sptes on the shadow page on
which the bit is set to 1 for the sptes that are already writable
or can be locklessly updated to writable on the fast_page_fault
path, also a counter for the number of possible writable sptes is
introduced to
From: Xiao Guangrong
The original idea is from Avi. kvm_mmu_write_protect_all_pages() is
extremely fast to write protect all the guest memory. Comparing with
the ordinary algorithm which write protects last level sptes based on
the rmap one by one, it just simply updates the generation number to
From: Xiao Guangrong
Current behavior of mmu_spte_update_no_track() does not match
the name of _no_track() as actually the A/D bits are tracked
and returned to the caller
This patch introduces the real _no_track() function to update
the spte regardless of A/D bits and rename the original functio
From: Xiao Guangrong
The writable spte can not be locklessly fixed and add a WARN_ON()
to trigger the warning if something out of our mind happens, that
is good for us to track if the log for writable spte is missed
on the fast path
Signed-off-by: Xiao Guangrong
---
arch/x86/kvm/mmu.c | 11 +++
From: Xiao Guangrong
A new flag, KVM_DIRTY_LOG_WITHOUT_WRITE_PROTECT, is introduced which
indicates the userspace just wants to get the snapshot of dirty bitmap
During live migration, after all snapshot of dirty bitmap is fetched
from KVM, the guest memory can be write protected by calling
KVM_W
From: Xiao Guangrong
Changelog in v2:
thanks to Paolo's review, this version disables write-protect-all if
PML is supported
Background
==
The original idea of this patchset is from Avi who raised it in
the mailing list during my vMMU development some years ago
This patchset introduces a
From: Xiao Guangrong
The functionality of write protection for all guest memory is ready,
it is the time to make its usable for userspace which is indicated
by KVM_CAP_X86_WRITE_PROTECT_ALL_MEM
Signed-off-by: Xiao Guangrong
---
arch/x86/kvm/x86.c | 21 +
include/uapi/
From: Xiao Guangrong
mmu_spte_age() is under the protection of mmu-lock, no reason to use
mmu_spte_get_lockless()
Signed-off-by: Xiao Guangrong
---
arch/x86/kvm/mmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 7711953..dc00
Hello,
Am 18.06.2017 um 20:22 schrieb Philipp Hahn:
> Am 17.06.2017 um 18:51 schrieb Laszlo Ersek:
>> (I also recommend using the "vbindiff" tool for such problems, it is
>> great for picking out patterns.)
>>
>> ** ** ** ** ** ** ** ** 8 9 ** ** ** 13 14 15
>> -- -- -- -- -
On 14 June 2017 at 22:55, Jeff Cody wrote:
> The following changes since commit 3f0602927b120a480b35dcf58cf6f95435b3ae91:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-target-arm-20170613' into staging (2017-06-13
> 15:49:07 +0100)
>
> are available in the git repository at:
>
On 15 June 2017 at 09:17, Laurent Vivier wrote:
> The following changes since commit 3f0602927b120a480b35dcf58cf6f95435b3ae91:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-target-arm-20170613' into staging (2017-06-13
> 15:49:07 +0100)
>
> are available in the git repository
Jayanto Minocha writes:
> Hi,
> I think there have been a few threads on the mailing list regarding tracing
> guest virtual addresses for load and store instructions, but I have been
> unable to get it to work. I am trying this for an AArch64 machine, and am
> using the softmmu.
> The tracing inf
On 20 June 2017 at 12:02, Lluís Vilanova wrote:
> Jayanto Minocha writes:
>> But that is only used to instrument the cpu_ld/cpu_st macros, which is only
>> called in the case of a tlb miss.
>
>> I've been going over the archives, and it looks like I need to instrument
>> tcg_out_tlb_load. Am I on
Juan Quintela wrote:
> Hi
Hi
As there is no topics, call gets cancelled.
Later, Juan.
>
> Please, send any topic that you are interested in covering.
>
> At the end of Monday I will send an email with the agenda or the
> cancellation of the call, so hurry up.
>
> After discussions on the QEMU
On Mon 19 Jun 2017 07:34:42 PM CEST, Daniel P. Berrange wrote:
> Historically the qcow & qcow2 image formats supported a property
> "encryption=on" to enable their built-in AES encryption. We'll
> soon be supporting LUKS for qcow2, so need a more general purpose
> way to enable encryption, with a c
On success, pci_add_capability2() returns a positive value. On
failure, it sets an error and return a negative value.
pci_add_capability() laboriously checks this behavior. No other
caller does. Drop the checks from pci_add_capability().
Cc: m...@redhat.com
Cc: mar...@redhat.com
Signed-off-by: Ma
After the patch 'Make errp the last parameter of pci_add_capability()',
pci_add_capability() and pci_add_capability2() now do exactly the same.
So drop the wrapper pci_add_capability() of pci_add_capability2(), then
replace the pci_add_capability2() with pci_add_capability() everywhere.
Suggested-
In order to propagate error message better, convert shpc_init() to
Error also convert the pci_bridge_dev_initfn() to realize.
Cc: m...@redhat.com
Cc: mar...@redhat.com
Cc: arm...@redhat.com
Signed-off-by: Mao Zhongyi
---
hw/pci-bridge/pci_bridge_dev.c | 21 -
hw/pci/shpc.c
Comments for pci_add_capability2() to explain the return
value. This may help to make a correct return value check
for its callers.
Cc: m...@redhat.com
Cc: mar...@redhat.com
Cc: arm...@redhat.com
Suggested-by: Markus Armbruster
Signed-off-by: Mao Zhongyi
Reviewed-by: Marcel Apfelbaum
---
hw/pc
pci_add_capability returns a strictly positive value on success,
correct asserts.
Cc: dmi...@daynix.com
Cc: jasow...@redhat.com
Cc: kra...@redhat.com
Cc: alex.william...@redhat.com
Cc: arm...@redhat.com
Cc: mar...@redhat.com
Signed-off-by: Mao Zhongyi
---
hw/net/e1000e.c | 2 +-
hw/net/eepro10
This series mainly implements the conversions of pci-bridge devices
i82801b11, io3130_upstream/downstream and so on to realize(). Naturally
part of error messages need to be converted to Error, then propagate
to its callers via the argument errp, bonus clean related minor flaw
up. In short, the for
When the function no success value to transmit, it usually make the
function return void. It has turned out not to be a success, because
it means that the extra local_err variable and error_propagate() will
be needed. It leads to cumbersome code, therefore, transmit success/
failure in the return v
Peter Maydell writes:
> On 9 June 2017 at 14:46, Markus Armbruster wrote:
>> The following changes since commit 64175afc695c0672876fbbfc31b299c86d562cb4:
>>
>> arm_gicv3: Fix ICC_BPR1 reset value when EL3 not implemented (2017-06-07
>> 17:21:44 +0100)
>>
>> are available in the git repository
In assigned_device_pci_cap_init(), first, error messages are filled
to a local_err variable, then through error_propagate() pass to
the parameter of errp. It leads to cumbersome code. In order to
avoid the extra local_err and error_propagate(), drop it and use
errp instead.
Cc: pbonz...@redhat.com
Add Error argument for pci_add_capability() to leverage the errp
to pass info on errors. This way is helpful for its callers to
make a better error handling when moving to 'realize'.
Cc: pbonz...@redhat.com
Cc: r...@twiddle.net
Cc: ehabk...@redhat.com
Cc: m...@redhat.com
Cc: jasow...@redhat.com
Cc
On Tue, Jun 20, 2017 at 01:44:50PM +0200, Alberto Garcia wrote:
> On Mon 19 Jun 2017 07:34:42 PM CEST, Daniel P. Berrange wrote:
> > Historically the qcow & qcow2 image formats supported a property
> > "encryption=on" to enable their built-in AES encryption. We'll
> > soon be supporting LUKS for qc
Convert i82801b11, io3130_upstream, io3130_downstream and
pcie_root_port devices to realize.
Cc: m...@redhat.com
Cc: mar...@redhat.com
Cc: arm...@redhat.com
Signed-off-by: Mao Zhongyi
---
hw/pci-bridge/i82801b11.c | 11 +--
hw/pci-bridge/pcie_root_port.c | 18 +--
On Wed, Jun 14, 2017 at 11:18:46AM +0100, Daniel P. Berrange wrote:
> On Fri, May 19, 2017 at 04:41:46PM -0300, Eduardo Habkost wrote:
> > On Tue, May 09, 2017 at 07:18:07AM -0700, Richard Henderson wrote:
> > > On 05/09/2017 07:13 AM, Richard W.M. Jones wrote:
> > > > On Tue, May 09, 2017 at 07:05
Rather than constructing a local structure instance on the stack, fill
the fields directly on the shared ring, just like other (Linux)
backends do. Build on the fact that all response structure flavors are
actually identical (the old code did make this assumption too).
This is XSA-216.
Reported b
Let's allow to enable it for the qemu cpu model and correctly emulate
it.
Signed-off-by: David Hildenbrand
---
target/s390x/cpu_models.c | 1 +
target/s390x/mem_helper.c | 13 -
2 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/target/s390x/cpu_models.c b/target/s390x/c
If only the page index is set, most likely we don't have a valid
virtual address. Let's do a full tlb flush for that case.
Signed-off-by: David Hildenbrand
---
target/s390x/mem_helper.c | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/target/s390x/mem_h
One step into the direction of adding the DAT-enhancement facility.
To improve the TLB flushing, we will have to remember each used table (or
at least a hash!) for each tlb entry, just like real HW does.
idte is pretty much untested, before I can test it with linux (by enabling
DAT-enhancement) w
Let's keep it very simple for now and flush the complete tlb,
we currently can't find the right entries in our tlb, we would have
to store the used tables for each element.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/me
From: Marc-André Lureau
Alternates with both a 'number' and an 'int' branch will become
invalid when the next patch merges of QFloat and QInt into QNum.
More sophisticated alternate code could keep them valid, but since
we have no users outside tests, simply drop the tests.
Signed-off-by: Marc-A
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-5-marcandre.lur...@redhat.com>
Reviewed-by: Markus Armbruster
[test_visitor_in_uint() tightened slightly]
Signed-off-by: Markus Armbruster
---
tests/test-qobject-input-visitor.c | 39 +++
From: Marc-André Lureau
Use the actual unsigned integer type name.
The type name change impacts the following externally visible area:
* vl.c's machine_help_func() puts it in help for -machine NAME,help.
* QMP command qom-list exposes it in ObjectPropertyInfo member @type.
* QMP command devic
From: Marc-André Lureau
If the property is not of the requested type, the getters will leak a
QObject.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Reviewed-by: Markus Armbruster
Message-Id: <20170607163635.17635-3-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
From: Marc-André Lureau
Use the more common pattern to error out.
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-6-marcandre.lur...@redhat.com>
Reviewed-by: Markus Armbruster
[Commit message tweaked]
Signed-off-by: Markus Armbruster
---
qapi/qobject-input-visitor.c | 8 ++
From: Marc-André Lureau
e->size is hwaddr, i.e. uint64_t. We silently truncate.
Signed-off-by: Marc-André Lureau
Suggested-by: Markus Armbruster
Reviewed-by: Markus Armbruster
Message-Id: <20170607163635.17635-14-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/pci-host/
The following changes since commit edf8bc98424d62035d5e4c0f39542722d72d7979:
Merge remote-tracking branch 'remotes/rth/tags/pull-s390-20170613' into
staging (2017-06-15 13:45:15 +0100)
are available in the git repository at:
git://repo.or.cz/qemu/armbru.git tags/pull-qapi-2017-06-09-v2
for
From: Marc-André Lureau
TYPE_ISA_FDC's property "iobase" is defined with DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-31-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
From: Marc-André Lureau
The tests aren't really useful, or already covered by other simple tests.
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-9-marcandre.lur...@redhat.com>
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
tests/check-qdict.c | 9 +
From: Marc-André Lureau
Remove dependency on qapi qtype, replace a field by a few PropertyInfo
callbacks to set the default value type (introduced in commit 4f2d3d7).
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
Message-Id: <20170607163635.17635-2-marcandre.lur...@redhat.com
From: Marc-André Lureau
TYPE_HPET's property HPET_INTCAP is defined with DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-33-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
From: Marc-André Lureau
Those properties use visit_type_uint*()
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-30-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/i386/acpi-build.c | 24
1 file changed, 12 insertions(+), 12 dele
From: Marc-André Lureau
PIIX4: piix4_pm_add_propeties() defines these with
object_property_add_uint*_ptr().
Q35: ich9_lpc_add_properties() and ich9_pm_add_properties() define them
similarly, except for ACPI_PM_PROP_GPE0_BLK(). That one's getter
ich9_pm_get_gpe0_blk() uses visit_type_uint32().
From: Marc-André Lureau
Switch to use QNum/uint where appropriate to remove i64 limitation.
The input visitor will cast i64 input to u64 for compatibility
reasons (existing json QMP client already use negative i64 for large
u64, and expect an implicit cast in qemu).
Note: before the patch, uint
From: Marc-André Lureau
In order to store integer values between INT64_MAX and UINT64_MAX, add
a uint64_t internal representation.
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
Message-Id: <20170607163635.17635-10-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
From: Marc-André Lureau
This is an alias of TYPE_PNV_CORE's property "pir", which is defined
with DEFINE_PROP_UINT32()
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-38-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/ppc/pnv_core.c | 2 +-
1 file chang
From: Marc-André Lureau
Switch strtoll() usage to qemu_strtoi64() helper while at it.
Add a few tests for large numbers.
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-11-marcandre.lur...@redhat.com>
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
---
qob
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Reviewed-by: Markus Armbruster
Message-Id: <20170607163635.17635-13-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
include/qom/object.h | 23 +++
qom/object.c | 29 +
From: Marc-André Lureau
The property is defined with DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-21-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
include/hw/isa/isa.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Suggested-by: Markus Armbruster
Reviewed-by: Markus Armbruster
Message-Id: <20170607163635.17635-42-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
tests/check-qdict.c | 7 +++
1 file changed, 7 insertions(+)
dif
From: Marc-André Lureau
Both properties are defined with DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-26-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/arm/bcm2835_peripherals.c | 9 -
hw/arm/raspi.c | 4 +
From: Marc-André Lureau
The property is defined with object_property_add_uint32_ptr()
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-24-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/acpi/pcihp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletion
From: Marc-André Lureau
TYPE_PC_MACHINE's property PC_MACHINE_MAX_RAM_BELOW_4G's getter and
setter pc_machine_get_max_ram_below_4g() and
pc_machine_set_max_ram_below_4g() use visit_type_size()
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-34-marcandre.lur...@redhat.com>
Sig
From: Marc-André Lureau
The rename prepares for the patch after next's DEFINE_PROP_UNSIGNED().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-16-marcandre.lur...@redhat.com>
Reviewed-by: Markus Armbruster
[Commit message tweaked]
Signed-off-by: Markus Armbruster
---
hw/bl
From: Marc-André Lureau
Wrap the Property default value (an int64_t) in a union, to prepare
for the next patch adding a uint64_t.
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-17-marcandre.lur...@redhat.com>
Reviewed-by: Markus Armbruster
Signed-off-by: Markus Armbruster
From: Marc-André Lureau
This property is an alias for device TYPE_ASPEED_SDMC's property
"ram-size", which is defined with DEFINE_PROP_UINT64().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-25-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/arm/aspee
From: Marc-André Lureau
This is TYPE_MEMORY_REGION's property. Its getter
memory_region_get_addr() uses visit_type_uint64().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-27-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/core/platform-bus.c | 2 +-
From: Marc-André Lureau
TYPE_PC_DIMM's property PC_DIMM_ADDR_PROP is defined with
DEFINE_PROP_UINT64().
TYPE_PC_DIMM's property PC_DIMM_NODE_PROP is defined with
DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-22-marcandre.lur...@redhat.com>
Signed-off-
From: Marc-André Lureau
Those are defined with object_property_add_uint16_ptr()
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-28-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/i386/acpi-build.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-
From: Marc-André Lureau
Modify the unsigned type for various properties to use QNUM_U64, to
avoid type casts.
There are a few empty lines added to improve code reading/style.
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-18-marcandre.lur...@redhat.com>
Reviewed-by: Markus
From: Marc-André Lureau
Based on the underlying type of the data accessed, use the appropriate
getters/setters:
* AcpiPmInfo members s3_disabled, s4_disabled are bool, member s4_val is
an uint8_t
* Property ACPI_PCIHP_IO_PROP is defined with
object_property_add_uint32_ptr()
* Property PCIE
From: Marc-André Lureau
Before the previous commit, parameter promote_int = true made
visit_start_alternate() with an input visitor avoid QTYPE_QINT
variants and create QTYPE_QFLOAT variants instead. This was used
where QTYPE_QINT variants were invalid.
The previous commit fused QTYPE_QINT with
From: Marc-André Lureau
TYPE_X86_CPU's property "apic-id" is defined with DEFINE_PROP_UINT32().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-32-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deleti
From: Marc-André Lureau
TYPE_QEMU_CONSOLE property "head" is defined with
object_property_add_uint*_ptr().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-41-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
ui/console.c | 4 ++--
1 file changed, 2 insertion
From: Marc-André Lureau
This carries the memory_region_size() value without implicit cast.
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-23-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/acpi/memory_hotplug.c | 5 +++--
hw/acpi/nvdimm.c | 8
From: Marc-André Lureau
The getter and setter of TYPE_APIC_COMMON property "id" are
apic_common_get_id() and apic_common_set_id().
apic_common_get_id() reads either APICCommonState member uint32_t
initial_apic_id or uint8_t id into an int64_t local variable. It then
passes this variable to visi
On 20.06.2017 14:35, David Hildenbrand wrote:
> One step into the direction of adding the DAT-enhancement facility.
>
> To improve the TLB flushing, we will have to remember each used table (or
> at least a hash!) for each tlb entry, just like real HW does.
>
> idte is pretty much untested, befor
From: Marc-André Lureau
These are properties of TYPE_X86_CPU, defined with DEFINE_PROP_UINT32()
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-40-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
target/i386/cpu.c | 4 ++--
1 file changed, 2 insertions(+),
From: Marc-André Lureau
This is TYPE_MEMORY_REGION's property. Its getter
memory_region_get_addr() uses visit_type_uint64().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-36-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/misc/auxbus.c | 2 +-
1 file
On 19 June 2017 at 11:46, Alex Bennée wrote:
> We also include the an Emacs .dir-locals (as per QEMU) that enforces
> this layout.
>
> Signed-off-by: Alex Bennée
> ---
> .dir-locals.el | 2 ++
> README | 9 +
> 2 files changed, 11 insertions(+)
> create mode 100644 .dir-locals.e
From: Marc-André Lureau
TYPE_ISA_PVPANIC_DEVICE's property PVPANIC_IOPORT_PROP is defined with
DEFINE_PROP_UINT16().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-37-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/misc/pvpanic.c | 2 +-
1 file changed
From: Marc-André Lureau
"size" is a property of TYPE_MEMORY_BACKEND.
host_memory_backend_get_size() and host_memory_backend_set_size() use
visit_type_size().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-39-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
We already have functions for doing these calculations, so let's use
them instead of doing everything by hand. This makes the code a bit
more readable.
Signed-off-by: Alberto Garcia
---
block/qcow2-cluster.c | 4 ++--
block/qcow2.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
From: Marc-André Lureau
TYPE_ARM_CPU's property "mp-affinity" is defined with
DEFINE_PROP_UINT64().
Signed-off-by: Marc-André Lureau
Message-Id: <20170607163635.17635-35-marcandre.lur...@redhat.com>
Signed-off-by: Markus Armbruster
---
hw/intc/arm_gicv3_common.c | 2 +-
1 file changed, 1 inse
On 19 June 2017 at 11:46, Alex Bennée wrote:
> This is pretty much a mechanical change where I ran:
>
> indent -kr
>
> Across all the files and then fixed up all but a few violations of:
>
> ../../qemu.git/scripts/checkpatch.pl -f *.c *.h > checkpatch.out
>
> Along with heavy use of M-x untabi
On 19/06/2017 19:05, Greg Kurz wrote:
> Commit c783b0012708 ("ppc: Rework CPU compatibility testing across
> migration") added a subsection to the vmstate description of CPUs.
> This subsection is sent when the CPU compat_pvr field is non-zero,
> which is likely to happen after CAS negociation (sin
From: Marc-André Lureau
We would like to use a same QObject type to represent numbers, whether
they are int, uint, or floats. Getters will allow some compatibility
between the various types if the number fits other representations.
Add a few more tests while at it.
Signed-off-by: Marc-André Lur
On Mon, Jun 19, 2017 at 01:17:39PM -0300, Eduardo Habkost wrote:
> On Mon, Jun 19, 2017 at 08:49:39PM +0800, Peter Xu wrote:
> > Introduce this new field for the accelerator instances so that each
> > specific accelerator in the future can register its own global
> > properties to be used further b
On 19 June 2017 at 11:46, Alex Bennée wrote:
> When debugging faults it is useful to know where the generated
> instructions are living.
>
> Signed-off-by: Alex Bennée
>
> --
Separator should be '---'.
> v5
> - dropped all the status update due to signal handler contraints
> v3
> - use port
On 19 June 2017 at 11:46, Alex Bennée wrote:
> This is a precursor to record/playback support. Instead of passing the
> socket fd we now pass helper functions for reading/writing and
> responding. This will allow us to do the rest of the record/playback
> cleanly outside of the main worker functio
On Tue, Jun 20, 2017 at 09:20:36PM +0800, Peter Xu wrote:
> On Mon, Jun 19, 2017 at 01:17:39PM -0300, Eduardo Habkost wrote:
> > On Mon, Jun 19, 2017 at 08:49:39PM +0800, Peter Xu wrote:
> > > Introduce this new field for the accelerator instances so that each
> > > specific accelerator in the futu
If grant copy is available then it will always be used in preference to
persistent maps. In this case feature-persistent should not be advertized
to the frontend, otherwise it may needlessly copy data into persistently
granted buffers.
Signed-off-by: Paul Durrant
---
Cc: Stefano Stabellini
Cc: A
The blkif protocol has had provision for negotiation of multi-page shared
rings for some time now and many guest OS have support in their frontend
drivers.
This patch makes the necessary modifications to xen-disk support a shared
ring up to order 4 (i.e. 16 pages).
Signed-off-by: Paul Durrant
--
This patch allocates an IOThread object for each xen_disk instance and
sets the AIO context appropriately on connect. This allows processing
of I/O to proceed in parallel.
The patch also adds tracepoints into xen_disk to make it possible to
follow the state transtions of an instance in the log.
S
Paul Durrant (3):
xen-disk: only advertize feature-persistent if grant copy is not
available
xen-disk: add support for multi-page shared rings
xen-disk: use an IOThread per instance
hw/block/trace-events | 7 ++
hw/block/xen_disk.c | 200 -
Peter Maydell writes:
> On 19 June 2017 at 11:46, Alex Bennée wrote:
>> This is a precursor to record/playback support. Instead of passing the
>> socket fd we now pass helper functions for reading/writing and
>> responding. This will allow us to do the rest of the record/playback
>> cleanly out
On Mon, Jun 19, 2017 at 01:14:03PM -0300, Eduardo Habkost wrote:
> On Mon, Jun 19, 2017 at 08:49:41PM +0800, Peter Xu wrote:
> > Let KVM be the first user of the new AccelState.global_props field.
> > Basically kvm accel only contains accel props for TYPE_X86_CPUs but not
> > anything else yet.
> >
On 19 June 2017 at 11:46, Alex Bennée wrote:
> I've also added a header packet with pc/risu op in it so we can keep
> better track of how things are going.
>
> Signed-off-by: Alex Bennée
>
> ---
> v5
> - re-base without formatting fixes
> - dropped fprintfs in signal context
> v4
> - split
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