"Daniel P. Berrange" writes:
> Previous commit moved 'opaque' to be the 2nd parameter in the list:
>
> commit 375092332eeaa6e47561ce47fd36144cdaf964d0
> Author: Fam Zheng
> Date: Fri Apr 21 20:27:02 2017 +0800
>
> crypto: Make errp the last parameter of functions
>
> Move opaque
Stefano Stabellini writes:
> On Mon, 24 Apr 2017, Peter Maydell wrote:
>> On 24 April 2017 at 22:25, Stefano Stabellini wrote:
>> > diff --git a/hw/9pfs/xen-9pfs.h b/hw/9pfs/xen-9pfs.h
>> > new file mode 100644
>> > index 000..18f0ec0
>> > --- /dev/null
>> > +++ b/hw/9pfs/xen-9pfs.h
>> > @@
Network dumping should be done with "-object filter-dump" nowadays.
Using "-net dump" via the VLAN mechanism is considered as deprecated
and might be removed in a future release. So warn the users now
to inform them to user the filter-dump method instead.
Signed-off-by: Thomas Huth
---
net/dump.
This paves the way for upcoming changes.
Signed-off-by: Emilio G. Cota
---
cpu-exec.c | 19 +++
include/exec/exec-all.h | 2 +-
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 63a56d0..b4adf16 100644
--- a/cpu-exec.c
+++
The inline improves performance, as shown in upcoming commits' logs.
This commit is kept separate to ease review, since the inclusion
of tb-hash.h might be controversial. The problem here, which was
introduced before this commit, is that tb_hash_func() depends on
page_addr_t: this defeats the orig
This helper will be used by subsequent commits.
Signed-off-by: Emilio G. Cota
---
target/i386/translate.c | 28 +++-
1 file changed, 23 insertions(+), 5 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 1d1372f..445082b 100644
--- a/target
This will allow us to prevent cache line false sharing in TCGContext.
Before:
$ objdump -t build/x86_64-linux-user/qemu-x86_64 | grep tcg_ctx
003ea820 g O .bss 000152d8 tcg_ctx
After:
$ objdump -t build/x86_64-linux-user/qemu-x86_64 | grep tcg_ctx
003e
v1 for context:
https://lists.gnu.org/archive/html/qemu-devel/2017-04/msg02021.html
This series is aimed at 2.10 or beyond. Its goal is to improve
TCG code execution performance by optimizing:
1- Cross-page direct jumps (softmmu only, obviously)
2- Indirect branches (both softmmu and user-mode)
Signed-off-by: Emilio G. Cota
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.inc.c | 13 +
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 59d9835..73a15f7 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/
Speed up indirect branches by directly jumping to the target
if it is valid, i.e. if it is found in tb_jmp_cache.
Softmmu measurements: (see later commit for user-mode results)
Note: baseline (i.e. speedup == 1x) is QEMU v2.9.0.
- Impact on Boot time
| setup | ARM debian boot+shutdown t
Instead of unconditionally exiting to the exec loop, use the
gen_jr helper to jump to the target if it is valid.
As long as the hit rate in tb_jmp_cache remains high, this
change improves performance.
Perf impact: see the next commit's log.
Signed-off-by: Emilio G. Cota
---
target/i386/transla
Optimizations to cross-page chaining and indirect branches make
performance more sensitive to the hit rate of tb_jmp_cache.
The constraint of reserving some bits for the page number
lowers the achievable quality of the hashing function.
However, user-mode does not have this requirement. Thus,
with
Signed-off-by: Emilio G. Cota
---
tcg-runtime.c | 7 +++
tcg/tcg-runtime.h | 2 ++
tcg/tcg.h | 1 +
3 files changed, 10 insertions(+)
diff --git a/tcg-runtime.c b/tcg-runtime.c
index 4c60c96..f291184 100644
--- a/tcg-runtime.c
+++ b/tcg-runtime.c
@@ -141,6 +141,13 @@ uint64_t HEL
+ Andrea Arcangeli
On Mon, Apr 24, 2017 at 06:10:02PM +0100, Dr. David Alan Gilbert wrote:
> * Alexey (a.pereva...@samsung.com) wrote:
> > On Mon, Apr 24, 2017 at 04:12:29PM +0800, Peter Xu wrote:
> > > On Fri, Apr 21, 2017 at 06:22:12PM +0300, Alexey wrote:
> > > > On Fri, Apr 21, 2017 at 11:24:5
Instead of unconditionally exiting to the exec loop, use the
lookup_tb_ptr helper to jump to the target if it is valid.
As long as the hit rate in tb_jmp_cache remains high, this
will improve performance.
Perf impact: see the next commit's log.
Signed-off-by: Emilio G. Cota
---
target/arm/trans
On 2017/4/24 15:59, Kashyap Chamarthy wrote:
On Sat, Apr 22, 2017 at 05:23:49PM +0800, Hailiang Zhang wrote:
Hi,
Hi Hailiang,
I think the bellow patch can fix your problme.
[PATCH 2/4] qmp-cont: invalidate on RUN_STATE_PRELAUNCH
https://patchwork.kernel.org/patch/9591885/
Hmm, the above patc
Signed-off-by: Emilio G. Cota
---
tcg/README | 11 +++
tcg/aarch64/tcg-target.h | 1 +
tcg/arm/tcg-target.h | 1 +
tcg/i386/tcg-target.h| 1 +
tcg/ia64/tcg-target.h| 1 +
tcg/mips/tcg-target.h| 1 +
tcg/ppc/tcg-target.h | 1 +
tcg/s390/tcg-target.h
The appended minimizes exits to the exec loop for indirect branches.
By using the gen_jr helper, we can remain in TCG mode as long as
the indirect branch target is found in tb_jmp_cache.
This should improve performance for workloads that have a high
hit rate in tb_jmp_cache.
Softmmu Measurements:
Upcoming changes will require reading from TCGContext from a
parallel fast path. Prepare for this by keeping the struct's
read-mostly fields in a separate cache line, thereby preventing
false cache line sharing.
Signed-off-by: Emilio G. Cota
---
tcg/tcg.h | 23 ++-
1 file cha
If the user needs to specify the disk geometry, the corresponding
parameters of the "-drive" option should be used instead. "-hdachs"
is considered as deprecated and might be removed soon.
Signed-off-by: Thomas Huth
---
vl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/vl.c b/vl.c
index
On 25 April 2017 at 04:24, G 3 wrote:
> Print the message "End of test" on the risu host end.
>
> Signed-off-by: John Arbuckle
> ---
> risu.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/risu.c b/risu.c
> index ed5b605..e7cbd57 100644
> --- a/risu.c
> +++ b/risu.c
> @@ -63,6 +63,7 @@
On 25 April 2017 at 04:18, G 3 wrote:
> Add the risu_ppc.c file. It defines several functions used by risu.
>
> Signed-off-by: John Arbuckle
> ---
> risu_ppc.c | 41 +
> 1 file changed, 41 insertions(+)
> create mode 100644 risu_ppc.c
>
> diff --git a/ris
On 25 April 2017 at 04:17, G 3 wrote:
> Add the ppc.risu file. It defines the format for various PowerPC
> instructions.
>
> Signed-off-by: John Arbuckle
> ---
> ppc.risu | 527
> +++
> 1 file changed, 527 insertions(+)
> create mode 1
On 25 April 2017 at 04:19, G 3 wrote:
> Add the risu_reginfo_ppc.c file. It handles operations involving the reginfo
> structure.
> +/* check each floating point register */
> +for (i = 0; i < NUMBER_OF_FPR; i++) {
> +if (r1->fpr[i] != r2->fpr[i]) {
> +if (!(isnan(r1->
On Fri, Apr 14, 2017 at 04:17:18PM +0300, Alexey Perevalov wrote:
[...]
> +/*
> + * This function calculates downtime per cpu and trace it
> + *
> + * Also it calculates total downtime as an interval's overlap,
> + * for many vCPU.
> + *
> + * The approach is following:
> + * Initially interv
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1289898
Title:
qemu-system-ppc64 easily cause file corruption
Status in QEMU:
Incomplete
Bug d
Can you still reproduce this issue with the latest version of QEMU
(currently version 2.9)?
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1288620
On 25 April 2017 at 04:18, G 3 wrote:
> Add the risu_ppc.c file. It defines several functions used by risu.
>
> Signed-off-by: John Arbuckle
> ---
> risu_ppc.c | 41 +
> 1 file changed, 41 insertions(+)
> create mode 100644 risu_ppc.c
>
> diff --git a/ris
Travis builds failure was reported for powernv boot-serial test with
qemu built with clang.
Debugging revealed that CONFIG_ATOMIC64 wasnt getting set for the clang
build because of that atomic operations weren't being used and was
resulting in MTTCG failure in the powernv boot-serial test.
libato
On 2017年04月24日 14:03, Hailiang Zhang wrote:
On 2017/4/24 12:10, Jason Wang wrote:
On 2017年04月20日 15:46, zhanghailiang wrote:
We call qemu_chr_fe_set_handlers() in colo-compare thread, it is used
to detach watched fd from default main context, so it has chance to
handle the same watched fd wi
On 25 April 2017 at 09:35, Nikunj A Dadhania wrote:
> Travis builds failure was reported for powernv boot-serial test with
> qemu built with clang.
>
> Debugging revealed that CONFIG_ATOMIC64 wasnt getting set for the clang
> build because of that atomic operations weren't being used and was
> res
Peter Maydell writes:
> On 25 April 2017 at 09:35, Nikunj A Dadhania
> wrote:
>> Travis builds failure was reported for powernv boot-serial test with
>> qemu built with clang.
>>
>> Debugging revealed that CONFIG_ATOMIC64 wasnt getting set for the clang
>> build because of that atomic operation
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> Signed-off-by: Juan Quintela
>> ---
>> migration/savevm.c | 17 -
>> migration/vmstate.c | 16
>> 2 files changed, 16 insertions(+), 17 deletions(-)
>
> OK, but it's a little odd,
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> Signed-off-by: Juan Quintela
>> ---
>> include/migration/migration.h | 8
>> include/migration/socket.h| 25 +
>> migration/migration.c | 1 +
>> migration/socket.c
On 25 April 2017 at 09:58, Nikunj A Dadhania wrote:
> I was trying out the program in the configure script with clang and I do
> get errors without libatomic:
>
> $ clang /tmp/atomic.c
> /tmp/atomic.c:6:7: warning: implicit declaration of function
> '__atomic_load_8' is invalid in C99 [-W
On Tue, Apr 25, 2017 at 09:30:13AM +0200, Markus Armbruster wrote:
> "Daniel P. Berrange" writes:
>
> > Previous commit moved 'opaque' to be the 2nd parameter in the list:
> >
> > commit 375092332eeaa6e47561ce47fd36144cdaf964d0
> > Author: Fam Zheng
> > Date: Fri Apr 21 20:27:02 2017 +08
On Mon, Apr 24, 2017 at 09:10:22PM +0200, Markus Armbruster wrote:
> With 2.9 out of the way, how can we make progress on this one?
>
> I can see two ways to get asynchronous QMP commands accepted:
>
> 1. We break QMP compatibility in QEMU 3.0 and convert all long-running
>tasks from "synchro
Peter Maydell writes:
> On 25 April 2017 at 09:58, Nikunj A Dadhania
> wrote:
>> I was trying out the program in the configure script with clang and I do
>> get errors without libatomic:
>>
>> $ clang /tmp/atomic.c
>> /tmp/atomic.c:6:7: warning: implicit declaration of function
>> '__a
Hi all; I'm taking a break during May and won't be reading work
emails during that time. Alex Bennée has volunteered to look after
ARM patches, and Stefan Hajnoczi has agreed to handle applying
pull requests. People working on ARM related patches can also
help each other out by reviewing each other
* Thomas Huth (th...@redhat.com) wrote:
> HMP commands do not get any automatic testing yet, so on certain
> QEMU machines, some HMP commands were causing crashes in the past.
> Thus we should test HMP commands in our test suite, too, to avoid
> that such problems creep in again in the future.
>
>
On 25 April 2017 at 10:16, Nikunj A Dadhania wrote:
> Peter Maydell writes:
>
>> On 25 April 2017 at 09:58, Nikunj A Dadhania
>> wrote:
>>> /tmp/atomic-1660e0.o: In function `main':
>>> /tmp/atomic.c:(.text+0x28): undefined reference to `__atomic_load_8'
>>> /tmp/atomic.c:(.text+0x4
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> Signed-off-by: Juan Quintela
>> ---
>> include/migration/migration.h | 36 -
>> include/migration/ram.h | 54
>> +++
>> migration/migration
On 04/25/2017 10:35 AM, Nikunj A Dadhania wrote:
if compile_prog "" "" ; then
atomic128=yes
+ elif compile_prog "" "-latomic" ; then
+ atomic128=yes
+ lib_atomic="-latomic"
fi
This is a problem, because I think you'll find that gcc now advertises
CONFIG_ATOMIC128 for *al
CC: "Michael S. Tsirkin"
CC: Paolo Bonzini
CC: Richard Henderson
CC: Eduardo Habkost
Signed-off-by: Peter Xu
---
hw/i386/pc_piix.c| 15 ---
hw/i386/pc_q35.c | 13 +++--
include/hw/i386/pc.h | 3 +++
3 files changed, 26 insertions(+), 5 deletions(-)
diff --git a/h
On Mon, Apr 24, 2017 at 05:19:48PM -0400, John Snow wrote:
>
>
> On 04/23/2017 05:03 AM, Ashijeet Acharya wrote:
> > Hi,
> >
> > Great news!
> > I have almost completed this task and the results are looking
> > promising. I have not yet attended to the DMG files having bz2
> > compressed chunks
On 04/24/2017 10:25 AM, Alexander Graf wrote:
On 24.04.17 00:32, Aurelien Jarno wrote:
From: Philipp Kern
According to "CPU Signaling and Response", "Signal-Processor Orders",
the order field is bit position 56-63. Without this, the Linux
guest kernel is sometimes unable to stop emulation an
Am 24.04.2017 um 22:13 schrieb Anton Nefedov:
On 24/04/2017 21:16, Peter Lieven wrote:
Am 24.04.2017 um 18:27 schrieb Anton Nefedov :
On 04/21/2017 03:37 PM, Peter Lieven wrote:
Am 21.04.2017 um 14:19 schrieb Anton Nefedov:
On 04/21/2017 01:44 PM, Peter Lieven wrote:
Am 21.04.2017 um 12
On 2017/4/25 16:41, Jason Wang wrote:
On 2017年04月24日 14:03, Hailiang Zhang wrote:
On 2017/4/24 12:10, Jason Wang wrote:
On 2017年04月20日 15:46, zhanghailiang wrote:
We call qemu_chr_fe_set_handlers() in colo-compare thread, it is used
to detach watched fd from default main context, so it has ch
Hi Alistair,
On Mon, Apr 24, 2017 at 11:23 PM, Alistair Francis wrote:
>>>
>>> Instead of calling all of these in the init function you should split
>>> it up over the machines init and realize function.
>>>
>>> Look at the stm32f205_soc or xlnx-zynqmp files for examples of how to do
>>> this.
>
Hi Alistair and Peter,
On Mon, Apr 24, 2017 at 11:28 PM, Peter Maydell
wrote:
> On 24 April 2017 at 18:44, Alistair Francis wrote:
>> Basically the simple explanation is that init is called when the
>> object is created and realize is called when the object is realized.
>>
>> Generally for devic
On 04/23/2017 11:54 PM, Stafford Horne wrote:
The OpenRISC architecture has the Power Management Register (PMR)
special purpose register to manage cpu power states. The interesting
modes are:
* Doze Mode (DME) - Stop cpu except timer & pic - wake on interrupt
* Sleep Mode (SME) - Stop cpu a
On 04/25/2017 11:24 AM, Peter Xu wrote:
On Fri, Apr 14, 2017 at 04:17:18PM +0300, Alexey Perevalov wrote:
[...]
+/*
+ * This function calculates downtime per cpu and trace it
+ *
+ * Also it calculates total downtime as an interval's overlap,
+ * for many vCPU.
+ *
+ * The approach is follo
Hi
Make postcopy_chunk_hostpages work at ramblock level, so we don't do
the double look over ramblocks. Tested that postcopy still works as
expected.
Later, Juan.
[v3]
I messed up previous submission and sent the wrong patch.
- This verios is a rebase on top of the ramstate series
- Fixed the
Both the ram bitmap and the unsent bitmap are split by RAMBlock.
Signed-off-by: Juan Quintela
---
include/exec/ram_addr.h | 13 +-
include/migration/postcopy-ram.h | 3 -
migration/postcopy-ram.c | 5 +-
migration/ram.c | 257 +++
On 24 April 2017 at 20:19, Jeff Cody wrote:
> The following changes since commit 4c55b1d0bad8a703f0499fe62e3761a0cd288da3:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2017-04-24'
> into staging (2017-04-24 14:49:48 +0100)
>
> are available in the git repository at:
>
> gi
Hi
This are independent of all my series, so send then here.
- check_migratable needs to now about objects, device class, etc, that
migration code don't care. So move it to qdev.c.
- to_dst_file is set to NULL before this call, just remove it. Long
term idea is that nothing outside migrati
We have just arrived as:
migration.c: qemu_migrate()
s = migrate_init() <- puts it to NULL
{tcp,unix}_start_outgoing_migration ->
socket_outgoing_migration
migration_channel_connect()
sets to_dst_file
if tls is enabled, we do another round through
migrate
The function is only used once, and nothing else in migration knows
about objects. Create the function vmstate_device_is_migratable() in
savem.c that really do the bit that is related with migration.
Signed-off-by: Juan Quintela
---
hw/core/qdev.c| 15 ++-
include/mi
Am 24.04.2017 um 21:10 hat Markus Armbruster geschrieben:
> With 2.9 out of the way, how can we make progress on this one?
>
> I can see two ways to get asynchronous QMP commands accepted:
>
> 1. We break QMP compatibility in QEMU 3.0 and convert all long-running
>tasks from "synchronous comm
It is a monitor command, and has nothing migration specific in it.
Signed-off-by: Juan Quintela
---
hmp.c | 5 +
hmp.h | 1 +
include/sysemu/sysemu.h | 1 -
migration/savevm.c | 5 -
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/h
Hi
This series:
- Move snapshots commands to hmp.c, as they don't have code for migration
- Make them work with errors in a modern way instead of writting to the monitor
- make paolo happy and use hmp_handle_error
Later, Juan.
Juan Quintela (6):
monitor: Remove monitor parameter from save_vmst
load_vmstate() already use error_report, so be consistent. There is
an identical error message in load_vmstate() that ends in a
period. Remove it.
Signed-off-by: Juan Quintela
---
include/sysemu/sysemu.h | 2 +-
migration/savevm.c | 20 ++--
replay/replay-snapshot.c | 2
We are going to move the rest of hmp snapshots functions there instead
of monitor.c.
Signed-off-by: Juan Quintela
---
hmp.c | 13 +
hmp.h | 1 +
monitor.c | 13 -
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/hmp.c b/hmp.c
index ab407d6..f6b873
It really uses block/* stuff, not migration one.
Signed-off-by: Juan Quintela
---
hmp.c | 13 +
hmp.h | 1 +
include/sysemu/sysemu.h | 1 -
migration/savevm.c | 13 -
4 files changed, 14 insertions(+), 14 deletions(-)
diff --git
It only uses block/* functions, nothing from migration.
Signed-off-by: Juan Quintela
---
hmp.c | 143 ++
hmp.h | 1 +
include/sysemu/sysemu.h | 1 -
migration/savevm.c | 147 -
This way we use the "normal" way of printing errors for hmp commands.
--
Paolo suggestion
Signed-off-by: Juan Quintela
---
hmp.c| 9 +++--
include/sysemu/sysemu.h | 4 ++--
migration/savevm.c | 51
replay/replay-s
On Tue, Apr 25, 2017 at 01:10:30PM +0300, Alexey Perevalov wrote:
> On 04/25/2017 11:24 AM, Peter Xu wrote:
> >On Fri, Apr 14, 2017 at 04:17:18PM +0300, Alexey Perevalov wrote:
> >
> >[...]
> >
> >>+/*
> >>+ * This function calculates downtime per cpu and trace it
> >>+ *
> >>+ * Also it calculate
Not used anymore after moving block migration to use capabilities.
Signed-off-by: Juan Quintela
---
include/migration/migration.h | 10 ++
include/migration/vmstate.h | 1 -
include/qemu/typedefs.h | 1 -
include/sysemu/sysemu.h | 3 +--
migration/colo.c |
Hi
Upon a time there were MigrationParms (only used for block migration)
and then MigrationParams used for everything else. This series:
- create migration capabilities for block parameters
- make the migrate command line parameters to use capabilities
- remove MigrationParams completely
Please
Those two capabilities were added through the command line. Notice that
we just created them. This is just the boilerplate.
Signed-off-by: Juan Quintela
Reviewed-by: Eric Blake
---
include/migration/migration.h | 3 +++
migration/migration.c | 36
We have change in the previous patch to use migration capabilities for
it. Notice that we continue using the old command line flags from
migrate command from the time being. Remove the set_params method as
now it is empty.
Signed-off-by: Juan Quintela
---
include/migration/migration.h | 3 +--
Hi Alistair,
On Mon, Apr 24, 2017 at 11:14 PM, Alistair Francis wrote:
+
+isr = !!(st->regs[R_RIS] & TIMER_RIS_ACK);
+ier = !!(st->regs[R_CTRL] & TIMER_CTRL_INTR);
+
+qemu_set_irq(st->irq, (ier && isr));
+}
+
+static uint64_t
+timer_read(vo
From: Thomas Huth
Some tests need to run single tests for every available machine of the
current QEMU binary. To avoid code duplication, let's extract this
code that deals with 'query-machines' into a separate function.
Signed-off-by: Thomas Huth
Message-Id: <1490860207-8302-3-git-send-email-th
b.com/dagrh/qemu.git tags/pull-hmp-20170425
for you to fetch changes up to 1eb8e78dd1cd4e0b4170fd42f6d8882c867f334b:
tests: Add a tester for HMP commands (2017-04-25 11:26:52 +0100)
HMP pull with fi
From: Thomas Huth
HMP commands do not get any automatic testing yet, so on certain
QEMU machines, some HMP commands were causing crashes in the past.
Thus we should test HMP commands in our test suite, too, to avoid
that such problems creep in again in the future.
Signed-off-by: Thomas Huth
Mes
From: Thomas Huth
When running certain HMP commands (like "device_del") via QMP, we
can sometimes get a QMP event in the response first, so that the
"g_assert(ret)" statement in qtest_hmp() triggers and the test
fails. Fix this by ignoring such QMP events while looking for the
real return value f
From: Paolo Bonzini
These commands are useful when testing machine-check passthrough.
gpa2hva is useful to inject a MADV_HWPOISON madvise from gdb, while
gpa2hpa is useful to inject an error with the mce-inject kernel
module.
Signed-off-by: Paolo Bonzini
Message-Id: <1490021158-4469-1-git-send-
Users of tcg_gen_atomic_cmpxchg and do_atomic_op rightfully utilize
the output. Even though this code is dead, it gets translated, and
without the initialization we encounter a tcg_error.
Reported-by: Nikunj A Dadhania
Signed-off-by: Richard Henderson
---
tcg/tcg-op.c | 6 ++
1 file change
From: Farhan Ali
LOADPARM has two copies:
1. in SCP Information Block
2. in IPL Information Parameter Block
So, update SCLP intrinsics now. We always store LOADPARM in SCP
information block even if we don't have a valid IPL Information
Parameter Block.
Initial patch from Eugene (jno) Dvurechens
This patchset implements the LOADPARM machine property. This is
exposed via SCLP and diagnose 308 to the guest. It will be used
by the bios to select a boot entry; guest operating systems can
use it as well.
Cornelia Huck (1):
pc-bios/s390-ccw.img: update image
Eugene (jno) Dvurechenski (2):
From: Farhan Ali
In order to specify the LOADPARM value one may now add ",loadparm=xxx"
parameter to the "-machine s390-ccw-virtio" option.
The property setter will normalize and check the value provided much
like the way the HMC does.
The value is stored, but not used at the moment.
Initial p
From: Farhan Ali
Obtain the loadparm value stored in SCP Read Info by performing
a SCLP Read Info request.
Rename sclp-ascii.c to sclp.c to reflect the changed scope of
the file.
Signed-off-by: Farhan Ali
Reviewed-by: Christian Borntraeger
Signed-off-by: Cornelia Huck
---
pc-bios/s390-ccw/M
From: "Eugene (jno) Dvurechenski"
Make the ebcdic_to_ascii function public to the rest of the
"bios" code, as the volume label is no more the single thing
to be converted.
Signed-off-by: Eugene (jno) Dvurechenski
Signed-off-by: Farhan Ali
Reviewed-by: Christian Borntraeger
Signed-off-by: Corn
From: Farhan Ali
The LOADPARM value is fetched from SCP Read Info, but it's applied
only at the phase of bootmap interpretation. So let's read the LOARPARM
value and store it. Also provide a parsing function to detect numbers in
the LOADPARM which can be used during bootmap interpretation.
Remov
From: Farhan Ali
Add S390CcwMachineState machine parameter "loadparm" to qemu machine_opts so
libvirt can query for it.
Signed-off-by: Farhan Ali
Signed-off-by: Cornelia Huck
---
util/qemu-config.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/util/qemu-config.c b/util/qemu-config
From: Farhan Ali
Insert the LOADPARM value to the IPL Information Parameter Block.
An IPL Information Parameter Block is created when "bootindex" is
specified for a device. If a user specifies "loadparm=", then we
store the loadparm value in the created IPIB for that boot device.
Initial patch
From: Farhan Ali
Fix SCSI bootmap interpreter to make use of any specified entry of the
Program Table using the leftmost numeric value from the LOADPARM, if specified.
Initial patch from Eugene (jno) Dvurechenski.
Signed-off-by: Eugene (jno) Dvurechenski
Signed-off-by: Farhan Ali
Reviewed-by:
Contains the following commits:
- pc-bios/s390-ccw: Make ebcdic/ascii conversion public
- pc-bios/s390-ccw: get LOADPARM stored in SCP Read Info
- pc-bios/s390-ccw: provide a function to interpret LOADPARM value
- pc-bios/s390-ccw: provide entry selection on LOADPARM for SCSI disk
- pc-bios/s390-c
From: Farhan Ali
1. change a bit definition of ScsiMbr to allow an array of pointers
2. add loadparm fetch to boot script processing
3. apply loadparm index to boot entry selection, if any
Initial patch from Eugene (jno) Dvurechenski.
Signed-off-by: Eugene (jno) Dvurechenski
Signed-off-by: Far
From: "Eugene (jno) Dvurechenski"
If there is no LOADPARM given or '0' specified, then IPL the first
matched entry. Otherwise IPL the matching entry of that number.
Signed-off-by: Eugene (jno) Dvurechenski
Signed-off-by: Farhan Ali
Reviewed-by: Christian Borntraeger
Signed-off-by: Cornelia Hu
On 04/25/2017 01:25 PM, Peter Xu wrote:
On Tue, Apr 25, 2017 at 01:10:30PM +0300, Alexey Perevalov wrote:
On 04/25/2017 11:24 AM, Peter Xu wrote:
On Fri, Apr 14, 2017 at 04:17:18PM +0300, Alexey Perevalov wrote:
[...]
+/*
+ * This function calculates downtime per cpu and trace it
+ *
+ * Al
Hi,
cc'ing Peter Wu in...
Currently I have completed the task for zlib, uncompressed and zeroed
chunks in a DMG file using the approach we discussed earlier.
Unfortunately, this approach is not appropriate for bz2 chunks since
we cannot restart our decompression from the access point we cached
si
On 04/25/2017 09:53 AM, Emilio G. Cota wrote:
The inline improves performance, as shown in upcoming commits' logs.
This commit is kept separate to ease review, since the inclusion
of tb-hash.h might be controversial. The problem here, which was
introduced before this commit, is that tb_hash_func
On 04/25/2017 09:53 AM, Emilio G. Cota wrote:
This will allow us to prevent cache line false sharing in TCGContext.
Before:
$ objdump -t build/x86_64-linux-user/qemu-x86_64 | grep tcg_ctx
003ea820 g O .bss 000152d8 tcg_ctx
After:
$ objdump -t build/x86_64-li
On 04/25/2017 09:53 AM, Emilio G. Cota wrote:
Signed-off-by: Emilio G. Cota
---
tcg-runtime.c | 7 +++
tcg/tcg-runtime.h | 2 ++
tcg/tcg.h | 1 +
3 files changed, 10 insertions(+)
Modulo what I mentioned earlier about maybe directly inlining tb_from_jmp_cache,
Reviewed-by
On 2017/4/25 2:18, Juan Quintela wrote:
zhanghailiang wrote:
For COLO FT, both the PVM and SVM run at the same time,
only sync the state while it needs.
So here, let SVM runs while not doing checkpoint, change
DEFAULT_MIGRATE_X_CHECKPOINT_DELAY to 200*100.
Besides, we forgot to release colo_c
On 04/25/2017 09:53 AM, Emilio G. Cota wrote:
@@ -1138,6 +1138,7 @@ void tcg_dump_ops(TCGContext *s)
}
switch (c) {
case INDEX_op_set_label:
+case INDEX_op_goto_tb:
case INDEX_op_br:
case INDEX_op_brcond_i32:
On 2017/4/25 2:27, Juan Quintela wrote:
zhanghailiang wrote:
We should not load PVM's state directly into SVM, because there maybe some
errors happen when SVM is receving data, which will break SVM.
We need to ensure receving all data before load the state into SVM. We use
an extra memory to c
On 04/25/2017 09:53 AM, Emilio G. Cota wrote:
Instead of unconditionally exiting to the exec loop, use the
lookup_tb_ptr helper to jump to the target if it is valid.
As long as the hit rate in tb_jmp_cache remains high, this
will improve performance.
Perf impact: see the next commit's log.
Sign
On 04/25/2017 09:53 AM, Emilio G. Cota wrote:
+
+gen_jr = false;
+gen_helper_lookup_tb_ptr(ptr, cpu_env, cpu_R[15]);
+tcg_gen_goto_ptr(ptr);
+tcg_temp_free_ptr(ptr);
+break;
Likewise doesn't compile for aarch64.
r
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