On 04/10/2017 07:44 AM, Peter Maydell wrote:
The excnames[] array is defined in internals.h because we used
to use it from two different source files for handling logging
of AArch32 and AArch64 exception entry. Refactoring means that
it's now used only in arm_log_exception() in helper.c, so move
On 04/10/2017 07:39 AM, Peter Maydell wrote:
We currently have two places that do:
if (dc->ss_active) {
gen_step_complete_exception(dc);
} else {
gen_exception_internal(EXCP_DEBUG);
}
Factor this out into its own function, as we
On 04/10/2017 07:39 AM, Peter Maydell wrote:
For M-profile CPUs, the BXJ instruction does not exist at all, and
the encoding should always UNDEF. We were accidentally implementing
it to behave like A-profile BXJ; correct the error.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Da
On 04/10/2017 07:39 AM, Peter Maydell wrote:
Move the utility routines gen_set_condexec() and gen_set_pc_im()
up in the file, as we will want to use them from a function
placed earlier in the file than their current location.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
Is this problem limited to commands or also to data attached to the commands?
To me looks like a limitation Qemu should remove on the long run.
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https://bugs.launchpad.net/bugs/1635339
T
On Fri, 7 Apr 2017 08:58:15 -0500
Eric Blake wrote:
> On 04/07/2017 06:18 AM, Cornelia Huck wrote:
> > From: Jing Liu
> >
> > This introduces basic support for TN3270, which needs to negotiate
> > three Telnet options during handshake:
> > - End of Record
> > - Binary Transmission
> > - T
On 5 April 2017 at 00:40, Alistair Francis wrote:
> Correct the buffer descriptor busy logic to work correctly when using
> multiple queues.
>
> Signed-off-by: Alistair Francis
> ---
>
> hw/net/cadence_gem.c | 18 +++---
> 1 file changed, 11 insertions(+), 7 deletions(-)
>
> diff --g
On 5 April 2017 at 00:40, Alistair Francis wrote:
> Signed-off-by: Alistair Francis
> ---
>
> hw/arm/xlnx-zynqmp.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index bc4e66b..e41b6fe 100644
> --- a/hw/arm/xlnx-zynqmp.
On 5 April 2017 at 00:40, Alistair Francis wrote:
> Read the correct descriptor instead of hardcoding the first (q=0).
>
> Signed-off-by: Alistair Francis
> ---
>
> hw/net/cadence_gem.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cad
Hi
On Mon, Apr 10, 2017 at 1:31 PM Gerd Hoffmann wrote:
> Cc: 1635...@bugs.launchpad.net
> Signed-off-by: Gerd Hoffmann
>
Reviewed-by: Marc-André Lureau
> ---
> hw/display/qxl.h | 1 +
> hw/display/qxl.c | 31 +++
> 2 files changed, 32 insertions(+)
>
> diff
On 5 April 2017 at 00:40, Alistair Francis wrote:
> Only trigger multi-queue GEM interrupts if the interrupt status register
> is set. This logic was already used for non multi-queue interrupts but
> it also applies to multi-queue interrupts.
>
> Signed-off-by: Alistair Francis
> ---
>
> hw/net/
On 5 April 2017 at 00:40, Alistair Francis wrote:
> Expose the Cadence GEM revision as a property.
>
> Signed-off-by: Alistair Francis
> ---
>
> hw/net/cadence_gem.c | 6 +-
> include/hw/net/cadence_gem.h | 1 +
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ne
On Mo, 2017-04-10 at 11:56 +, Frediano Ziglio wrote:
> Is this problem limited to commands or also to data attached to the commands?
Everything which contains QXLReleaseInfo and is released via release
ring.
> To me looks like a limitation Qemu should remove on the long run.
That is an optio
On 10 April 2017 at 11:22, Stefan Hajnoczi wrote:
> On Sat, Apr 08, 2017 at 11:09:47AM +0530, Ishani Chugh wrote:
>> Signed-off-by: Ishani Chugh
>> ---
>> target/arm/kvm64.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> Thanks for the patch!
>
> I have CCed Peter Maydell who m
On Thu, Apr 06, 2017 at 06:18:33PM +, Xu, Anthony wrote:
> > > --- a/kvm-all.c
> > > +++ b/kvm-all.c
> > > @@ -2232,6 +2232,10 @@ int kvm_has_sync_mmu(void)
> > > return kvm_check_extension(kvm_state, KVM_CAP_SYNC_MMU);
> > > }
> > >
> > > +int kvm_has_vapic(void){
> > > +return !kvm_
The following changes since commit 5fe2339e6b09da7d6f48b9bef0f1a7360392b489:
Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-20170406.0'
into staging (2017-04-07 10:29:56 +0100)
are available in the git repository at:
https://github.com/stsquad/qemu.git tags/pull-mttcg-fixu
From: Nikunj A Dadhania
While the configure script generates TARGET_SUPPORTS_MTTCG define, one
of the define is cpus.c is checking wrong name: TARGET_SUPPORT_MTTCG
Signed-off-by: Nikunj A Dadhania
Signed-off-by: Alex Bennée
diff --git a/cpus.c b/cpus.c
index 68fdbc40b9..58d90aa2b9 100644
---
We should never be running in multi-threaded mode with icount enabled.
There is no point calling handle_icount_deadline here so remove it and
assert !use_icount.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
diff --git a/cpus.c b/cpus.c
index 58d90aa2b9..fc0ddc8793 100644
--- a/cpus
Anything that calls into HW emulation must be protected by the BQL.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Acked-by: Eduardo Habkost
diff --git a/target/i386/misc_helper.c b/target/i386/misc_helper.c
index ca2ea09f54..628f64aad5 100644
--- a/target/i386/misc_helper.c
+++ b/t
Since QEMU has been able to build with native Int128 support this was
broken as it attempts to fish values out of the non-existent
structure. Also the alias print was trying to make a %x out of
gdb.ValueType directly which didn't seem to work.
Signed-off-by: Alex Bennée
diff --git a/scripts/qemu
As icount is only supported for single-threaded execution due to the
requirement for determinism let's remove it from the common
tcg_exec_cpu path.
Also remove the additional fiddling which shouldn't be required as the
icount counters should all be rectified as you enter the loop.
Signed-off-by:
The lifetime of current_cpu is now the lifetime of the vCPU thread.
However get_icount_raw() can apply a fudge factor if called while code
is running to take into account the current executed instruction
count.
To ensure this is always the case we also check cpu->running.
Signed-off-by: Alex Benn
This ensures each time the vCPU thread reads the icount we update the
master timer_state.qemu_icount field. This way as long as updates are
in BQL protected sections (which they should be) the main-loop can
never come to update the log and find time has gone backwards.
Signed-off-by: Alex Bennée
By holding off updates to timer_state.qemu_icount we can run into
trouble when the non-vCPU thread needs to know the time. This helper
ensures we atomically update timers_state.qemu_icount based on what
has been currently executed.
Signed-off-by: Alex Bennée
diff --git a/cpus.c b/cpus.c
index 0e
Outside of the vCPU thread icount time will only be tracked against
timers_state.qemu_icount. We no longer credit cycles until they have
completed the run. Inside the vCPU thread we adjust for passage of
time by looking at how many have run so far. This is only valid inside
the vCPU thread while it
There is no particular reason we shouldn't update the global system
icount time as we exit each TranslationBlock run. This ensures the
main-loop doesn't have to wait until we exit to the outer loop for
executed instructions to be credited to timer_state.
The prepare_icount_for_run function is slig
If we find ourselves trying to add an event to the log where time has
gone backwards it is because a vCPU event has occurred and the
main-loop is not yet aware of time moving forward. This should not
happen and if it does its better to fail early than generate a log
that will have weird behaviour.
On Sat, Apr 1, 2017 at 8:14 PM, Ashijeet Acharya
wrote:
> Move the existing vmdk_find_offset_in_cluster() function to the top of
> the driver. Also, introduce a new helper function size_to_clusters()
> which returns the number of clusters for a given size in bytes. Here,
> we leave the last cluste
On Wed, 5 Apr 2017 14:41:36 +0200
Cédric Le Goater wrote:
> This is an empty shell that we will use to include nodes in the device
> tree for ISA devices. We expect RTC, UART and IPMI BT devices.
>
> Signed-off-by: Cédric Le Goater
> ---
> hw/ppc/pnv.c | 32
>
On 04/10/2017 03:16 PM, Greg Kurz wrote:
> On Wed, 5 Apr 2017 14:41:36 +0200
> Cédric Le Goater wrote:
>
>> This is an empty shell that we will use to include nodes in the device
>> tree for ISA devices. We expect RTC, UART and IPMI BT devices.
>>
>> Signed-off-by: Cédric Le Goater
>> ---
>> h
Hi Peter,
On 04/10/2017 07:39 AM, Peter Maydell wrote:
Move the code to generate the "condition failed" instruction
codepath out of the if (singlestepping) {} else {}. This
will allow adding support for handling a new is_jmp type
which can't be neatly split into "singlestepping case"
versus "not
On 1 April 2017 at 13:57, Cédric Le Goater wrote:
> The FTGMAC100 device is an Ethernet controller with DMA function that
> can be found on Aspeed SoCs (which include NCSI).
>
> It is fully compliant with IEEE 802.3 specification for 10/100 Mbps
> Ethernet and IEEE 802.3z specification for 1000 Mb
On Sat, Apr 08, 2017 at 09:17:58PM +0800, 858585 jemmy wrote:
> On Fri, Apr 7, 2017 at 7:34 PM, Stefan Hajnoczi wrote:
> > On Fri, Apr 07, 2017 at 09:30:33AM +0800, 858585 jemmy wrote:
> >> On Thu, Apr 6, 2017 at 10:02 PM, Stefan Hajnoczi
> >> wrote:
> >> > On Wed, Apr 05, 2017 at 05:27:58PM +08
On 04/10/2017 07:39 AM, Peter Maydell wrote:
On M profile, return from exceptions happen when privileged code
executes one of the following function call return instructions:
* POP or LDM which loads the PC
* LDR to PC
* BX register
and the new PC value is 0xFFxx.
QEMU tries to implement
On 04/10/2017 07:39 AM, Peter Maydell wrote:
Now that we've rewritten M-profile exception return so that the magic
PC values are not visible to other parts of QEMU, we can delete the
special casing of them elsewhere.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
---
tar
On 10 April 2017 at 14:52, Philippe Mathieu-Daudé wrote:
> On 04/10/2017 07:39 AM, Peter Maydell wrote:
>> +/* Is the new PC value in the magic range indicating exception
>> return? */
>> +tcg_gen_brcondi_i32(TCG_COND_GEU, cpu_R[15], 0xff00,
>> excret_label);
>
>
> Idea for a GSoC: br
Hello,
The first patches improve the LPC support for the POWER8NVL (nvlink)
systems and for multichip systems. Next, we add IPMI support to the
machine which is required to power off and reboot a PowerNV system. To
make use of it, a BT device and an BMC simulator need to be defined on
the command
The firmware (skiboot) chooses the default LPC bus of a multichip
systems using a "primary" property. The LPC bus of chip 0 should be
the only connected in the system. Let's advertise it in the device
tree.
Signed-off-by: Cédric Le Goater
---
Changes since v1:
- the device tree is populated fo
This is an empty shell that we will use to include nodes in the device
tree for ISA devices. We expect RTC, UART and IPMI BT devices.
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
---
hw/ppc/pnv.c | 32
1 file changed, 32 insertions(+)
diff --git a/
From: Benjamin Herrenschmidt
It adds the Naples chip which supports proper LPC interrupts via the
LPC controller rather than via an external CPLD.
Signed-off-by: Benjamin Herrenschmidt
[clg: - updated for qemu-2.9
- ported on latest PowerNV patchset
- moved the IRQ handler in pnv_lp
When an ipmi-bt device [1] is defined on the ISA bus, we need to
populate the device tree with the object properties. Such devices are
created with the command line options :
-device ipmi-bmc-sim,id=bmc0 -device isa-ipmi-bt,bmc=bmc0,irq=10
[1] https://lists.gnu.org/archive/html/qemu-devel/2015
The code could be common to any ISA device but we are missing the IO
length.
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
---
hw/ppc/pnv.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 2d32b20f2d6e..94e9744d7e6
OpenPOWER systems expect to be notified with such an event before a
shutdown or a reboot. An OEM SEL message is sent with specific
identifiers and a user data containing the request : OFF or REBOOT.
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
---
Changes since v1:
- changed the
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
---
hw/ppc/pnv.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 94e9744d7e67..7f2f9897f146 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -301,6 +301,37 @@ static
Skiboot, the firmware for the PowerNV platform, expects the BMC to
provide some specific IPMI sensors. These sensors are exposed in the
device tree and their values are updated by the firmware at boot time.
Sensors of interest are :
"FW Boot Progress"
"Boot Count"
As such a devic
Apparently, the solution is:
https://rafalcieslak.wordpress.com/2015/11/20/qemu-main-loop-warning-io-
thread-spun-for-1000-iterations/
I haven't experienced the hang within a couple of days, it's fairly
irregular for me to reproduce it.
--
You received this bug notification because you are a mem
On Thu, Mar 16, 2017 at 10:23 AM Marc-André Lureau <
marcandre.lur...@redhat.com> wrote:
> Hi,
>
> The following series contains various patches:
> - replace "chardevs" list for a /chardevs container object
> - add a few read-only socket properties mainly useful for testing
> - some chardev relate
On 3 April 2017 at 14:04, Peter Maydell wrote:
> In the 2.7 release we stated in the ChangeLog that the
> minimum glib version for Windows hosts was 2.30, but we
> didn't update configure to enforce this because we were
> very close to the release at the point where we noticed
> the issue, and it
On Wed 05 Apr 2017 05:11:43 PM CEST, Stefan Hajnoczi wrote:
> The refcount metadata size calculation is inaccurate and can produce
> numbers that are too small. This is bad because we should calculate a
> conservative number - one that is guaranteed to be large enough.
>
> This patch switches the
Signed-off-by: Marc-André Lureau
---
tests/test-keyval.c | 4
1 file changed, 4 insertions(+)
diff --git a/tests/test-keyval.c b/tests/test-keyval.c
index ba19560a22..141ee5d0c4 100644
--- a/tests/test-keyval.c
+++ b/tests/test-keyval.c
@@ -628,6 +628,7 @@ static void test_keyval_visit_alte
From: Li Qiang
Free 'orig_value' in error path.
Signed-off-by: Li Qiang
Signed-off-by: Greg Kurz
---
hw/9pfs/9p-xattr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/9pfs/9p-xattr.c b/hw/9pfs/9p-xattr.c
index eec160b3c2ac..d05c1a1c1df5 100644
--- a/hw/9pfs/9p-xattr.c
+++ b/hw/9pfs/9p
The following changes since commit 5daf9b3025baef10ee7b77daa003d5696b58d5dc:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
(2017-04-07 15:23:48 +0100)
are available in the git repository at:
https://github.com/gkurz/qemu.git tags/for-upstream
for you to fetch
I think that's a workaround, not a fix for whatever the underlying bug
is.
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https://bugs.launchpad.net/bugs/1481272
Title:
main-loop: WARNING: I/O thread spun for 1000 iterations
Stat
On Wed 05 Apr 2017 05:11:45 PM CEST, Stefan Hajnoczi wrote:
> Use qcow2_calc_prealloc_size() to get the required file size.
>
> Signed-off-by: Stefan Hajnoczi
Reviewed-by: Alberto Garcia
Berto
On 04/10/2017 02:54 AM, Fam Zheng wrote:
> Since d5895fcb (iscsi: Split URL into individual options), creating
> qcow2 image on an iscsi LUN fails:
>
> qemu-img create -f qcow2 iscsi://$SERVER/$IQN/0 1G
> qemu-img: iscsi://$SERVER/$IQN/0: Could not create image: Invalid
> argument
On 04/10/2017 03:59 AM, Longpeng(Mike) wrote:
> Refactors the qcrypto_cipher_free(), splits it into two parts. One
> is gcrypt/nettle__cipher_free_ctx() to free the special context.
Your mail forgot to include 'In-Reply-To:' and 'References:' headers;
and therefore you resulted in sending 20 top-l
On 10.04.2017 10:42, Kevin Wolf wrote:
> Am 07.04.2017 um 19:10 hat Max Reitz geschrieben:
>> One case I'd be especially interested in are of course 4 kB subclusters
>> for 64 kB clusters (because 4 kB is a usual page size and can be
>> configured to be the block size of a guest device; and because
Our current ACPI table generation code limits the placement of ACPI
tables to 32-bit addressable memory, in order to be able to emit the
root pointer (RSDP) and root table (RSDT) using table types from the
ACPI 1.0 days.
Since ARM was not supported by ACPI before version 5.0, it makes sense
to lif
Signed-off-by: Fam Zheng
---
block/io.c| 4 ++--
include/block/block.h | 16
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/block/io.c b/block/io.c
index 7321dda..9598646 100644
--- a/block/io.c
+++ b/block/io.c
@@ -44,7 +44,7 @@ static void coroutin
At the request of Michael, replace the leading capital X in the FADT
field name Xfacs and Xdsdt with lower case x + underscore.
Cc: Michael S. Tsirkin
Signed-off-by: Ard Biesheuvel
---
include/hw/acpi/acpi-defs.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/hw
v3: Respin the unmerged changes from v2 and include one new fix:
(Yes, it is a big series for the last -rc, and I personally prefer the v2
approach for the 4-9 part of the problem, which is much more mechanical.)
- 1, 2 are redoing previous patch 4, using bdrv_parent_drained_begin/end
qemu_coroutine_create associates @co to qemu_aio_context but we poll
blk's context below. If the coroutine yields, it may never get resumed
again.
Use bdrv_coroutine_enter to make sure we are starting the I/O on the
right context.
Signed-off-by: Fam Zheng
---
qemu-io-cmds.c | 2 +-
1 file chang
Previously, before test_block_job_start returns, the job can already
complete, as a result, the transactional state of other jobs added to
the same txn later cannot be handled correctly.
Move the block_job_start() calls to callers after
block_job_txn_add_job() calls.
Signed-off-by: Fam Zheng
---
Signed-off-by: Fam Zheng
---
block.c | 10 ++
include/block/block.h | 11 +++
2 files changed, 21 insertions(+)
diff --git a/block.c b/block.c
index a995a8e..e65b906 100644
--- a/block.c
+++ b/block.c
@@ -4324,6 +4324,16 @@ AioContext *bdrv_get_aio_context(BlockDriv
The fact that the bs->aio_context is changing can confuse the dataplane
iothread, because of the now fine granularity aio context lock.
bdrv_drain should rather be a bdrv_drained_begin/end pair, but since
bs->aio_context is changing, we can just use aio_disable_external and
bdrv_parent_drained_begi
It's a variant of qemu_coroutine_enter with an explicit AioContext
parameter.
Signed-off-by: Fam Zheng
---
include/qemu/coroutine.h | 5 +
util/qemu-coroutine.c| 11 ---
util/trace-events| 2 +-
3 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/include/qem
BDRV_POLL_WHILE waits for the started I/O by releasing bs's ctx then polling
the main context, which relies on the yielded the coroutine would continue on
bs->ctx and notify qemu_aio_context with bdrv_wakeup(). Thus, using
qemu_coroutine_enter to start I/O is wrong because if the coroutine is enter
bdrv_inc_in_flight and bdrv_dec_in_flight are mandatory for
BDRV_POLL_WHILE to work, even for the shortcut case where flush is
unnecessary. Move the if block to below bdrv_dec_in_flight, and BTW fix
the variable declaration position.
Signed-off-by: Fam Zheng
---
block/io.c | 16 +---
They start the coroutine on the specified context.
Signed-off-by: Fam Zheng
---
include/block/aio.h | 18 ++
util/async.c| 14 +-
2 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/include/block/aio.h b/include/block/aio.h
index 677b6ff..b0a6bb3 10
Resuming and especially starting of the block job coroutine, could be issued in
the main thread. However the coroutine's "home" ctx should be set to the same
context as job->blk. Use bdrv_coroutine_enter to ensure that.
Signed-off-by: Fam Zheng
---
blockjob.c | 4 ++--
1 file changed, 2 inserti
On 4 April 2017 at 15:31, Krzysztof Kozlowski wrote:
> On Tue, Apr 04, 2017 at 03:05:09PM +0100, Peter Maydell wrote:
>> On 4 April 2017 at 14:44, Krzysztof Kozlowski wrote:
>> > On Tue, Apr 04, 2017 at 01:09:08PM +0100, Peter Maydell wrote:
>> >> Is there a data sheet that describes this RNG? I
On 10 April 2017 at 13:55, Alex Bennée wrote:
> The following changes since commit 5fe2339e6b09da7d6f48b9bef0f1a7360392b489:
>
> Merge remote-tracking branch
> 'remotes/awilliam/tags/vfio-updates-20170406.0' into staging (2017-04-07
> 10:29:56 +0100)
>
> are available in the git repository at:
On 10.04.2017 09:54, Fam Zheng wrote:
> Since d5895fcb (iscsi: Split URL into individual options), creating
> qcow2 image on an iscsi LUN fails:
>
> qemu-img create -f qcow2 iscsi://$SERVER/$IQN/0 1G
> qemu-img: iscsi://$SERVER/$IQN/0: Could not create image: Invalid
> argument
>
On 04/10/2017 09:21 AM, Marc-André Lureau wrote:
> Signed-off-by: Marc-André Lureau
> ---
> tests/test-keyval.c | 4
> 1 file changed, 4 insertions(+)
Reviewed-by: Eric Blake
Leaks in the testsuite are not showstoppers, so I'm okay if we defer it
to 2.10 to minimize churn now that we are
On 04/10/17 17:03, Ard Biesheuvel wrote:
> At the request of Michael, replace the leading capital X in the FADT
> field name Xfacs and Xdsdt with lower case x + underscore.
>
> Cc: Michael S. Tsirkin
> Signed-off-by: Ard Biesheuvel
> ---
> include/hw/acpi/acpi-defs.h | 4 ++--
> 1 file changed,
On Fri, Apr 07, 2017 at 03:01:29PM +0200, Kevin Wolf wrote:
> Am 07.04.2017 um 14:20 hat Stefan Hajnoczi geschrieben:
> > On Thu, Apr 06, 2017 at 06:01:48PM +0300, Alberto Garcia wrote:
> > > Here are the results (subcluster size in brackets):
> > >
> > > |-++--
On 04/10/2017 10:05 AM, Fam Zheng wrote:
> BDRV_POLL_WHILE waits for the started I/O by releasing bs's ctx then polling
> the main context, which relies on the yielded the coroutine would continue on
> bs->ctx and notify qemu_aio_context with bdrv_wakeup(). Thus, using
Reads awkwardly. I'm guessi
On Fri, Apr 07, 2017 at 04:55:24PM -0400, Jeff Cody wrote:
>
> Changes from v1:
>
> Patch 2: Has v1 patch 8 (do not blindly xset bs->read_only) squashed into it
> (thanks Stefan)
> COW -> "copy-on-read" (Thanks John)
> Drop unneeded call in vvfat, and bypass enable_writ
On Wed, Apr 05, 2017 at 02:41:46PM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> This creates a legacy PCIe->PCI bridge under the PHB by default to which
> a bunch of standard devices are attached. Currently:
>
> - VGA (as specified by -vga)
> - USB (with keyboard and mou
On Wed, Apr 05, 2017 at 02:41:45PM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> This is a model of the PCIe host bridge found on Power8 chips,
> including IOMMU support, PCIe root complex etc...
>
> This implementation doesn't emulate the EEH error handling (and
> may never
http://patchwork.ozlabs.org/patch/737446/
-Original Message-
From: Laurent Vivier [mailto:lviv...@redhat.com]
Sent: Friday, March 10, 2017 2:10 PM
To: Robinson, Herbie ; qemu-devel@nongnu.org
Cc: qemu-triv...@nongnu.org
Subject: Re: [PATCH v3] SGABIOS: fix wrong video attrs for int 10h,
On Sun, Apr 09, 2017 at 08:37:40PM +0800, jemmy858...@gmail.com wrote:
> From: Lidong Chen
>
> BLOCK_SIZE is (1 << 20), qcow2 cluster size is 65536 by default,
> this maybe cause the qcow2 file size is bigger after migration.
> This patch check each cluster, use blk_pwrite_zeroes for each
> zero
On 04/07/2017 04:55 PM, Jeff Cody wrote:
> Changes from v1:
>
> Patch 2: Has v1 patch 8 (do not blindly xset bs->read_only) squashed into it
> (thanks Stefan)
> COW -> "copy-on-read" (Thanks John)
> Drop unneeded call in vvfat, and bypass enable_write_target (Stefan)
>
On Mon, Apr 10, 2017 at 10:26:34AM +0800, Fam Zheng wrote:
> v3: Use bdrv_parent_drained_begin/end. [Kevin]
> Do it before releasing new_context. [Stefan]
>
> Fam Zheng (2):
> block: Make bdrv_parent_drained_begin/end public
> block: Quiesce old aio context during bdrv_set_aio_context
>
>
Public bug reported:
Since upgrading to QEMU 2.8.0, my Windows 7 64-bit virtual machines
started crashing due to the assertion quoted in the summary failing.
The assertion in question was added by commit 9972354856 ("block: add
BDS field to count in-flight requests"). My tests show that setting
d
Just to clarify: the issue appeared in 2.8.0, but it is still present in
current master. Commit c2b6428d38 ("block: quiesce AioContext when
detaching from it") does not solve this issue, even though it contains
the following tag:
Fixes: 99723548561978da8ef44cf804fb7912698f5d88
--
You receiv
On 04/08/2017 05:52 AM, Paolo Bonzini wrote:
>
>
> On 08/04/2017 08:03, John Snow wrote:
>> Looks clean, though it may be useful to do a few more things;
>>
>> - Demarcate what you think is the monitor API in this file
>
> It's already there:
>
> +/*
> + * API for block job drivers and the bl
On 04/10/2017 06:07 AM, Patrick Ohly wrote:
On Mon, 2017-04-10 at 09:54 +, Marc-André Lureau wrote:
By "public protocol", I mean qemu communication with a foreign
project, swtpm or other.
If qemu grows new needs, or if the protocol is found limited or buggy,
it may change. Subtle interacti
On 04/10/2017 03:08 AM, Amarnath Valluri wrote:
On 07.04.2017 17:41, Daniel P. Berrange wrote:
On Fri, Apr 07, 2017 at 05:30:31PM +0300, Amarnath Valluri wrote:
This change introduces a new TPM backend driver that can communicate
with
swtpm(software TPM emulator) using unix domain socket int
That patch is wrong. The correct patch has been submitted and checked
on the QEMU mailing lists
(http://patchwork.ozlabs.org/patch/737446/).
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1670509
Ti
On 10 April 2017 at 11:39, Peter Maydell wrote:
> On M profile, return from exceptions happen when privileged code
> executes one of the following function call return instructions:
> * POP or LDM which loads the PC
> * LDR to PC
> * BX register
> and the new PC value is 0xFFxx.
So this is
Hello,
On 03/18/2017 02:27 AM, Mike Kravetz wrote:
On 03/15/2017 06:47 AM, Alexey Perevalov wrote:
Hi Andrea,
thank you for so perfect design description,
the main question who will do RFC patches,
you or Mike or if you not against I could try.
Sorry for not replying sooner, I have been aw
On 04/07/2017 08:07 AM, Cédric Le Goater wrote:
> On 04/07/2017 07:24 AM, Nikunj A Dadhania wrote:
>> Cédric Le Goater writes:
>>
>>> Hello Nikunj,
>>>
>>> On 04/06/2017 12:22 PM, Nikunj A Dadhania wrote:
The series enables Multi-Threaded TCG on PPC64
Patch 01: Use atomic_cmpxchg in
Cédric Le Goater writes:
> On 04/07/2017 08:07 AM, Cédric Le Goater wrote:
>> On 04/07/2017 07:24 AM, Nikunj A Dadhania wrote:
>>> Cédric Le Goater writes:
>>>
Hello Nikunj,
On 04/06/2017 12:22 PM, Nikunj A Dadhania wrote:
> The series enables Multi-Threaded TCG on PPC64
>
On 10 April 2017 at 14:22, Philippe Mathieu-Daudé wrote:
> I'm custom to think "let's change that and think how to protect the code to
> help the next one who will modify it" and wonder if it isn't safer to
> define:
>
> const bool singlestepping;
>
> singlestepping = cs->singlestep_enabled || dc-
On 04/10/2017 06:44 PM, Nikunj A Dadhania wrote:
> Cédric Le Goater writes:
>
>> On 04/07/2017 08:07 AM, Cédric Le Goater wrote:
>>> On 04/07/2017 07:24 AM, Nikunj A Dadhania wrote:
Cédric Le Goater writes:
> Hello Nikunj,
>
> On 04/06/2017 12:22 PM, Nikunj A Dadhania wrote
Cédric Le Goater writes:
> On 04/10/2017 06:44 PM, Nikunj A Dadhania wrote:
>> Cédric Le Goater writes:
>>
>>> On 04/07/2017 08:07 AM, Cédric Le Goater wrote:
On 04/07/2017 07:24 AM, Nikunj A Dadhania wrote:
> Cédric Le Goater writes:
sure. pnv is still on 2.9, so I will reb
On M profile, return from exceptions happen when code in Handler mode
executes one of the following function call return instructions:
* POP or LDM which loads the PC
* LDR to PC
* BX register
and the new PC value is 0xFFxx.
QEMU tries to implement this by not treating the i
For M profile exception-return handling we'd like to generate different
code for some instructions depending on whether we are in Handler
mode or Thread mode. This isn't the same as "are we privileged
or user", so we need an extra bit in the TB flags to distinguish.
Signed-off-by: Peter Maydell
-
Cédric Le Goater writes:
> On 04/07/2017 08:07 AM, Cédric Le Goater wrote:
>> On 04/07/2017 07:24 AM, Nikunj A Dadhania wrote:
>>> Cédric Le Goater writes:
>>>
Hello Nikunj,
On 04/06/2017 12:22 PM, Nikunj A Dadhania wrote:
> The series enables Multi-Threaded TCG on PPC64
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