58004df0:
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-01-16' into
staging (2017-01-17 13:53:50 +)
are available in the git repository at:
https://github.com/artyom-tarasenko/qemu/ tags/pull-sun4v-20170118
for you to fetch changes up to a2664ca0eced57dfc9f261
Signed-off-by: Artyom Tarasenko
Reviewed-by: Richard Henderson
---
target/sparc/translate.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 729f4e2..8902e44 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/transla
Signed-off-by: Artyom Tarasenko
---
target/sparc/ldst_helper.c | 51 ++
1 file changed, 15 insertions(+), 36 deletions(-)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index aa6f77d..d4eee33 100644
--- a/target/sparc/ldst_helper.
Signed-off-by: Artyom Tarasenko
---
target/sparc/cpu.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 10c9ac6..4c4c159 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -304,19 +304,36 @@ enum {
#define TTE_W_OK_BIT
Signed-off-by: Artyom Tarasenko
Reviewed-by: Richard Henderson
---
target/sparc/ldst_helper.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 20e202b..7a134b3 100644
--- a/target/sparc/ldst_helper.c
+++ b/targ
Accordinf to UA2005, 9.3.3 "Address Space Identifiers",
"In hyperprivileged mode, all instruction fetches and loads and stores with
implicit
ASIs use a physical address, regardless of the value of TL".
Signed-off-by: Artyom Tarasenko
---
target/sparc/cpu.h | 4 ++--
target/sparc/translat
Signed-off-by: Artyom Tarasenko
---
target/sparc/cpu.h | 4
1 file changed, 4 insertions(+)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 4c4c159..f65d8b5 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -336,6 +336,10 @@ enum {
#define TTE_PGSIZE_UA2005(tte) ((
Signed-off-by: Artyom Tarasenko
---
target/sparc/mmu_helper.c | 18 +-
1 file changed, 1 insertion(+), 17 deletions(-)
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 044e88c..fa70dc0 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
As described in Chapter 5.7.6 of the UltraSPARC Architecture 2005,
outstanding disrupting exceptions that are destined for privileged mode can only
cause a trap when the virtual processor is in nonprivileged or privileged mode
and
PSTATE.ie = 1. At all other times, they are held pending.
Signed-o
Implement the behavior described in the chapter 13.9.11 of
UltraSPARC T1™ Supplement to the UltraSPARC Architecture 2005:
"If a TLB Data-In replacement is attempted with all TLB
entries locked and valid, the last TLB entry (entry 63) is
replaced."
Signed-off-by: Artyom Tarasenko
---
target/spar
Please note that QEMU doesn't impelement Real->Physical address
translation. The "Real Address" is always the "Physical Address".
Suggested-by: Richard Henderson
Signed-off-by: Artyom Tarasenko
---
target/sparc/cpu.h | 7 +++
target/sparc/translate.c | 2 +-
2 files changed, 4 inserti
Signed-off-by: Artyom Tarasenko
---
target/sparc/ldst_helper.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index d4eee33..4f55388 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -21
Signed-off-by: Artyom Tarasenko
Reviewed-by: Richard Henderson
---
target/sparc/translate.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index a40c974..399a8ac 100644
--- a/target/sparc/translate.c
+++ b/target/spa
Signed-off-by: Artyom Tarasenko
---
linux-user/main.c | 2 +-
target/sparc/cpu.h | 48 +-
target/sparc/ldst_helper.c | 8
target/sparc/machine.c | 4 ++--
4 files changed, 25 insertions(+), 37 deletions(-)
diff --git a/
Signed-off-by: Artyom Tarasenko
Reviewed-by: Richard Henderson
---
target/sparc/ldst_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index ade4fb0..d3747cf 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.
Signed-off-by: Artyom Tarasenko
---
target/sparc/cpu.c | 13 ++---
target/sparc/cpu.h | 2 ++
target/sparc/helper.h | 1 +
target/sparc/int64_helper.c | 6 ++
target/sparc/translate.c| 3 +--
target/sparc/win_helper.c | 40
Signed-off-by: Artyom Tarasenko
Reviewed-by: Richard Henderson
---
target/sparc/mmu_helper.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index fa70dc0..8b4664d 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@
Signed-off-by: Artyom Tarasenko
---
target/sparc/ldst_helper.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 4f55388..c69167e 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper
Signed-off-by: Artyom Tarasenko
---
target/sparc/ldst_helper.c | 32 ++--
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 2e6439a..ade4fb0 100644
--- a/target/sparc/ldst_helper.c
+++ b/target
In OpenSPARC T1+ TWINX ASIs in store instructions are aliased
with Block Initializing Store ASIs.
"UltraSPARC T1 Supplement Draft D2.1, 14 May 2007" describes them
in the chapter "5.9 Block Initializing Store ASIs"
Integer stores of all sizes are allowed with these ASIs.
Signed-off-by: Artyom Ta
Signed-off-by: Artyom Tarasenko
---
target/sparc/cpu.h | 2 +
target/sparc/ldst_helper.c | 124 +
2 files changed, 104 insertions(+), 22 deletions(-)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index c92bd25..9e9b22a 100644
--- a/tar
Signed-off-by: Artyom Tarasenko
---
MAINTAINERS | 6 +++
hw/timer/Makefile.objs | 2 +
hw/timer/sun4v-rtc.c | 102 +++
include/hw/timer/sun4v-rtc.h | 1 +
4 files changed, 111 insertions(+)
create mode 100644 hw/timer/s
Signed-off-by: Artyom Tarasenko
Reviewed-by: Richard Henderson
---
hw/sparc64/Makefile.objs | 1 +
hw/sparc64/sparc64.c | 378 +
hw/sparc64/sun4u.c | 348 +
hw/timer/sun4v-rtc.c | 2 +-
Remove the Niagara stub implementation from sun4u.c and add a machine,
compatible with Legion simulator from the OpenSPARC T1 project.
The machine uses the firmware supplied with the OpenSPARC T1 project,
http://download.oracle.com/technetwork/systems/opensparc/OpenSPARCT1_Arch.1.5.tar.bz2
in the
Hi Michael,
> On Jan 17, 2017, at 9:45 AM, Michael S. Tsirkin wrote:
>
> On Mon, Jan 16, 2017 at 10:57:42AM -0800, Ben Warren wrote:
>> I think we have a misunderstanding here. I’m storing the VM
>> Generation ID __data__ (a GUID) in a fw_cfg blob, not the address.
>
> Yes, I think I gathered t
Oh sorry this has been working fine consider this resolved.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1256432
Title:
qemu mingw 32bit windows crash
Status in QEMU:
Incomplete
Bug descriptio
On Wed, Jan 18, 2017 at 10:56 AM, Thomas Huth wrote:
> On 18.01.2017 18:57, Alistair Francis wrote:
>> On Wed, Jan 18, 2017 at 4:44 AM, Thomas Huth wrote:
>>> Sometimes it is useful to have just a machine with CPU and RAM, without
>>> any further hardware in it, e.g. if you just want to do some i
> > > > > > Signed-off-by: Liang Li
> > > > > > Cc: Michael S. Tsirkin
> > > > > > Cc: Paolo Bonzini
> > > > > > Cc: Cornelia Huck
> > > > > > Cc: Amit Shah
> > > > > > Cc: Dave Hansen
> > > > > > Cc: Andrea Arcangeli
> > > > > > Cc: David Hildenbrand
> > > > > > ---
> > > > > > include/ua
>
> On 01/17/2017 03:49 AM, Gonglei (Arei) wrote:
> > Hi Halil,
> >
> >>
> >> On 01/16/2017 01:43 PM, Gonglei (Arei) wrote:
> >>> Hi Michael and others,
> >>>
> >>> I'd like to redefine struct virtio_crypto_op_data_req is as below:
> >>>
> >>> struct virtio_crypto_op_data_req {
> >>> struct vi
> On Wed, Jan 18, 2017 at 04:56:58AM +, Li, Liang Z wrote:
> > > > - virtqueue_add_outbuf(vq, &sg, 1, vb, GFP_KERNEL);
> > > > - virtqueue_kick(vq);
> > > > +static void do_set_resp_bitmap(struct virtio_balloon *vb,
> > > > + unsigned long base_pfn, int pages)
> > > >
* Alex Williamson [2017-01-18 13:43:32 -0700]:
> On Wed, 18 Jan 2017 13:41:47 +0100
> Cornelia Huck wrote:
>
> > On Wed, 18 Jan 2017 10:51:17 +0800
> > Dong Jia Shi wrote:
> >
> > > * Alex Williamson [2017-01-17 14:51:42
> > > -0700]:
> > >
> > > > On Thu, 12 Jan 2017 08:25:03 +0100
> >
On 2017/1/13 21:41, Stefan Hajnoczi wrote:
On Mon, Dec 05, 2016 at 04:34:59PM +0800, zhanghailiang wrote:
+Issue qmp command:
+ { 'execute': 'blockdev-add',
+'arguments': {
+'driver': 'replication',
+'node-name': 'rep',
+'mode': 'primary',
+'shared-disk-id':
On 2017年01月18日 20:19, Paolo Bonzini wrote:
On 10/01/2017 06:39, Michael S. Tsirkin wrote:
From: Jason Wang
This patch enables device IOTLB support for intel iommu. The major
work is to implement QI device IOTLB descriptor processing and notify
the device through iommu notifier.
Cc: Paolo B
On 01/19/2017 05:32 AM, Alex Williamson wrote:
> On Tue, 10 Jan 2017 17:11:01 +0200
> "Michael S. Tsirkin" wrote:
>
>> On Tue, Jan 10, 2017 at 07:46:17PM +0800, Cao jin wrote:
>>>
>>>
>>> On 01/10/2017 07:04 AM, Michael S. Tsirkin wrote:
On Sat, Dec 31, 2016 at 05:15:36PM +0800, Cao jin
On 2017年01月19日 01:50, Michael S. Tsirkin wrote:
On Wed, Jan 18, 2017 at 10:42:48AM +0800, Jason Wang wrote:
On 2017年01月17日 22:44, Michael S. Tsirkin wrote:
On Tue, Jan 17, 2017 at 12:01:00PM +0800, Jason Wang wrote:
We allow vhost to clear VIRITO_F_IOMMU_PLATFORM which is wrong since
VIRTIO
On Wed, Jan 18, 2017 at 09:38:55AM +, Tian, Kevin wrote:
> > From: Peter Xu [mailto:pet...@redhat.com]
> > Sent: Wednesday, January 18, 2017 4:46 PM
> >
> > On Wed, Jan 18, 2017 at 04:36:05PM +0800, Jason Wang wrote:
> > >
> > >
> > > On 2017年01月18日 16:11, Peter Xu wrote:
> > > >On Wed, Jan 18
On Thu, Jan 19, 2017 at 10:50:59AM +0800, Jason Wang wrote:
[...]
> >>+static bool vtd_process_device_iotlb_desc(IntelIOMMUState *s,
> >>+ VTDInvDesc *inv_desc)
> >>+{
> >>+VTDAddressSpace *vtd_dev_as;
> >>+IOMMUTLBEntry entry;
> >>+struct VTDB
On 2017年01月19日 10:50, Jason Wang wrote:
On 2017年01月18日 20:19, Paolo Bonzini wrote:
On 10/01/2017 06:39, Michael S. Tsirkin wrote:
From: Jason Wang
This patch enables device IOTLB support for intel iommu. The major
work is to implement QI device IOTLB descriptor processing and notify
the
On Wed, Jan 18, 2017 at 06:06:57PM +0800, Jason Wang wrote:
[...]
> So I think we should implement DSI and GLOBAL for vfio in this case. We can
> first try to implement it through current VFIO API which can accepts a range
> of iova. If not possible, let's discuss for other possible solutions.
D
On 2017年01月19日 11:28, Peter Xu wrote:
On Thu, Jan 19, 2017 at 10:50:59AM +0800, Jason Wang wrote:
[...]
+static bool vtd_process_device_iotlb_desc(IntelIOMMUState *s,
+ VTDInvDesc *inv_desc)
+{
+VTDAddressSpace *vtd_dev_as;
+IOMMUTLBEntry entr
On 2017年01月19日 11:32, Peter Xu wrote:
On Wed, Jan 18, 2017 at 06:06:57PM +0800, Jason Wang wrote:
[...]
So I think we should implement DSI and GLOBAL for vfio in this case. We can
first try to implement it through current VFIO API which can accepts a range
of iova. If not possible, let's dis
Power ISA 3.0 introduces a few quadruple precision floating point
instructions that support round-to-add rounding mode. The
round-to-odd mode is explained as under:
Let Z be the intermediate arithmetic result or the operand of a convert
operation. If Z can be represented exactly in the target form
On 01/19/2017 05:43 AM, Alex Williamson wrote:
> On Sat, 31 Dec 2016 17:13:04 +0800
> Cao jin wrote:
>
>> As previous discussion suggest, we could take a step back to handle non-fatal
>> error first, this will make this patchset much more thinner, because we could
>> drop all the configuration
On 01/19/2017 05:43 AM, Alex Williamson wrote:
> On Sat, 31 Dec 2016 17:13:04 +0800
> How can you know if he other function was affected if you don't even
> have a cable connected?
Will try ask for another cable for the other function.
> How is testing on something that doesn't seem
> to work
> From: Peter Xu [mailto:pet...@redhat.com]
> Sent: Thursday, January 19, 2017 11:17 AM
>
> On Wed, Jan 18, 2017 at 09:38:55AM +, Tian, Kevin wrote:
> > > From: Peter Xu [mailto:pet...@redhat.com]
> > > Sent: Wednesday, January 18, 2017 4:46 PM
> > >
> > > On Wed, Jan 18, 2017 at 04:36:05PM +0
> -Original Message-
> From: Qemu-devel [mailto:qemu-devel-bounces+yi.l.liu=intel@nongnu.org]
> On Behalf Of Tian, Kevin
> Sent: Wednesday, January 18, 2017 5:39 PM
> To: Peter Xu ; Jason Wang
> Cc: Lan, Tianyu ; Raj, Ashok ;
> m...@redhat.com; jan.kis...@siemens.com; bd.a...@gmail.com
On 2017年01月19日 14:44, Liu, Yi L wrote:
-Original Message-
From: Qemu-devel [mailto:qemu-devel-bounces+yi.l.liu=intel@nongnu.org]
On Behalf Of Tian, Kevin
Sent: Wednesday, January 18, 2017 5:39 PM
To: Peter Xu ; Jason Wang
Cc: Lan, Tianyu ; Raj, Ashok ;
m...@redhat.com; jan.kis...@s
On Thu, Jan 19, 2017 at 06:44:06AM +, Liu, Yi L wrote:
> > -Original Message-
> > From: Qemu-devel [mailto:qemu-devel-bounces+yi.l.liu=intel@nongnu.org]
> > On Behalf Of Tian, Kevin
> > Sent: Wednesday, January 18, 2017 5:39 PM
> > To: Peter Xu ; Jason Wang
> > Cc: Lan, Tianyu ; Ra
> On Jan 18, 2017, at 4:02 PM, Ben Warren wrote:
>
> Hi Michael,
>> On Jan 17, 2017, at 9:45 AM, Michael S. Tsirkin wrote:
>>
>> On Mon, Jan 16, 2017 at 10:57:42AM -0800, Ben Warren wrote:
>>> I think we have a misunderstanding here. I’m storing the VM
>>> Generation ID __data__ (a GUID) in a
On Wednesday, January 18, 2017 10:04 AM, Gonglei (Arei) wrote:
> I update the virtio crypto spec to support non-session based crypto
> Operations and your asym service also needs change struct
> virtio_crypto_op_data_req which maybe cause the compatibility complaint
> with the pre-existing code.
>
Hi,
>
> On Wednesday, January 18, 2017 10:04 AM, Gonglei (Arei) wrote:
> > I update the virtio crypto spec to support non-session based crypto
> > Operations and your asym service also needs change struct
> > virtio_crypto_op_data_req which maybe cause the compatibility complaint
> > with the pre
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