On 09/27/2016 06:44 PM, Paolo Bonzini wrote:
>
>
> On 27/09/2016 16:45, Christian Borntraeger wrote:
>> On 09/21/2016 06:43 PM, Paolo Bonzini wrote:
>>>
>>>
>>> On 21/09/2016 16:01, Christian Borntraeger wrote:
On 09/21/2016 03:18 PM, Paolo Bonzini wrote:
> This series started as an atte
Handling this is similar to what is done to the L2 entry in the case of
compressed clusters.
Signed-off-by: Fam Zheng
---
block/qcow2-cluster.c | 9 +
block/qcow2.c | 3 ++-
block/qcow2.h | 3 ++-
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/block/qcow2-
Hi Marcin,
Hope you have compiled the qemu with virtfs enabled.i.e --enable-virtfs
And the cli looks like this. But I am working on x86 not ARM.
-fsdev local,id=root,path=${ROOTFS},security_model=none,writeout=immediate
-device virtio-9p-pci,fsdev=root,mount_tag=/dev/root
-Regards,
Pradeep
O
Currently we configure and build under "$QEMU_SRC/tests/docker" which is
dubious, create a fixed directory (to be friendly to ccache) and change
to there before calling build_qemu.
Signed-off-by: Fam Zheng
---
tests/docker/common.rc | 3 +++
tests/docker/test-clang | 2 ++
tests/docker/test-ful
On Tue, Sep 27, 2016 at 02:23:53PM -0700, Richard Henderson wrote:
> Use tcg_gen_mul_tl for muli and mul instructions.
> Use tcg_gen_muls2_tl for mulh instruction.
> Use tcg_gen_mulu2_tl for mulhu instruction.
> Use tcg_gen_mulsu2_tl for mulhsu instruction.
>
> Note that this last fixes a bug, in
On 28/09/2016 04:40, David Gibson wrote:
> On Tue, Sep 27, 2016 at 08:55:58PM +0200, Laurent Vivier wrote:
>> Signed-off-by: Laurent Vivier
>> ---
>> tests/libqtest.h | 57
>>
>> 1 file changed, 57 insertions(+)
>>
>> diff --git a/tests/
On Wed, Sep 28, 2016 at 07:22:01AM +0200, Hervé Poussineau wrote:
> Le 28/09/2016 à 03:37, David Gibson a écrit :
> > On Tue, Sep 27, 2016 at 08:49:47PM +0200, Hervé Poussineau wrote:
> > > Le 27/09/2016 à 06:11, David Gibson a écrit :
> > > > On Mon, Sep 26, 2016 at 10:23:24PM +0200, Hervé Poussin
On 28/09/2016 07:31, Wanpeng Li wrote:
> From: Wanpeng Li
>
> Commit 96193c22a "target-i386: Move xsave component mask to features array"
> leverages features array to handle XCR0 processor state component bits,
> however, it introduces a regression:
>
> warning: host doesn't support requeste
On 28/09/2016 04:45, David Gibson wrote:
> On Tue, Sep 27, 2016 at 08:55:59PM +0200, Laurent Vivier wrote:
>> Signed-off-by: Laurent Vivier
>> ---
>> tests/Makefile.include| 8 +++-
>> tests/libqos/usb.c| 2 +-
>> tests/usb-hcd-uhci-test.c | 24
>> 3 f
On Tue, 27 Sep 2016 20:55:57 +0200
Laurent Vivier wrote:
> This allows to store it and not have to rescan the list
> each time we need it.
>
> Signed-off-by: Laurent Vivier
> ---
Reviewed-by: Greg Kurz
> tests/libqos/virtio-pci.c | 2 +-
> tests/libqtest.c | 96
>
On Mon, Sep 26, 2016 at 03:25:26PM +, Kumar Girish wrote:
> I am new to virtualization on Linux. Any help and support is appreciated.
>
> Explanation of my current setup
> Procesor : intel atom
> linux kernel : 3.10
> Virtualization at kernel : KVM
> Virtualization at application : QEMU 2.7.0
Realize the symmetric algorithm control queue handler,
including plain cipher and chainning algorithms.
Currently the control queue is used to create and
close session for symmetric algorithm.
Signed-off-by: Gonglei
---
hw/virtio/virtio-crypto.c | 234 +++
On Mon, Sep 26, 2016 at 05:41:55PM +0200, Pradeep Kiruvale wrote:
> I want to add couple of new cli options for the virtio-net driver and use
> them inside the
> virtio-net driver to throttle the packets. I did go through the code and
> did single stepping
> using the gdb, but still could not find
Introdue the virtio_crypto.h which follows
virtio-crypto specification.
Signed-off-by: Gonglei
---
include/standard-headers/linux/virtio_crypto.h | 508 +
1 file changed, 508 insertions(+)
create mode 100644 include/standard-headers/linux/virtio_crypto.h
diff --git a/in
cryptodev backend interface is used to realize the active work for
virtual crypto device.
This patch only add the framework, doesn't include specific operations.
Signed-off-by: Gonglei
---
backends/Makefile.objs | 2 +
backends/cryptodev.c | 175 +
the scenario of virtio crypto device is mostly NFV, which require
the existing Guest can't need to do any changes to support virtio
crypto, so that they can easily migrate the existing network units
to VM. That's also a basic requirement came from our customers
in production environment.
For virti
This patch including two parts: Cryptodev Backends
and virtio-crypto stuff. I can maintain cryptodev backends
which introduced by myself. For virtio-crypto stuff, I can
share the work with Michael (The whole virtio supporter).
Signed-off-by: Gonglei
---
MAINTAINERS | 14 ++
1 file ch
Introduce the virtio crypto realization, I'll
finish the core code in the following patches. The
thoughts came from virtio net realization.
For more information see:
http://qemu-project.org/Features/VirtioCrypto
Signed-off-by: Gonglei
---
hw/virtio/Makefile.objs | 1 +
hw/
Am 27.09.2016 um 16:06 hat Pavel Dovgalyuk geschrieben:
> > From: Kevin Wolf [mailto:kw...@redhat.com]
> > Am 26.09.2016 um 11:51 hat Pavel Dovgalyuk geschrieben:
> > > > From: Kevin Wolf [mailto:kw...@redhat.com]
> > > > Am 26.09.2016 um 10:08 hat Pavel Dovgalyuk geschrieben:
> > > > > This patch
This patch add session operation and crypto operation
stuff in the cryptodev backend, including function
pointers and correpsonding structures.
Signed-off-by: Gonglei
---
backends/cryptodev.c | 45 +++
include/sysemu/cryptodev.h | 133 ++
This patch adds virtio-crypto-pci, which is the pci proxy for the virtio
crypto device.
Signed-off-by: Gonglei
---
hw/virtio/Makefile.objs | 1 +
hw/virtio/virtio-crypto-pci.c | 77 +++
hw/virtio/virtio-pci.h| 15 +
3 files changed,
Firstly I introduce VirtIOCryptoReq structure to store
crypto request so that we can support sync and async
crypto operation in the future.
Secondly, VirtIOCryptoBuffer structure is used to
support sg list on source data, destionation data and
associated anthentication data according virtio
crypto
We use an opaque point to the VirtIOCryptoReq which
can support different packets based on different
algorithms.
Signed-off-by: Gonglei
---
backends/cryptodev-builtin.c | 2 +-
backends/cryptodev.c | 28 ++--
hw/virtio/virtio-crypto.c| 10 +-
include/
The virtio crypto is a virtual crypto device as well as a kind
of virtual hardware accelerator for virtual machines. The
encryption and decryption requests are placed in the data
queue and handled by the real crypto accelerators finally.
The second queue is the control queue used to create or
destr
We can simply test the functions of virtio crypto
device, including session creation, session closing,
cipher encryption and decryption.
Quick usage:
# make tests/virtio-crypto-test && ./tests/virtio-crypto-test
CCtests/virtio-crypto-test.o
LINK tests/virtio-crypto-test
/x86_64/virtio/c
2016-09-28 15:54 GMT+08:00 Paolo Bonzini :
[...]
> I think the right place to add the test is x86_cpu_get_migratable_flags.
I just sent out v2 to handle this, thanks for pointing out.
Regards,
Wanpeng Li
From: Wanpeng Li
Commit 96193c22a "target-i386: Move xsave component mask to features array"
leverages features array to handle XCR0 processor state component bits,
however, it introduces a regression:
warning: host doesn't support requested feature: CPUID.0DH:EAX [bit 0]
warning: host doesn't
Expose the capacity of algorithms supported by
virtio crypto device to the frontend driver using
pci configuration space.
Signed-off-by: Gonglei
---
hw/virtio/virtio-crypto.c | 32 +++-
include/hw/virtio/virtio-crypto.h | 14 ++
2 files changed, 45
Am 27.09.2016 um 20:59 hat Denis V. Lunev geschrieben:
> On 09/27/2016 08:04 PM, Paolo Bonzini wrote:
> >
> > On 27/09/2016 15:28, Denis V. Lunev wrote:
> >> On 09/27/2016 03:07 PM, Paolo Bonzini wrote:
> >>> - Original Message -
> From: "Denis V. Lunev"
> To: "Paolo Bonzini"
>
The new cryptodev backend named cryptodev-builtin,
which realized by QEMU cipher APIS. These APIs can
be backed by either nettle or gcrypt.
Signed-off-by: Gonglei
---
backends/Makefile.objs | 1 +
backends/cryptodev-builtin.c | 345 +++
qemu-option
On Tue, Sep 27, 2016 at 8:39 PM, Hervé Poussineau wrote:
> Le 27/09/2016 à 16:53, Artyom Tarasenko a écrit :
>>
>> Are slavio_pic_info and slavio_irq_info still used after this patch?
>
>
> After this patch, yes.
> However, slavio_pic_info/slavio_irq_info (and
> sun4m_hmp_info_pic/sun4m_hmp_info_i
On Wed, 28 Sep 2016 14:42:05 +0800
Li Qiang wrote:
> Hi Greg,
>
> What about this patch?
>
> It seems you have forget it.
>
Heh not exactly... I'm just wondering why we allocate xattr_fidp->fs.xattr.value
here if we don't use it. Can you please investigate if it is possible to defer
allocatio
On 09/28/2016 11:34 AM, Kevin Wolf wrote:
> Am 27.09.2016 um 20:59 hat Denis V. Lunev geschrieben:
>> On 09/27/2016 08:04 PM, Paolo Bonzini wrote:
>>> On 27/09/2016 15:28, Denis V. Lunev wrote:
On 09/27/2016 03:07 PM, Paolo Bonzini wrote:
> - Original Message -
>> From: "Denis
Am 28.09.2016 um 10:37 hat Denis V. Lunev geschrieben:
> On 09/28/2016 11:34 AM, Kevin Wolf wrote:
> > Am 27.09.2016 um 20:59 hat Denis V. Lunev geschrieben:
> >> On 09/27/2016 08:04 PM, Paolo Bonzini wrote:
> >>> On 27/09/2016 15:28, Denis V. Lunev wrote:
> On 09/27/2016 03:07 PM, Paolo Bonzi
On 28.09.2016 11:56, Kevin Wolf wrote:
Am 28.09.2016 um 10:37 hat Denis V. Lunev geschrieben:
On 09/28/2016 11:34 AM, Kevin Wolf wrote:
Am 27.09.2016 um 20:59 hat Denis V. Lunev geschrieben:
On 09/27/2016 08:04 PM, Paolo Bonzini wrote:
On 27/09/2016 15:28, Denis V. Lunev wrote:
On 09/27/2016
Yes, allocation here is also causing a memory leak issue.
I will try to look more at it.
On 2016-09-28 16:47 GMT+08:00 Greg Kurz wrote:
>
>
> Heh not exactly... I'm just wondering why we allocate
> xattr_fidp->fs.xattr.value
> here if we don't use it. Can you please investigate if it is possible
"Dr. David Alan Gilbert" wrote:
> * Stefan Hajnoczi (stefa...@gmail.com) wrote:
>> On Mon, Aug 29, 2016 at 06:56:42PM +, Felipe Franciosi wrote:
>> > Heya!
>> >
>> > > On 29 Aug 2016, at 08:06, Stefan Hajnoczi wrote:
>> > >
>> > > At KVM Forum an interesting idea was proposed to avoid
>> >
Am 28.09.2016 um 07:30 hat Wang WeiWei geschrieben:
> Signed-off-by: Wen Congyang
> Signed-off-by: Changlong Xie
> Signed-off-by: Wang WeiWei
> Signed-off-by: zhanghailiang
> Signed-off-by: Gonglei
> Reviewed-by: Eric Blake
> ---
> qapi/block-core.json | 2 +-
> 1 file changed, 1 insertion(+
Temporary, for testing convinience.
---
src/optionroms.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/optionroms.c b/src/optionroms.c
index f08fcb1..bb0efff 100644
--- a/src/optionroms.c
+++ b/src/optionroms.c
@@ -23,7 +23,7 @@
#include "tcgbios.h" // tpm_*
Signed-off-by: Gerd Hoffmann
---
src/Kconfig | 5 +
src/sercon.c | 10 ++
2 files changed, 15 insertions(+)
diff --git a/src/Kconfig b/src/Kconfig
index e767be1..35e7433 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -300,6 +300,11 @@ menu "Hardware support"
default y
Redirect int10 calls to serial console output.
Parse serial input and queue key events.
Signed-off-by: Gerd Hoffmann
---
Makefile | 2 +-
src/clock.c | 1 +
src/misc.c | 2 +
src/optionroms.c | 7 +-
src/sercon.c | 595 ++
Hi,
After a looong break finally the next round
of the seabios serial console patches.
cheers,
Gerd
Gerd Hoffmann (7):
std: add cp437 to unicode map
kbd: make enqueue_key public, add ascii_to_keycode
paravirt: read QEMU_CFG_NOGRAPHIC, store in etc/sercon-enable romfile
add serial con
Will be used as runtime switch to enable serial console support.
Signed-off-by: Gerd Hoffmann
---
src/fw/paravirt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
index 73a08f0..d18d247 100644
--- a/src/fw/paravirt.c
+++ b/src/fw/paravirt.c
@@ -201,6
Allows to run the serial console in parallel with a vga display.
Output will show up on both vga and serial line.
Input will be accepted from both keyboard and serial line.
Signed-off-by: Gerd Hoffmann
---
src/optionroms.c | 2 ++
src/romlayout.S | 14 +
src/sercon.c | 95 +
Signed-off-by: Gerd Hoffmann
---
Makefile| 1 +
src/cp437.c | 275
src/cp437.h | 1 +
3 files changed, 277 insertions(+)
create mode 100644 src/cp437.c
create mode 100644 src/cp437.h
diff --git a/Makefile b/Makefile
index 41b
On Wed, Sep 28, 2016 at 01:42:33AM +, Gonglei (Arei) wrote:
> > -Original Message-
> > From: Daniel P. Berrange [mailto:berra...@redhat.com]
> > Sent: Tuesday, September 27, 2016 8:52 PM
> > To: Gonglei (Arei)
> > Cc: qemu-devel@nongnu.org
> > Subject: Re: Questions about gcc linker err
serial console wants queue key events and needs to map ascii chars to
the keycode, so make enqueue_key public and also exports a helper
function so sercon can use the scan_to_keycode mapping table.
Signed-off-by: Gerd Hoffmann
---
src/kbd.c | 18 +-
src/util.h | 2 ++
2 files c
This is the specification about a new virtio crypto device.
You can get the source code from the below website:
[PATCH v3 00/10] virtio-crypto: introduce framework and device emulation
https://lists.gnu.org/archive/html/qemu-devel/2016-09/msg04132.html
[PATCH v4 00/13] virtio-crypto: introduce
Add the conformance targets and clauses for
virtio-crypto device.
Signed-off-by: Gonglei
---
conformance.tex | 32
1 file changed, 32 insertions(+)
diff --git a/conformance.tex b/conformance.tex
index f59e360..2983dad 100644
--- a/conformance.tex
+++ b/conforman
On Wed, Sep 28, 2016 at 5:01 AM, Fam Zheng wrote:
> On Tue, 09/27 19:55, Roman Penyaev wrote:
>> > The bug is 100% deterministic. Just boot up a guest with -drive
>> > format=qcow2,aio=native.
>>
>> It turns out to be that everything is broken. I started all my
>> tests with format=raw,aio=nativ
On Sat, Sep 24, 2016 at 08:36:19AM +0800, Gonglei wrote:
> CCtests/test-crypto-tlscredsx509.o
> CCtests/crypto-tls-x509-helpers.o
> CCtests/pkix_asn1_tab.o
> tests/pkix_asn1_tab.c:7:22: warning: libtasn1.h: No such file or directory
> tests/pkix_asn1_tab.c:9: error: expected ‘=’,
From: Prasad J Pandit
ARM A9MP processor has a peripheral timer with an auto-increment
register, which holds an increment step value. A user could set
this value to zero, when auto-increment control bit is enabled.
This leads to an infinite loop in 'a9_gtimer_update' while
updating comparator val
> -Original Message-
> From: no-re...@patchew.org [mailto:no-re...@patchew.org]
> Sent: Wednesday, September 28, 2016 5:15 PM
> Subject: Re: [Qemu-devel] [PATCH v4 00/13] virtio-crypto: introduce framework
> and device emulation
>
> Hi,
>
> Your series failed automatic build test. Please
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 1475051152-400276-1-git-send-email-arei.gong...@huawei.com
Subject: [Qemu-devel] [PATCH v4 00/13] vir
On 28.09.2016 07:31, Nikunj A Dadhania wrote:
> This series contains 7 new instructions for POWER9 ISA3.0
> Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x.
>
> GCC was adding epilogue for every VSX instructions causing change in
> behaviour. For testing the load vector inst
The virtio crypto device is a virtual crypto device (ie. hardware
crypto accelerator card). Currently, the virtio crypto device provides
the following crypto services: CIPHER, MAC, HASH, and AEAD.
In this patch, CIPHER, MAC, HASH, AEAD services are introduced.
VIRTIO-153
Signed-off-by: Gonglei
On Tue, Sep 27, 2016 at 06:35:41PM +, Felipe Franciosi wrote:
>
> > On 27 Sep 2016, at 18:23, Daniel P. Berrange wrote:
> >
> > On Tue, Sep 27, 2016 at 09:49:18AM -0700, Felipe Franciosi wrote:
> >>
> >> Signed-off-by: Felipe Franciosi
> >> ---
> >> io/channel-socket.c | 11 +++
Am 28.09.2016 um 11:00 hat Vladimir Sementsov-Ogievskiy geschrieben:
> On 28.09.2016 11:56, Kevin Wolf wrote:
> >Am 28.09.2016 um 10:37 hat Denis V. Lunev geschrieben:
> >>On 09/28/2016 11:34 AM, Kevin Wolf wrote:
> >>>Am 27.09.2016 um 20:59 hat Denis V. Lunev geschrieben:
> On 09/27/2016 08:04
On Wed, 09/28 11:14, Roman Penyaev wrote:
> On Wed, Sep 28, 2016 at 5:01 AM, Fam Zheng wrote:
> > On Tue, 09/27 19:55, Roman Penyaev wrote:
> >> > The bug is 100% deterministic. Just boot up a guest with -drive
> >> > format=qcow2,aio=native.
> >>
> >> It turns out to be that everything is broken
> From: Kevin Wolf [mailto:kw...@redhat.com]
> Am 27.09.2016 um 16:06 hat Pavel Dovgalyuk geschrieben:
> > > From: Kevin Wolf [mailto:kw...@redhat.com]
> > > Am 26.09.2016 um 11:51 hat Pavel Dovgalyuk geschrieben:
> > > > > From: Kevin Wolf [mailto:kw...@redhat.com]
> > > > > Am 26.09.2016 um 10:08
On Tue, Sep 27, 2016 at 05:03:17PM -0500, Eric Blake wrote:
> On 09/27/2016 08:13 AM, Daniel P. Berrange wrote:
> > If given an option string such as
> >
> > size=1024,nodes=10,nodes=4-5,nodes=1-2,policy=bind
> >
> > the qemu_opts_to_qdict() method will currently overwrite
> > the values for re
On Tue, Sep 27, 2016 at 05:12:04PM -0500, Eric Blake wrote:
> On 09/27/2016 05:10 PM, Eric Blake wrote:
> > On 09/27/2016 08:13 AM, Daniel P. Berrange wrote:
> >> The input_visitor_test_add() method was accepting an instance
> >> of 'TestInputVisitorData' and passing it as the 'user_data'
> >> para
Am 27.09.2016 um 21:42 hat Peter Maydell geschrieben:
> On 27 September 2016 at 06:53, Kevin Wolf wrote:
> > The following changes since commit 7cfdc02dae0d2ff58c897496cfdbbafc0eda0f3f:
> >
> > Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
> > (2016-09-26 19:47:00 +0
On Wed, Sep 28, 2016 at 11:34 AM, Fam Zheng wrote:
> On Wed, 09/28 11:14, Roman Penyaev wrote:
>> On Wed, Sep 28, 2016 at 5:01 AM, Fam Zheng wrote:
>> > On Tue, 09/27 19:55, Roman Penyaev wrote:
>> >> > The bug is 100% deterministic. Just boot up a guest with -drive
>> >> > format=qcow2,aio=nati
Am 28.09.2016 um 11:32 hat Pavel Dovgalyuk geschrieben:
> > From: Kevin Wolf [mailto:kw...@redhat.com]
> > Am 27.09.2016 um 16:06 hat Pavel Dovgalyuk geschrieben:
> > > > From: Kevin Wolf [mailto:kw...@redhat.com]
> > > > Am 26.09.2016 um 11:51 hat Pavel Dovgalyuk geschrieben:
> > > > > > From: Kev
So now edu device can support both line or msi interrupt, depending on
how user configures it.
Signed-off-by: Peter Xu
---
I'd like to have edu device as the test device for future IOMMU unit
test. MSI is required for that.
Hope this patch won't bring more homework for university students.
Am 27.09.2016 um 18:55 hat Paolo Bonzini geschrieben:
>
>
> On 27/09/2016 18:29, Stefan Hajnoczi wrote:
> > On Tue, Sep 27, 2016 at 5:20 PM, Paolo Bonzini wrote:
> >>
> >>
> >> On 27/09/2016 16:06, Stefan Hajnoczi wrote:
> >>> See the doc comments for a description of this new coroutine API.
> >
On 2016年09月28日 11:12, Peter Xu wrote:
On Tue, Sep 27, 2016 at 06:11:59AM -0400, Paolo Bonzini wrote:
I think we should keep it as it is, because Jason's patchset will only
support intel-iommu, not amd-iommu. For now, it won't have problem
(just like Intel IOMMU one). But after Jason's patch is
On 28/09/2016 11:48, Peter Xu wrote:
> So now edu device can support both line or msi interrupt, depending on
> how user configures it.
>
> Signed-off-by: Peter Xu
> ---
>
> I'd like to have edu device as the test device for future IOMMU unit
> test. MSI is required for that.
>
> Hope this
Hi Paolo,
> -Original Message-
> From: Wu, Feng
> Sent: Thursday, September 22, 2016 12:12 AM
> To: qemu-devel@nongnu.org
> Cc: pbonz...@redhat.com; Wu, Feng
> Subject: [PATCH] intel-iommu: Check IOAPIC's Trigger Mode against the one in
> IRTE
>
> The Trigger Mode field of IOAPIC must m
On 28/09/2016 12:05, Wu, Feng wrote:
> Hi Paolo,
>
>
>> -Original Message-
>> From: Wu, Feng
>> Sent: Thursday, September 22, 2016 12:12 AM
>> To: qemu-devel@nongnu.org
>> Cc: pbonz...@redhat.com; Wu, Feng
>> Subject: [PATCH] intel-iommu: Check IOAPIC's Trigger Mode against the one in
On Wed, Sep 28, 2016 at 11:03:15AM +0200, Juan Quintela wrote:
> "Dr. David Alan Gilbert" wrote:
> > * Stefan Hajnoczi (stefa...@gmail.com) wrote:
> >> On Mon, Aug 29, 2016 at 06:56:42PM +, Felipe Franciosi wrote:
> >> > Heya!
> >> >
> >> > > On 29 Aug 2016, at 08:06, Stefan Hajnoczi wrote:
On Wed, Sep 28, 2016 at 01:30:39PM +0800, Wang WeiWei wrote:
Please send a proper commit message and commit description. "modify
top-id's comments" says almost nothing and there is no commit
description. I don't know why you are making this change so I can't
review and apply it.
> Signed-off-by
> On 28 Sep 2016, at 10:03, Juan Quintela wrote:
>
> "Dr. David Alan Gilbert" wrote:
>> * Stefan Hajnoczi (stefa...@gmail.com) wrote:
>>> On Mon, Aug 29, 2016 at 06:56:42PM +, Felipe Franciosi wrote:
Heya!
> On 29 Aug 2016, at 08:06, Stefan Hajnoczi wrote:
>
> At KV
On Wed, Sep 28, 2016 at 12:21:37PM +0200, Paolo Bonzini wrote:
>
>
> On 28/09/2016 12:05, Wu, Feng wrote:
> > Hi Paolo,
> >
> >
> >> -Original Message-
> >> From: Wu, Feng
> >> Sent: Thursday, September 22, 2016 12:12 AM
> >> To: qemu-devel@nongnu.org
> >> Cc: pbonz...@redhat.com; Wu, F
On Mon, Sep 26, 2016 at 09:17:33AM +0200, Rabin Vincent wrote:
> On Tue, Sep 13, 2016 at 12:18:00AM +0200, Edgar E. Iglesias wrote:
> > On Mon, Sep 05, 2016 at 01:54:11PM +0200, Rabin Vincent wrote:
> > > diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c
> > > index a3da425..33
On Wed, Sep 28, 2016 at 11:59:19AM +0200, Paolo Bonzini wrote:
[...]
> > @@ -87,6 +87,10 @@ An IRQ is generated when written to the interrupt raise
> > register. The value
> > appears in interrupt status register when the interrupt is raised and has
> > to
> > be written to the interrupt ackn
On Wed, Sep 28, 2016 at 06:42:50PM +0800, Peter Xu wrote:
[...]
> > > @@ -341,6 +351,7 @@ static void pci_edu_realize(PCIDevice *pdev, Error
> > > **errp)
> > > edu, QEMU_THREAD_JOINABLE);
> > >
> > > pci_config_set_interrupt_pin(pci_conf, 1);
> > > +msi_init(p
Hi Marc,
> On 27 Sep 2016, at 18:12, Marc-André Lureau wrote:
>
> Hi
>
> - Original Message -
>> When QIOChannels were introduced in 666a3af9, the feature bits were
>> defined shifted. However, when using them, the code was shifting them
>> again. The incorrect use was consistent until
> -Original Message-
> From: Peter Xu [mailto:pet...@redhat.com]
> Sent: Wednesday, September 28, 2016 6:35 PM
> To: Paolo Bonzini
> Cc: Wu, Feng ; qemu-devel@nongnu.org; Michael S.
> Tsirkin
> Subject: Re: [PATCH] intel-iommu: Check IOAPIC's Trigger Mode against the one
> in IRTE
>
>
Hi
- Original Message -
> Hi Marc,
>
> > On 27 Sep 2016, at 18:12, Marc-André Lureau wrote:
> >
> > Hi
> >
> > - Original Message -
> >> When QIOChannels were introduced in 666a3af9, the feature bits were
> >> defined shifted. However, when using them, the code was shifting the
On Wed, Sep 28, 2016 at 10:55:33AM +, Felipe Franciosi wrote:
> Hi Marc,
>
> > On 27 Sep 2016, at 18:12, Marc-André Lureau wrote:
> >
> > Hi
> >
> > - Original Message -
> >> When QIOChannels were introduced in 666a3af9, the feature bits were
> >> defined shifted. However, when usin
Hi
- Original Message -
> Hi
>
> - Original Message -
> > Hi Marc,
> >
> > > On 27 Sep 2016, at 18:12, Marc-André Lureau wrote:
> > >
> > > Hi
> > >
> > > - Original Message -
> > >> When QIOChannels were introduced in 666a3af9, the feature bits were
> > >> defined shi
Thanks, this looks much better! A few more remarks and code smells, but
much smaller than the previous review.
> +static int32_t
> +vxhs_qnio_iio_ioctl(void *apictx, uint32_t rfd, uint32_t opcode, int64_t *in,
> +void *ctx, uint32_t flags)
The "BDRVVXHSState *s, int idx" inte
On Tue, Sep 27, 2016 at 09:09:49PM -0700, Ashish Mittal wrote:
> +vxhs_bdrv_init(const char c) "Registering VxHS AIO driver%c"
Why do several trace events have a %c format specifier at the end and it
always takes a '.' value?
> +#define QNIO_CONNECT_TIMOUT_SECS120
This isn't used and there i
First patch cleans up the code a little bit by moving all lines
related to setting the "ibm,pa-features" property into a separate
function. The second patch fixes a problem with detecting the
PowerISA version there. And the third patch takes care of setting
the bit for Transactional Memory only if
The function spapr_populate_cpu_dt() has become quite big
already, and since we likely have to extend the pa-features
property for every new processor generation, it is nicer
if we put the related code into a separate function.
Signed-off-by: Thomas Huth
---
hw/ppc/spapr.c | 66 +
KVM-PR currently does not support transactional memory, and the
implementation in TCG is just a fake. We should not announce TM
support in the ibm,pa-features property when running on such a
system, so disable it by default and only enable it if the KVM
implementation supports it (i.e. recent versi
The current code uses pa_features_206 for POWERPC_MMU_2_06, and
for everything else, it uses pa_features_207. This is bad in some
cases because there is also a "degraded" MMU version of ISA 2.06,
called POWERPC_MMU_2_06a, which should of course use the flags for
2.06 instead. And there is also the
On 28/09/2016 12:54, Peter Xu wrote:
> On Wed, Sep 28, 2016 at 06:42:50PM +0800, Peter Xu wrote:
>
> [...]
>
@@ -341,6 +351,7 @@ static void pci_edu_realize(PCIDevice *pdev, Error
**errp)
edu, QEMU_THREAD_JOINABLE);
pci_config_set_interru
Thomas Huth writes:
> On 28.09.2016 07:31, Nikunj A Dadhania wrote:
>> This series contains 7 new instructions for POWER9 ISA3.0
>> Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x.
>>
>> GCC was adding epilogue for every VSX instructions causing change in
>> behaviour. For
On Tue, Sep 27, 2016 at 09:09:49PM -0700, Ashish Mittal wrote:
> This patch adds support for a new block device type called "vxhs".
> Source code for the library that this code loads can be downloaded from:
> https://github.com/MittalAshish/libqnio.git
>
> Sample command line using JSON syntax:
>
This switches over spice (in opengl mode) to render DisplaySurface
updates into a opengl texture, using the helper functions in
ui/console-gl.c. With this patch applied spice (with gl=on) will
stop using qxl rendering ops, it will use dma-buf passing all the
time, i.e. for bios/bootloader (before
From: Alex Bennée
When enabling the sanitizer build it will complain about control
reaching a non-void function. Normally the compiler should detect that
there is only one possible exit given a static VNC_SERVER_FB_BYTES.
As we always expect a static VNC_SERVER_FB_BYTES I've added a compile
time
From: Marc-André Lureau
virtio-gpu does a set-scanout at each frame (it might be a driver
regression). qemu_console_resize() recreate a surface even if the size
didn't change, and this shows up in profiling reports because the
surface is cleared. With this patch, I get a +15-20% glmark2
improveme
ommit 7cfdc02dae0d2ff58c897496cfdbbafc0eda0f3f:
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
(2016-09-26 19:47:00 +0100)
are available in the git repository at:
git://git.kraxel.org/qemu tags/pull-ui-20160928-1
for you to fetch changes up to d9d2663c336b4ff7af9528f2cd373679
Keep track of gl_block state (added in bba19b8 console: block rendering
until client is done) in QemuConsole and allow to query it. This way
we can avoid state inconsistencies in case different code paths make use
of this.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Marc-André Lureau
Message-id:
When QIOChannels were introduced in 666a3af9, the feature bits were
already defined shifted. However, when using them, the code was shifting
them again. The incorrect use was consistent until 74b6ce43, where
QIO_CHANNEL_FEATURE_LISTEN was defined shifted but tested unshifted.
This patch changes th
Parts of the code have been testing QIOChannel features directly with a
logical AND. This patch makes it all consistent by using the
qio_channel_has_feature() function to test if a feature is present.
Signed-off-by: Felipe Franciosi
---
io/channel-socket.c |3 ++-
io/channel-tls.c |
On Tue, Sep 27, 2016 at 09:09:49PM -0700, Ashish Mittal wrote:
> This patch adds support for a new block device type called "vxhs".
> Source code for the library that this code loads can be downloaded from:
> https://github.com/MittalAshish/libqnio.git
>
> Sample command line using JSON syntax:
>
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