Define a new CPU definition supporting 24KEc cores, similar to
the existing 24Kc, but with added support for DSP instructions
and MIPS16e (and without FPU).
Signed-off-by: André Draszik
---
target-mips/translate_init.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/t
Hi Peter,
Please, check the comments below. Thanks a lot!
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Tuesday, July 26, 2016 1:06 AM
> To: 이광우(LEE KWANGWOO) MS SW
> Cc: Xiao Guangrong; Michael S. Tsirkin; Igor Mammedov; Paolo Bonzini; Richard
> He
On 07/26/2016 01:01 PM, Amit Shah wrote:
On (Tue) 05 Jul 2016 [18:47:40], Michael S. Tsirkin wrote:
From: Cao jin
internal flag msi_in_use in unnecessary, msi_uninit() could be called
directly, and msi_enabled() is enough to check device msi state.
cc: Markus Armbruster
cc: Marcel Apfelbau
Hi,
Recently I'm trying to use usb keyboard and mouse with QEMU on ARM64. Below is
my QEMU command line,
host and guest kernel both are 4.7.0-rc7+, and I ran it on Hikey board.
qemu-system-aarch64 \
-smp 1 -cpu host -enable-kvm \
-m 256 -M virt \
-k en-us \
-nographic \
-
On Tue, 26 Jul 2016 10:41:38 +0530
Amit Shah wrote:
> On (Wed) 20 Jul 2016 [12:08:32], Eduardo Habkost wrote:
> > From: Igor Mammedov
> >
> > instance_id is generated by last_used_id + 1 for a given device type
> > so for QEMU with 3 CPUs instance_id for APICs is a seti of [0, 1, 2]
> > When CP
On 26 July 2016 at 09:34, Shannon Zhao wrote:
> Hi,
>
> Recently I'm trying to use usb keyboard and mouse with QEMU on ARM64. Below
> is my QEMU command line,
> host and guest kernel both are 4.7.0-rc7+, and I ran it on Hikey board.
>
> qemu-system-aarch64 \
> -smp 1 -cpu host -enable-kvm
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
Signed-off-by: Wang WeiWei
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
---
block/backup.c | 18 ++
include/block/block_backup.h | 25 +
2 files changed,
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
Signed-off-by: Wang WeiWei
---
block.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/block.c b/block.c
index 30d64e6..194a060 100644
--- a/block.c
+++ b/block.c
@@ -1311,6 +1311,23 @@ void bdr
Normal backup(sync='none') workflow:
step 1. NBD peformance I/O write from client to server
qcow2_co_writev
bdrv_co_writev
...
bdrv_aligned_pwritev
notifier_with_return_list_notify -> backup_do_cow
bdrv_driver_pwritev // write new contents
step 2. drive-backup s
Block replication is a very important feature which is used for
continuous checkpoints(for example: COLO).
You can get the detailed information about block replication from here:
http://wiki.qemu.org/Features/BlockReplication
Usage:
Please refer to docs/block-replication.txt
You can get the patc
This commit introduces six replication interfaces(for block, network etc).
Firstly we can use replication_(new/remove) to create/destroy replication
instances, then in migration we can use replication_(start/stop/do_checkpoint
/get_error)_all to handle all replication operations. More detail please
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
Signed-off-by: Wang WeiWei
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
---
block/Makefile.objs | 1 +
block/replication.c | 658
2 files changed, 659 in
From: Wen Congyang
Some programs that add a dependency on it will use
the block layer directly.
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
Signed-off-by: Wang WeiWei
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Jeff Cody
---
From: Wen Congyang
Auto complete mirror job in background to prevent from
blocking synchronously
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
Signed-off-by: Wang WeiWei
---
block/mirror.c| 13 +
blockdev.c| 2 +-
include/block/block_int.h
configure --(enable/disable)-replication to switch replication
support on/off, and it is on by default.
We later introduce replation support.
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
Signed-off-by: Wang WeiWei
---
configure | 11 +++
1 file changed, 11 insertions(+)
di
As per Stefan's suggestion, add Wen and I as co-maintainers
of replication.
Cc: Stefan Hajnoczi
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d1439a8..8fa2a25 100644
--- a/MAI
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
Signed-off-by: Wang WeiWei
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
---
docs/block-replication.txt | 239 +
1 file changed, 239 insertions(+)
create mode 10064
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
Signed-off-by: Wang WeiWei
---
tests/.gitignore | 1 +
tests/Makefile.include | 4 +
tests/test-replication.c | 575 +++
3 files changed, 580 insertions(+)
create mode 100644 test
On 26 July 2016 at 06:08, Alistair Francis wrote:
> I think this function should work:
>
> /*
> * qemu_allocate_or_irqs
> * @in_irq: An input IRQ. It will be the result of the @out_irqs ORed together
> * @n: The number of interrupt lines that should be ORed together
> *
> * returns: An array
From: Wen Congyang
Signed-off-by: Wen Congyang
Signed-off-by: Changlong Xie
Signed-off-by: Wang WeiWei
Signed-off-by: zhanghailiang
Signed-off-by: Gonglei
Reviewed-by: Eric Blake
---
qapi/block-core.json | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --
On 26 July 2016 at 08:03, kwangwoo@sk.com wrote:
> Hi Peter,
>
> Please, check the comments below. Thanks a lot!
>
>> -Original Message-
>> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
>> This seems to be missing code to write the device tree
>> information about whatever this
On Tue, Jul 26, 2016 at 02:23:52AM +0200, Max Reitz wrote:
> On 22.07.2016 10:00, Amit Shah wrote:
> > From: "Daniel P. Berrange"
> >
> > The iotests module has a python class for controlling QEMU
> > processes. Pull the generic functionality out of this file
> > and create a scripts/qemu.py modu
Hi
On Mon, Jul 25, 2016 at 7:03 PM, Emilio G. Cota wrote:
> In qdist_bin__internal(), to->entries is initialized to a 1-element array,
> which we then leak when n == from->n. Fix it.
>
> Signed-off-by: Emilio G. Cota
> ---
> util/qdist.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
On 2016/7/26 16:07, Ard Biesheuvel wrote:
> On 26 July 2016 at 09:34, Shannon Zhao wrote:
>> > Hi,
>> >
>> > Recently I'm trying to use usb keyboard and mouse with QEMU on ARM64.
>> > Below is my QEMU command line,
>> > host and guest kernel both are 4.7.0-rc7+, and I ran it on Hikey board.
>>
Hi
On Mon, Jul 25, 2016 at 7:03 PM, Emilio G. Cota wrote:
> While at it, remove the unnecessary parentheses around dist->size.
>
> Signed-off-by: Emilio G. Cota
> ---
> util/qdist.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/util/qdist.c b/util/qdist.c
> index
My previous commit 2e2aa316 removed internal flag msi_in_use, which
exists in vmstate, use VMSTATE_UNUSED for migration compatibility.
Reported-by: Amit Shah
Suggested-by: Amit Shah
Cc: Markus Armbruster
Cc: Marcel Apfelbaum
Cc: Paolo Bonzini
Cc: Michael S. Tsirkin
Cc: Amit Shah
Signed-off-
If git bisect says something about "XX revisions left to test after this" then
you're not done yet, you have to continue the git bisecting process until it is
finished.
And if you need the sdl2 patch additionally, you have to apply it manually
after each step if necessary. I'm sorry, it's quite
Hi T,
Ok. I m sorry i was thinking only this was needed i will made the other git
bisect and report
Luigi
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1603636
Title:
Guest has not initialized t
On 23/07/2016 08:30, David Gibson wrote:
> On Fri, Jul 22, 2016 at 09:28:58AM +0200, Laurent Vivier wrote:
>>
>>
>> On 22/07/2016 08:43, David Gibson wrote:
>>> On Thu, Jul 21, 2016 at 06:47:56PM +0200, Laurent Vivier wrote:
As userfaultfd syscall is available on powerpc, migration
post
On 26.07.2016 11:23, Laurent Vivier wrote:
>
>
> On 23/07/2016 08:30, David Gibson wrote:
>> On Fri, Jul 22, 2016 at 09:28:58AM +0200, Laurent Vivier wrote:
>>>
>>>
>>> On 22/07/2016 08:43, David Gibson wrote:
On Thu, Jul 21, 2016 at 06:47:56PM +0200, Laurent Vivier wrote:
> As userfault
> Update the build flags appropriately for FreeBSD and add the correct
> LD_EMULATION type for the FreeBSD build case.
>
> Signed-off-by: Sean Bruno
I posted the right fix a couple days ago, but didn't manage to send a pull
request before leaving and I am on mobile until next Monday.
Search t
On 26/07/2016 11:28, Thomas Huth wrote:
> On 26.07.2016 11:23, Laurent Vivier wrote:
>>
>>
>> On 23/07/2016 08:30, David Gibson wrote:
>>> On Fri, Jul 22, 2016 at 09:28:58AM +0200, Laurent Vivier wrote:
On 22/07/2016 08:43, David Gibson wrote:
> On Thu, Jul 21, 2016 at 06:47:56
On Tue, 26 Jul 2016 10:41:38 +0530
Amit Shah wrote:
> On (Wed) 20 Jul 2016 [12:08:32], Eduardo Habkost wrote:
> > From: Igor Mammedov
> >
> > instance_id is generated by last_used_id + 1 for a given device type
> > so for QEMU with 3 CPUs instance_id for APICs is a seti of [0, 1, 2]
> > When CP
On 26/07/2016 11:39, Laurent Vivier wrote:
>
>
> On 26/07/2016 11:28, Thomas Huth wrote:
>> On 26.07.2016 11:23, Laurent Vivier wrote:
>>>
>>>
>>> On 23/07/2016 08:30, David Gibson wrote:
On Fri, Jul 22, 2016 at 09:28:58AM +0200, Laurent Vivier wrote:
>
>
> On 22/07/2016 08:43,
* Laurent Vivier (lviv...@redhat.com) wrote:
>
>
> On 26/07/2016 11:39, Laurent Vivier wrote:
> >
> >
> > On 26/07/2016 11:28, Thomas Huth wrote:
> >> On 26.07.2016 11:23, Laurent Vivier wrote:
> >>>
> >>>
> >>> On 23/07/2016 08:30, David Gibson wrote:
> On Fri, Jul 22, 2016 at 09:28:58AM
On 26/07/2016 11:54, Dr. David Alan Gilbert wrote:
> * Laurent Vivier (lviv...@redhat.com) wrote:
>>
>>
>> On 26/07/2016 11:39, Laurent Vivier wrote:
>>>
>>>
>>> On 26/07/2016 11:28, Thomas Huth wrote:
On 26.07.2016 11:23, Laurent Vivier wrote:
>
>
> On 23/07/2016 08:30, David Gi
On 26.07.2016 11:53, Laurent Vivier wrote:
>
>
> On 26/07/2016 11:39, Laurent Vivier wrote:
>>
>>
>> On 26/07/2016 11:28, Thomas Huth wrote:
>>> On 26.07.2016 11:23, Laurent Vivier wrote:
On 23/07/2016 08:30, David Gibson wrote:
> On Fri, Jul 22, 2016 at 09:28:58AM +0200, Laure
On Fri, Jul 22, 2016 at 10:55:40AM +0100, Paul Burton wrote:
> The print routine provided as part of the in-built bootloader had a bug
> in that it attempted to use a jump instruction as part of a loop, but
> the target has its upper bits zeroed leading to control flow
> transferring to 0xb814
The '-display' help information is not very correct. This patch sort
it a little.
Also, in its help information, reveals what implicit display option
will be chosen if no definition.
Changelog:
v2:
--fix typo of 'display'
--change some discription words
Signed-off-by: Robert Ho
---
qemu-optio
'char const' means the same thing as 'const char', but we
use the former in only a handful of places and we use the
latter over six thousand times. Switch the imx reg_name()
functions to bring them in line with everything else.
Signed-off-by: Peter Maydell
---
Just a minor style nit I noticed. Th
On 25 July 2016 at 20:04, Michael Roth wrote:
> The following changes since commit 2d2e632ad00d11867c6c5625605b1fbc022dd62f:
>
> Update version for v2.7.0-rc0 release (2016-07-22 15:32:42 +0100)
>
> are available in the git repository at:
>
> git://github.com/mdroth/qemu.git tags/qga-pull-2016
From: Vijaya Kumar K
This series introduces support for GICv3 live migration with
new VGIC implementation in 4.7-rc3 kernel.
In this series, patch 2 & 3 of the previous implementation
are ported.
https://lists.nongnu.org/archive/html/qemu-devel/2015-10/msg05284.html
Kernel patches which implemen
From: Vijaya Kumar K
This temporary patch adds kernel API definitions. Use proper header update
procedure after these features are released.
Signed-off-by: Pavel Fedin
---
linux-headers/asm-arm64/kvm.h | 22 +-
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git
From: Vijaya Kumar K
This actually implements pre_save and post_load methods for in-kernel
vGICv3.
Signed-off-by: Pavel Fedin
Signed-off-by: Vijaya Kumar K
[Vijay: - Adjusted macros to handle gicr variables
- Used gicr_typer for affinity
- Made all GICD/GICR registers access as 32-bit.
- Al
On 26 July 2016 at 12:01, wrote:
> From: Vijaya Kumar K
>
> This actually implements pre_save and post_load methods for in-kernel
> vGICv3.
>
> Signed-off-by: Pavel Fedin
> Signed-off-by: Vijaya Kumar K
> [Vijay: - Adjusted macros to handle gicr variables
> - Used gicr_typer for affinity
> -
On (Tue) 26 Jul 2016 [15:29:36], Cao jin wrote:
> Hi Amit
>
> I will take care of this.
> BTW, did't see it in coverity scan outstanding defects, Do I missed or it is
> checked by other static check tools?
This is checked with the vmstate static checker --
scripts/vmstate-static-checker.py.
The
On Tue, Jul 26, 2016 at 12:42:45AM +0100, André Draszik wrote:
> Define a new CPU definition supporting 24KEc cores, similar to
> the existing 24Kc, but with added support for DSP instructions
> and MIPS16e (and without FPU).
>
> Signed-off-by: André Draszik
> ---
> target-mips/translate_init.c
Make raw_open for POSIX more consistent in handling errors by setting
the error object also when qemu_open fails. The error object was set
generally set in case of errors, but I guess this case was overlooked.
Do the same for win32.
Signed-off-by: Halil Pasic
Reviewed-by: Sascha Silbe
Tested-by:
On Tue, Jul 26, 2016 at 06:12:40AM +0530, Richard Henderson wrote:
> The return address argument to the softmmu template helpers was
> confused. In the legacy case, we wanted to indicate that there
> is no return address, and so passed in NULL. However, we then
> immediately subtracted GETPC_ADJ
.git tags/ppc-for-2.7-20160726
>
> for you to fetch changes up to 12bf2d33fe520f9cfd09f7bf9d46ae3202c3cb49:
>
> spapr: disintricate core-id from DT semantics (2016-07-25 15:43:41 +1000)
>
>
> ppc patch queue 2016
On (Tue) 26 Jul 2016 [10:00:49], Igor Mammedov wrote:
> On Tue, 26 Jul 2016 10:41:38 +0530
> Amit Shah wrote:
>
> > On (Wed) 20 Jul 2016 [12:08:32], Eduardo Habkost wrote:
> > > From: Igor Mammedov
> > >
> > > instance_id is generated by last_used_id + 1 for a given device type
> > > so for QEM
On 26 July 2016 at 01:12, Alistair Francis wrote:
> The Cadence GEM hardware supports N number priority queues, this patch is a
> step towards that by adding the property to set the queues. At the moment
> behaviour doesn't change as we only use queue 0.
>
> Signed-off-by: Alistair Francis
> ---
On (Tue) 26 Jul 2016 [17:03:23], Cao jin wrote:
> My previous commit 2e2aa316 removed internal flag msi_in_use, which
> exists in vmstate, use VMSTATE_UNUSED for migration compatibility.
>
> Reported-by: Amit Shah
> Suggested-by: Amit Shah
> Cc: Markus Armbruster
> Cc: Marcel Apfelbaum
> Cc: P
From: "Aneesh Kumar K.V"
The patch adds CPU PVR definition for POWER9 and enables QEMU to launch
guests/linux-user in TCG mode.
Signed-off-by: Aneesh Kumar K.V
[ Added POWER9 alias, POWER9 SPAPR core and dropped MMU defines ]
Signed-off-by: Nikunj A Dadhania
---
hw/ppc/spapr_cpu_core.c |
ISA 3.0 instruction for adding immediate value shifted with next
instruction address and return the result in the target register.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: David Gibson
---
target-ppc/translate.c | 26 ++
1 file changed, 26 insertions(+)
diff --git
Adding following instructions for ISA3.0 support
modud: Modulo Unsigned Dword
modsd: Modulo Signed Dword
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson opcode)],\
+cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \
+
ISA 3.0 Compare Ranged Byte instruction useful for
isupper/islower/isaplha kind of operation.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
---
target-ppc/translate.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/target-ppc/transla
This flag will be used for POWER9 instructions.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: David Gibson
---
target-ppc/cpu.h| 5 -
target-ppc/translate_init.c | 2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 5fce
Similar to divw, implement branch-less divd.
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate.c | 48 ++--
1 file changed, 26 insertions(+), 22 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 69d9ae0..ba22e13 1
Add ISA3.0: Count trailing zeros word instruction.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 5 +
target-ppc/translate.c | 11 +++
3 files changed, 17 insertions(+)
diff --git a/target-ppc/helper.
Adding following instructions:
moduw: Modulo Unsigned Word
modsw: Modulo Signed Word
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
---
target-ppc/translate.c | 48
1 file changed, 48 insertions(+)
diff --git a/target-ppc/trans
From: Sandipan Das
Add ISA3.0 Count trailing zeros double word
Signed-off-by: Sandipan Das
[ added ISA300 flag ]
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 5 +
target-ppc/translate.c | 10 ++
3
maddhd: Multiply-Add High Doubleword
maddhdu: Multiply-Add High Doubleword Unsigned
Above two instruction are dual form and differ by 1 bit
(31st bit)
Multiplies two 64-bit registers (RA * RB), adds third register(RC) to
the result(quadword) and returns the higher dword in the target
register(RT)
ISA 3.0 has introduced EO - Expanded Opcode. Introduce third level
indirect opcode table and corresponding parsing routines.
EO (11:12) Expanded opcode field
Formats: XX1
EO (11:15) Expanded opcode field
Formats: VX, X, XX2
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate.c | 82
Hi,
While I've been re-spinning the base patches I've brought forward some
of the async work for cputlb done on the ARM enabling set. Thanks to
Sergey's consolidation work we have a robust mechanism for halting all
vCPUs to get work done if we need to. The cputlb changes are actually
independent o
Search a byte in the stream of 8bytes provided in the register
Suggested-by: Richard Henderson
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 22 ++
target-ppc/translate.c | 12
3 f
While implementing modulo instructions figured out that the
implementation uses many branches. Change the logic to achieve the
branch-less code. Undefined value is set to dividend in case of invalid
input.
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate.c | 48 +++--
maddld: Multiply-Add Low Doubleword
Multiplies two 64-bit registers (RA * RB), adds third register(RC) to
the result(quadword) and returns the lower dword in the target
register(RT).
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
---
target-ppc/translate.c | 14 ++
From: Vivek Andrew Sha
The CR number is provided in the opcode as - BFA (11:13)
Returns:
-1 if bit 0 of CR field is set
1 if bit 1 of CR field is set
0 otherwise.
Signed-off-by: Vivek Andrew Sha
[ reworded commit, used 32bit ops as crf is 32bits ]
Signed-off-by: Nikunj A Dadhania
Revi
On 26 July 2016 at 01:12, Alistair Francis wrote:
> Signed-off-by: Alistair Francis
> ---
>
> There is a indentation error in this patch in the gem_transmit function.
> I have written it like that to make it easier to see the changes. It is
> fixed in the next patch.
>
> V2:
> - Use the new scre
On 26 July 2016 at 01:12, Alistair Francis wrote:
> The Cadence GEM hardware allows incoming data to be 'screened' based on some
> register values. Add support for these screens.
>
> Signed-off-by: Alistair Francis
> ---
> V2:
> - Initial commit
>
> hw/net/cadence_gem.c | 151
> +++
We forgot to do gen_update_nip() for these like we do with other
helpers. Fix this, but in a more efficient way by passing the RA
to the accessors instead so the overhead is only taken on faults.
Signed-off-by: Benjamin Herrenschmidt
---
target-ppc/mem_helper.c | 21 +++--
1 file
On (Tue) 26 Jul 2016 [11:41:33], Igor Mammedov wrote:
> On Tue, 26 Jul 2016 10:41:38 +0530
> Amit Shah wrote:
>
> > On (Wed) 20 Jul 2016 [12:08:32], Eduardo Habkost wrote:
> > > From: Igor Mammedov
> > >
> > > instance_id is generated by last_used_id + 1 for a given device type
> > > so for QEM
On Tue, 2016-07-26 at 06:12 +0530, Richard Henderson wrote:
> The return address argument to the softmmu template helpers was
> confused. In the legacy case, we wanted to indicate that there
> is no return address, and so passed in NULL. However, we then
> immediately subtracted GETPC_ADJ from NU
16.06.2016 15:25, Paolo Bonzini wrote:
> tpm_cleanup is called from main() and also registered with atexit from
> tpm_init. The function only visits the tpm_backends linked list, and the
> atexit registration happens right after tpm_init fills in the list from
> -tpmdev options. Therefore, the di
Applied to -trivial, thanks!
/mjt
16.06.2016 20:33, Thomas Huth wrote:
> There is no need to make sure that the memory is zeroed after the
> allocation if we also immediatly fill the whole buffer afterwards
> with memcpy(). Thus g_new0 should be g_new instead. But since we
> are also doing a memcpy() here, we can also simply replac
22.06.2016 18:34, Laurent Vivier wrote:
> Display the slot number of mhp_pc_dimm_assigned_slot()
> using "%d" without the "0x".
Applied to -trivial, thanks!
/mjt
20.06.2016 12:51, Laurent Vivier wrote:
> Display an exception number, generally defined as an hexadecimal
> number (for instance, EXCP_HLT is 0x10001).
Applied to -trivial, thanks!
/mjt
Applied to -trivial, thank you!
/mjt
On Thu, Jul 14, 2016 at 01:18:19PM +0100, Stefan Hajnoczi wrote:
> The following throttling behavior was observed with bps=512000
> bps_max=51200 throttling.bps-total-max-length=2:
>
> READ: io=512KB, aggrb=50KB/s, minb=50KB/s, maxb=50KB/s, mint=10061msec,
> maxt=10061msec
>
> If bps-total-ma
On Fri, Jul 08, 2016 at 05:05:12PM +0300, Alberto Garcia wrote:
> Hi,
>
> Stefan reported this, this is a regression caused by commit
> efaa7c4eeb7490c6f37f3.
>
> I sent a separate series for the git master, this is the backport
> for QEMU v2.6.0.
ping
Berto
On 26/07/2016 12:02, Thomas Huth wrote:
> On 26.07.2016 11:53, Laurent Vivier wrote:
>>
>>
>> On 26/07/2016 11:39, Laurent Vivier wrote:
>>>
>>>
>>> On 26/07/2016 11:28, Thomas Huth wrote:
On 26.07.2016 11:23, Laurent Vivier wrote:
>
>
> On 23/07/2016 08:30, David Gibson wrote:
>
On Tue, 26 Jul 2016 17:17:47 +0530
Amit Shah wrote:
> On (Tue) 26 Jul 2016 [10:00:49], Igor Mammedov wrote:
> > On Tue, 26 Jul 2016 10:41:38 +0530
> > Amit Shah wrote:
> >
> > > On (Wed) 20 Jul 2016 [12:08:32], Eduardo Habkost wrote:
> > > > From: Igor Mammedov
> > > >
> > > > instance_id
On 26/07/2016 14:53, Laurent Vivier wrote:
>
>
> On 26/07/2016 12:02, Thomas Huth wrote:
>> On 26.07.2016 11:53, Laurent Vivier wrote:
>>>
>>>
>>> On 26/07/2016 11:39, Laurent Vivier wrote:
On 26/07/2016 11:28, Thomas Huth wrote:
> On 26.07.2016 11:23, Laurent Vivier wrote:
>
On Mon, Jul 25, 2016 at 05:58:54PM +0200, Markus Armbruster wrote:
> Stefan Hajnoczi writes:
>
> > On Thu, Jul 21, 2016 at 10:41:53AM +0200, Reda Sallahi wrote:
> >> img_open_file() and img_open_opts() were printing error messages with a
> >> duplicate part because of a wrong use of error_reportf
On Tue, Jul 26, 2016 at 04:48:06PM +0530, Amit Shah wrote:
> On (Tue) 26 Jul 2016 [15:29:36], Cao jin wrote:
> > Hi Amit
> >
> > I will take care of this.
> > BTW, did't see it in coverity scan outstanding defects, Do I missed or it is
> > checked by other static check tools?
>
> This is checked
On (Tue) 26 Jul 2016 [14:58:39], Igor Mammedov wrote:
> > This was flagged by a nightly run of the static checker when this
> > series was pulled. On a 'before' tree, ie one w/o the patches, do
> > this:
> >
> > qemu -dump-vmstate before.json
> >
> > and for after:
> >
> > qemu -dump-vmstate af
The previous commit refactoring iotests.py:
commit 66613974468fb6e1609fb3eabf55981b1ee436cf
Author: Daniel P. Berrange
Date: Wed Jul 20 14:23:10 2016 +0100
scripts: refactor the VM class in iotests for reuse
was not properly tested and included a number of broken
bits.
- The 'even
On Thu, Jul 21, 2016 at 01:34:48PM -0600, Eric Blake wrote:
> Dell Equallogic iSCSI SANs have a very unusual advertised geometry:
>
> $ iscsi-inq -e 1 -c $((0xb0)) iscsi://XXX/0
> wsnz:0
> maximum compare and write length:1
> optimal transfer length granularity:0
> maximum transfer length:0
> opti
On Tue, 26 Jul 2016 18:41:22 +0530
Amit Shah wrote:
> On (Tue) 26 Jul 2016 [14:58:39], Igor Mammedov wrote:
> > > This was flagged by a nightly run of the static checker when this
> > > series was pulled. On a 'before' tree, ie one w/o the patches, do
> > > this:
> > >
> > > qemu -dump-vmstate
QEMU fails migration with following error:
qemu-system-x86_64: Missing section footer for i2c_bus
qemu-system-x86_64: load of migration failed: Invalid argument
when migrating from:
qemu-system-x86_64-v2.6.0 -m 256M rhel72.img -M pc-i440fx-2.6
to
qemu-system-x86_64-v2.7.0-rc0 -m 256M rhel72.i
On Tue, Jul 26, 2016 at 11:58:17AM +0200, Laurent Vivier wrote:
>
>
> On 26/07/2016 11:54, Dr. David Alan Gilbert wrote:
> > * Laurent Vivier (lviv...@redhat.com) wrote:
> >>
> >>
> >> On 26/07/2016 11:39, Laurent Vivier wrote:
> >>>
> >>>
> >>> On 26/07/2016 11:28, Thomas Huth wrote:
> On 2
On Tue, Jul 26, 2016 at 03:55:30PM +0200, Igor Mammedov wrote:
> QEMU fails migration with following error:
>
> qemu-system-x86_64: Missing section footer for i2c_bus
> qemu-system-x86_64: load of migration failed: Invalid argument
>
> when migrating from:
> qemu-system-x86_64-v2.6.0 -m 256M rh
The main use case for tlb_reset_dirty is to set the TLB_NOTDIRTY flags
in TLB entries to force the slow-path on writes. This is used to mark
page ranges containing code which has been translated so it can be
invalidated if written to. To do this safely we need to ensure the TLB
entries in question
On Tue, 26 Jul 2016 18:41:22 +0530
Amit Shah wrote:
> On (Tue) 26 Jul 2016 [14:58:39], Igor Mammedov wrote:
> > > This was flagged by a nightly run of the static checker when this
> > > series was pulled. On a 'before' tree, ie one w/o the patches, do
> > > this:
> > >
> > > qemu -dump-vmstate
This patchset continues with the Netduino 2 and STM32F205 SoC
work.
This patch series makes a small change to the STM32F2xx
SoC to tidy up the code.
Next a feature is added to the STM32F2xx timer to display the
PWM duty cycle, when debugging is enabled.
Then the STM32F2xx SPI and ADC devices are
Cleanup the individual DeviceState and SysBusDevice
variables to re-use the same variable for each
device.
Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
---
hw/arm/stm32f205_soc.c | 35 +--
1 file changed, 17 insertions(+), 18 deletions(-)
diff
Add the STM32F2xx ADC device. This device randomly
generates values on each read.
This also includes creating a hw/adc directory.
Signed-off-by: Alistair Francis
Reviewed-by: Peter Maydell
---
V4:
- Remove the rand() function
- Add VMState
- Small cleanups
V2:
- Address Peter C's comments
Add Alistair Francis as the maintainer for the Netduino 2
and SMM32F205 SoC.
Signed-off-by: Alistair Francis
Reviewed-by: Peter Crosthwaite
---
MAINTAINERS | 15 +++
1 file changed, 15 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d1439a8..e55be55 100644
--- a/MAINTAI
1 - 100 of 317 matches
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