[Qemu-devel] [PATCH v2 6/6] tcg: cpu-exec: roll-up tb_find_fast/slow

2016-07-05 Thread Alex Bennée
In an effort not to re-take locks I've re-factored the code so everything is done inside the new tb_find function. The fast path will only take a lock if the previous TB needs patching. The generation path will do the patching inside the generation critical section. Signed-off-by: Alex Bennée ---

[Qemu-devel] Login and Password Request

2016-07-05 Thread Shiv Arora
Hi Developers I use the qemu command to up my virtual OS. But after that command executes it ask for localhost.localdomain.localdomain login: Password: I don`t want to add the login and password manually as i have to launch mutliple virtual OS and adding the login and password to each is not an

Re: [Qemu-devel] [PATCH 1/1] Improve block job rate limiting for small bandwidth values

2016-07-05 Thread Max Reitz
On 04.07.2016 16:30, Sascha Silbe wrote: > Dear Max, > > Max Reitz writes: > >> On 28.06.2016 17:28, Sascha Silbe wrote: > [block/mirror.c] >>> @@ -416,7 +416,9 @@ static uint64_t coroutine_fn >>> mirror_iteration(MirrorBlockJob *s) >>> assert(io_sectors); >>> sector_num += io

[Qemu-devel] [PULL 36/43] block: Convert bdrv_read() to BdrvChild

2016-07-05 Thread Kevin Wolf
Signed-off-by: Kevin Wolf Reviewed-by: Max Reitz Acked-by: Stefan Hajnoczi --- block/io.c| 4 ++-- block/qcow2-cluster.c | 6 +++--- block/vdi.c | 4 ++-- block/vvfat.c | 2 +- include/block/block.h | 2 +- 5 files changed, 9 insertions(+), 9 deletions(-) diff --g

Re: [Qemu-devel] [PATCH v2] Use "-s" instead of "--quiet" to resolve non-fatal build error on FreeBSD.

2016-07-05 Thread Paolo Bonzini
On 14/06/2016 20:07, Sean Bruno wrote: > The --quiet argument is not available on all operating systems. Use -s > instead to match the rest of the Makefile uses. This fixes a non-fatal > error seen on FreeBSD. > > Signed-off-by: Sean Bruno > --- > Makefile | 2 +- > 1 file changed, 1 inserti

[Qemu-devel] [PATCH v1 3/2] crypto: don't open-code qcrypto_hash_supports

2016-07-05 Thread Daniel P. Berrange
Call the existing qcrypto_hash_supports method from qcrypto_hash_bytesv instead of open-coding it again. Signed-off-by: Daniel P. Berrange --- crypto/hash-gcrypt.c | 3 +-- crypto/hash-glib.c | 3 +-- crypto/hash-nettle.c | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/

[Qemu-devel] [PULL 37/43] block: Convert bdrv_write() to BdrvChild

2016-07-05 Thread Kevin Wolf
Signed-off-by: Kevin Wolf Acked-by: Stefan Hajnoczi --- block/io.c | 5 +++-- block/qcow.c | 45 - block/qcow2-cluster.c | 2 +- block/qcow2-refcount.c | 2 +- block/qcow2.c | 47 ++

[Qemu-devel] [PATCH v2 2/6] tcg: set up tb->page_addr before insertion

2016-07-05 Thread Alex Bennée
This ensures that if we find the TB on the slow path that tb->page_addr is correctly set before being tested. Signed-off-by: Alex Bennée --- translate-all.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/translate-all.c b/translate-all.c index 96efe48..97e834a 100644

[Qemu-devel] [PULL 39/43] block: Convert bdrv_pwrite(v/_sync) to BdrvChild

2016-07-05 Thread Kevin Wolf
Signed-off-by: Kevin Wolf Reviewed-by: Max Reitz Acked-by: Stefan Hajnoczi --- block/io.c | 17 - block/parallels.c | 6 +++--- block/qcow.c | 14 +++--- block/qcow2-cache.c| 2 +- block/qcow2-cluster.c | 6 +++--- block/qcow2-refcount.

[Qemu-devel] [PATCH v2 1/6] tcg: Ensure safe tb_jmp_cache lookup out of 'tb_lock'

2016-07-05 Thread Alex Bennée
From: Sergey Fedorov First, ensure atomicity of CPU's 'tb_jmp_cache' access by: * using atomic_read() to look up a TB when not holding 'tb_lock'; * using atomic_write() to remove a TB from each CPU's local cache on TB invalidation. Second, add some memory barriers to ensure we don't put the

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

2016-07-05 Thread Alex Williamson
On Tue, 5 Jul 2016 09:36:27 +0800 Zhou Jie wrote: > ping Due to weekend and holiday in my country, there were zero regular working hours between your emails. > On 2016/7/3 12:00, Zhou Jie wrote: > > Hi Alex, > > > > On 2016/6/30 9:45, Zhou Jie wrote: > >> Hi Alex, > >> > >> On 2016/6/30 2:22

[Qemu-devel] [PATCH v2 3/6] tcg: cpu-exec: remove tb_lock from the hot-path

2016-07-05 Thread Alex Bennée
Lock contention in the hot path of moving between existing patched TranslationBlocks is the main drag in multithreaded performance. This patch pushes the tb_lock() usage down to the two places that really need it: - code generation (tb_gen_code) - jump patching (tb_add_jump) The rest of the c

[Qemu-devel] [PULL 42/43] block: Convert bdrv_co_preadv/pwritev to BdrvChild

2016-07-05 Thread Kevin Wolf
This is the final patch for converting the common I/O path to take a BdrvChild parameter instead of BlockDriverState. The completion of this conversion means that all users that perform I/O on an image need to actually hold a reference (in the form of BdrvChild, possible as part of a BlockBackend)

Re: [Qemu-devel] [PATCH v8 0/5] Add a generic loader

2016-07-05 Thread Alistair Francis
On Mon, Jul 4, 2016 at 5:22 AM, Peter Maydell wrote: > On 2 July 2016 at 02:07, Alistair Francis wrote: >> This work is based on the original work by Li Guang with extra >> features added by Peter C and myself. >> >> The idea of this loader is to allow the user to load multiple images >> or value

Re: [Qemu-devel] [PATCH RFC v3 1/5] tests: New make target check-source

2016-07-05 Thread Sascha Silbe
Dear Markus, I looked into the s390x specific failures as it would be nice to get them fixed up right away. Fortunately it looks like all of them are related to known shortcomings of the header check rather than actual issues with the header files, so there's nothing for me to do. ;) Markus Arm

[Qemu-devel] [PULL 38/43] block: Convert bdrv_pread(v) to BdrvChild

2016-07-05 Thread Kevin Wolf
Signed-off-by: Kevin Wolf Reviewed-by: Max Reitz Acked-by: Stefan Hajnoczi --- block.c| 7 --- block/bochs.c | 6 +++--- block/cloop.c | 8 block/crypto.c | 2 +- block/dmg.c| 21 +++-- block/io.c

Re: [Qemu-devel] [PATCH 0/2] qcow2: Fix qcow2_get_cluster_offset()

2016-07-05 Thread Max Reitz
On 20.06.2016 16:26, Max Reitz wrote: > Patch 2 fixes a wrong assertion in qcow2_get_cluster_offet(). Patch 1 > fixes wrong range limitations I encountered in qemu-io while trying to > break that wrong assertion. > > Not CC-ing qemu-stable because these issues were introduced after 2.6.0. > > >

[Qemu-devel] [PATCH] virtio-mmio: format transport base address in BusClass.get_dev_path

2016-07-05 Thread Laszlo Ersek
At the moment the following QEMU command line triggers an assertion failure (minimal reproducer by Cole): qemu-system-aarch64 \ -machine virt-2.6,accel=tcg \ -nodefaults \ -no-user-config \ -nographic -monitor stdio \ -device virtio-scsi-device,id=scsi0 \ -device virtio-s

[Qemu-devel] [Bug 1594239] Re: After adding more scsi disks for Aarch64 virtual machine, start the VM and got Qemu Error

2016-07-05 Thread Tom Hanson
I haven't dug into the code for this particular aspect (yet) but it sounds like when a scsi-hd device is specified with a virtio backend but with no virtio bus specified, it is defaulting to an MMIO bus. Is this correct? A few questions: 1) Is it valid for a SCSI drive to default to an MMIO bus

Re: [Qemu-devel] [PATCH 0/2] qcow2: Avoid making the L1 table too big

2016-07-05 Thread Max Reitz
On 15.06.2016 17:36, Max Reitz wrote: > See https://bugs.launchpad.net/qemu/+bug/1592590 for a bug report. > > Reproducer: > > $ ./qemu-img create -f qcow2 test.qcow2 1M > Formatting 'test.qcow2', fmt=qcow2 size=1048576 encryption=off > cluster_size=65536 lazy_refcounts=off refcount_bits=16 > $ .

Re: [Qemu-devel] [Qemu-ppc] [PATCH 8/9] ppc: Add missing slbfee. instruction on ppc64 BookS processors

2016-07-05 Thread Cédric Le Goater
On 06/07/2016 04:50 AM, Benjamin Herrenschmidt wrote: > Used to lookup SLB entries by address, for some reason it was missing. > > Signed-off-by: Benjamin Herrenschmidt > --- > target-ppc/helper.h | 1 + > target-ppc/mmu-hash64.c | 30 ++ > target-ppc/translate.c

Re: [Qemu-devel] [PATCH 0/1] Fix iotests race condition by fixing block job rate limiting

2016-07-05 Thread Max Reitz
On 28.06.2016 17:28, Sascha Silbe wrote: > qemu-iotests #141 is relying on the test being able to operate on a > block job it just started before further progress is being made on > this block job. This fails regularly on some hosts because the time > slice is just 100ms and it often takes longer t

Re: [Qemu-devel] [PATCH 2/2 V4] hmp: show all of snapshot info on every block dev in output of 'info snapshots'

2016-07-05 Thread Max Reitz
On 04.07.2016 11:31, Lin Ma wrote: > Currently, the output of 'info snapshots' shows fully available snapshots. > It's opaque, hides some snapshot information to users. It's not convenient > if users want to know more about all of snapshot information on every block > device via monitor. > > Follo

Re: [Qemu-devel] [PATCH v8 0/5] Add a generic loader

2016-07-05 Thread Alistair Francis
On Mon, Jul 4, 2016 at 5:43 AM, Christian Borntraeger wrote: > On 07/02/2016 03:07 AM, Alistair Francis wrote: >> This work is based on the original work by Li Guang with extra >> features added by Peter C and myself. >> >> The idea of this loader is to allow the user to load multiple images >> or

Re: [Qemu-devel] [PATCH 2/2] cpu-exec: remove tb_lock from the hot-path

2016-07-05 Thread Sergey Fedorov
On 05/07/16 19:00, Alex Bennée wrote: > Sergey Fedorov writes: > >> On 05/07/16 16:42, Paolo Bonzini wrote: >>> On 05/07/2016 15:11, Alex Bennée wrote: Paolo Bonzini writes: > On 05/07/2016 13:14, Alex Bennée wrote: >> /* >> * Patch the last TB with a jump to the current TB

Re: [Qemu-devel] [PATCH v9 00/10] 8bit AVR cores

2016-07-05 Thread Michael Rolnik
Hi Richard, Are there more pending issues with my code? Thanks, Michael On Sat, Jul 2, 2016 at 10:56 PM, Michael Rolnik wrote: > for ADIW, SBIW instructions I modified address calculation. > > On Sat, Jul 2, 2016 at 9:20 PM, Michael Rolnik wrote: > >> Hi Richard. >> >> I folded all my changes

Re: [Qemu-devel] [Qemu-ppc] [PATCH RFC] spapr: by-pass SLOF when -kernel is provided

2016-07-05 Thread Greg Kurz
On Tue, 5 Jul 2016 16:42:37 +0200 Laurent Vivier wrote: > As device-tree is now fully built by QEMU, we don't need SLOF > anymore if the kernel is provided on the command line. > > In this case, don't load SLOF and boot directly into the > kernel. > > This saves at least 5 seconds on the boot

Re: [Qemu-devel] [Qemu-ppc] [PATCH RFC] spapr: by-pass SLOF when -kernel is provided

2016-07-05 Thread Cédric Le Goater
On 07/05/2016 04:42 PM, Laurent Vivier wrote: > As device-tree is now fully built by QEMU, we don't need SLOF > anymore if the kernel is provided on the command line. > > In this case, don't load SLOF and boot directly into the > kernel. > > This saves at least 5 seconds on the boot sequence. >

[Qemu-devel] [PATCH v2 0/6] Reduce lock contention on TCG hot-path

2016-07-05 Thread Alex Bennée
Hi, Well this is the first re-spin of the series posted last week. I've added a bunch of additional patches to be more aggressive with avoiding bouncing locks but to be honest the numbers don't seem to make it worth it. I think the first 3 patches are ready to take if the TCG maintainers want to:

[Qemu-devel] [Bug 1594239] Re: After adding more scsi disks for Aarch64 virtual machine, start the VM and got Qemu Error

2016-07-05 Thread Laszlo Ersek (Red Hat)
Posted a patch: http://lists.nongnu.org/archive/html/qemu- devel/2016-07/msg01119.html -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1594239 Title: After adding more scsi disks for Aarch64 virtual

[Qemu-devel] [PATCH v2 5/6] tcg: introduce tb_lock_recursive()

2016-07-05 Thread Alex Bennée
In some cases it is useful to have a recursive lock that can be safely taken when nested in other critical regions. Rather than make all tb_locks() recursive having a separate function serves to notify the reader that it explicitly a possibility in this case. Signed-off-by: Alex Bennée --- tcg/t

Re: [Qemu-devel] [PATCH 1/1] Improve block job rate limiting for small bandwidth values

2016-07-05 Thread Sascha Silbe
Dear Max, Max Reitz writes: > [ Good signature by key: 0x58B381CE2DC89CF99730EE643BB14202E838ACAD ] Feel free to drop by if you happen to be in the Stuttgart area some time. PGP key signing, a beverage of your choice and optionally some chatting about qemu and related topics. :) > On 04.07.20

Re: [Qemu-devel] [PATCH 1/1] Improve block job rate limiting for small bandwidth values

2016-07-05 Thread Max Reitz
On 05.07.2016 20:06, Sascha Silbe wrote: > Dear Max, > > Max Reitz writes: > >> [ Good signature by key: 0x58B381CE2DC89CF99730EE643BB14202E838ACAD ] > > Feel free to drop by if you happen to be in the Stuttgart area some > time. PGP key signing, a beverage of your choice and optionally some >

[Qemu-devel] [Bug 1599214] Re: virtlogd: qemu 2.6.0 doesn't log boot message

2016-07-05 Thread Markus Zoeller (markus_z)
** Description changed: This report is related to the OpenStack Nova bug [1]. - OpenStack tries to utilize the "virtlogd" feature of qemu [2]. + OpenStack tries to utilize the "virtlogd" feature of libvirt which gets + provided by qemu with [2]. steps to reproduce: 1) launch a quest wi

Re: [Qemu-devel] [Qemu-ppc] [PATCH RFC] spapr: by-pass SLOF when -kernel is provided

2016-07-05 Thread Laurent Vivier
On 05/07/2016 20:44, Greg Kurz wrote: > On Tue, 5 Jul 2016 16:42:37 +0200 > Laurent Vivier wrote: > >> As device-tree is now fully built by QEMU, we don't need SLOF >> anymore if the kernel is provided on the command line. >> >> In this case, don't load SLOF and boot directly into the >> kerne

[Qemu-devel] [PATCH v3 2/4] x86: Mask mtrr mask based on CPU physical address limits

2016-07-05 Thread Dr. David Alan Gilbert (git)
From: "Dr. David Alan Gilbert" The CPU GPs if we try and set a bit in a variable MTRR mask above the limit of physical address bits on the host. We hit this when loading a migration from a host with a larger physical address limit than our destination (e.g. a Xeon->i7 of same generation) but pre

[Qemu-devel] [PATCH v3 3/4] x86: fill high bits of mtrr mask

2016-07-05 Thread Dr. David Alan Gilbert (git)
From: "Dr. David Alan Gilbert" Fill the bits between 51..number-of-physical-address-bits in the MTRR_PHYSMASKn variable range mtrr masks so that they're consistent in the migration stream irrespective of the physical address space of the source VM in a migration. Signed-off-by: Dr. David Alan Gi

[Qemu-devel] [PATCH v3 1/4] x86: Allow physical address bits to be set

2016-07-05 Thread Dr. David Alan Gilbert (git)
From: "Dr. David Alan Gilbert" Currently QEMU sets the x86 number of physical address bits to the magic number 40. This is only correct on some small AMD systems; Intel systems tend to have 36, 39, 46 bits, and large AMD systems tend to have 48. Having the value different from your actual hardw

Re: [Qemu-devel] [Bug 1594239] Re: After adding more scsi disks for Aarch64 virtual machine, start the VM and got Qemu Error

2016-07-05 Thread Tom Hanson
On 07/05/2016 10:29 AM, Peter Maydell wrote: ... > The virt board creates a collection of virtio-mmio transports, > so if you create just a backend on the command line (via > "-device virtio-scsi-device") it will be plugged into a > virtio-bus on a virtio-mmio transport. > > You almost certainly di

[Qemu-devel] [PATCH v3 0/4] x86: Physical address limit patches

2016-07-05 Thread Dr. David Alan Gilbert (git)
From: "Dr. David Alan Gilbert" QEMU sets the guests physical address bits to 40; this is wrong on most hardware, and can be detected by the guest. It also stops you using really huge multi-TB VMs. Red Hat has had a patch, that Andrea wrote, downstream for a couple of years that reads the hosts v

Re: [Qemu-devel] [PATCH v2 5/6] x86: fix up 32 bit phys_bits case

2016-07-05 Thread Dr. David Alan Gilbert
* Daniel P. Berrange (berra...@redhat.com) wrote: > On Tue, Jul 05, 2016 at 12:29:30PM +0100, Dr. David Alan Gilbert wrote: > > * Daniel P. Berrange (berra...@redhat.com) wrote: > > > On Mon, Jul 04, 2016 at 08:16:08PM +0100, Dr. David Alan Gilbert (git) > > > wrote: > > > > From: "Dr. David Alan

[Qemu-devel] [Bug 1594239] Re: After adding more scsi disks for Aarch64 virtual machine, start the VM and got Qemu Error

2016-07-05 Thread Tom Hanson
I tested Laszlo's patch against this scenario and it eliminated the error. However, I'm still not convinced that it's needed. Let's start with a basic question: Does it make sense for there to be more than one MMIO "bus" on a system? After all, it's NOT a physical bus and there's only one set of

Re: [Qemu-devel] Qemu and PCI Interrupt Link?

2016-07-05 Thread Laszlo Ersek
On 07/04/16 15:14, Peter Lieven wrote: > Hi, > > i noticed that newer guest kernels emit the following message at startup: > > ACPI: No IRQ available for PCI Interrupt Link [LNKS]. Try pci=noacpi or > acpi=off > > Cmdline: > x86_64-softmmu/qemu-system-x86_64 -enable-kvm -m 2048 -cdrom > ~/Downlo

[Qemu-devel] [PATCH v3 4/4] x86: Set physical address bits based on host

2016-07-05 Thread Dr. David Alan Gilbert (git)
From: "Dr. David Alan Gilbert" A special case based on the previous phys-bits property; if it's the magic value 0 then use the hosts capabilities. We can also use the value we read from the host to check the users explicitly set value and warn them if it doesn't match. Signed-off-by: Dr. David

Re: [Qemu-devel] [PATCH] translate-all: Bugfix for user-mode self-modifying code in 2 page long TB

2016-07-05 Thread Sergey Fedorov
On 05/07/16 13:45, Stanislav Shmarov wrote: > In user-mode emulation Translation Block can consist of 2 guest pages. > In that case QEMU also mprotects 2 host pages that are dedicated for > guest memory, containing instructions. QEMU detects self-modifying code > with SEGFAULT signal processing. >

[Qemu-devel] [Bug 1594239] Re: After adding more scsi disks for Aarch64 virtual machine, start the VM and got Qemu Error

2016-07-05 Thread Laszlo Ersek (Red Hat)
A virtio-mmio "bus" is a single-device transport. It has a fixed base address that is set at board creation time. The MMIO area is 0x200 bytes in size, and hosts the virtio registers for one device that can sit on this transport. Transports can be unused. The "virt" machtype creates 32 transports

Re: [Qemu-devel] [PATCH v9 00/10] 8bit AVR cores

2016-07-05 Thread Peter Maydell
On 5 July 2016 at 19:15, Michael Rolnik wrote: > Hi Richard, > > Are there more pending issues with my code? Most of the issues I raised with the board model/device level code still seem to be present. thanks -- PMM

[Qemu-devel] [gdbstub] qemu is killed by gdb

2016-07-05 Thread Alon Bar-Lev
Hello, I am aware that this was discussed many times, however, problem remains. Use case loading u-boot. 1. Run qemu in debug mode: $ qemu-system-mips -M malta -nographic -m 256 -s -S 2. Run gdb: $ mips-unknown-linux-uclibceabi-gdb (gdb) target remote :1234 (gdb) load u-boot (gdb) target exec

Re: [Qemu-devel] [Bug 1594239] Re: After adding more scsi disks for Aarch64 virtual machine, start the VM and got Qemu Error

2016-07-05 Thread Peter Maydell
On 5 July 2016 at 17:43, Tom Hanson wrote: > On 07/05/2016 10:29 AM, Peter Maydell wrote: > ... >> The virt board creates a collection of virtio-mmio transports, >> so if you create just a backend on the command line (via >> "-device virtio-scsi-device") it will be plugged into a >> virtio-bus on

Re: [Qemu-devel] [gdbstub] qemu is killed by gdb

2016-07-05 Thread KONRAD Frederic
Hi Alon, Which repos/branch are you using? If you are using mttcg (the repo you mention in [1]) this is a known bug. Thanks, Fred Le 05/07/2016 à 21:50, Alon Bar-Lev a écrit : Hello, I am aware that this was discussed many times, however, problem remains. Use case loading u-boot. 1. Run qem

Re: [Qemu-devel] [gdbstub] qemu is killed by gdb

2016-07-05 Thread Alon Bar-Lev
On 5 July 2016 at 23:17, KONRAD Frederic wrote: > Hi Alon, > > Which repos/branch are you using? > If you are using mttcg (the repo you mention in [1]) this is a known bug. Hi, I use qemu releases or qemu master. I only referenced the [1] to show that this was already discussed, fixed, reverted,

Re: [Qemu-devel] [Qemu-block] [PATCH v8 10/16] block: Simplify drive-mirror

2016-07-05 Thread John Snow
On 07/02/2016 10:58 PM, Eric Blake wrote: > Now that we can support boxed commands, use it to greatly > reduce the number of parameters (and likelihood of getting > out of sync) when adjusting drive-mirror parameters. > > Signed-off-by: Eric Blake > > --- > v8: rebase, drop stale sentence in d

Re: [Qemu-devel] [PATCH] block/gluster: add support to choose libgfapi logfile

2016-07-05 Thread Jeff Cody
On Tue, Jul 05, 2016 at 02:46:26PM +0530, Prasanna Kumar Kalever wrote: > currently all the libgfapi logs defaults to '/dev/stderr' as it was hardcoded > in a call to glfs logging api, in case if debug level is chosen to DEBUG/TRACE > gfapi logs will be huge and fill/overflow the console view. > >

[Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device

2016-07-05 Thread Alistair Francis
This patchset adds and connects the Xilinx ZynqmP IPI devices using the register GPIO line. This requires adding the register GPIO API which allows registers to be mapped to GPIOs. This GPIO is used to propergate register reads/writes to other devices and other registers. This is useful to update

[Qemu-devel] [PATCH v1 2/4] register: Add GPIO API

2016-07-05 Thread Alistair Francis
Add GPIO functionality to the register API. This allows association and automatic connection of GPIOs to bits in registers. GPIO inputs will attach to handlers that automatically set read-only bits in registers. GPIO outputs will be updated to reflect their field value when their respective registe

[Qemu-devel] [PATCH v1 1/4] irq: Add opaque setter routine

2016-07-05 Thread Alistair Francis
From: Peter Crosthwaite Add a routine to set or override the opaque data of an IRQ. Qdev currently always initialises IRQ opaque as the device itself. This allows you to override to a custom opaque in the case where there is extra or different data needed. Signed-off-by: Peter Crosthwaite Sign

Re: [Qemu-devel] [Bug 1594239] Re: After adding more scsi disks for Aarch64 virtual machine, start the VM and got Qemu Error

2016-07-05 Thread Tom Hanson
OK, that makes sense. I was thinking that the MMIO transport would/could support multiple register blocks and thus multiple devices. On 5 July 2016 at 13:26, Laszlo Ersek (Red Hat) wrote: > A virtio-mmio "bus" is a single-device transport. It has a fixed base > address that is set at board crea

Re: [Qemu-devel] [PATCH v9 00/10] 8bit AVR cores

2016-07-05 Thread Michael Rolnik
Hi Peter, *You're probably better off having the device in onepatch and the board model in another, rather than combining them.* *Generally, device models don't live in hw/, only board models. Put the device model in the appropriate subdirectoryof hw/, which is 'misc' for

Re: [Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device

2016-07-05 Thread Peter Maydell
On 5 July 2016 at 21:30, Alistair Francis wrote: > This patchset adds and connects the Xilinx ZynqmP IPI devices using the > register GPIO line. > > This requires adding the register GPIO API which allows registers to be > mapped to GPIOs. This GPIO is used to propergate register reads/writes > to

[Qemu-devel] [PATCH v1 3/4] xlnx-zynqmp-ipi: Add the IPI device

2016-07-05 Thread Alistair Francis
Add the Xilinx ZynqMP Inter Processor Interrupt device. Signed-off-by: Alistair Francis --- hw/intc/Makefile.objs | 1 + hw/intc/xlnx-zynqmp-ipi.c | 263 ++ include/hw/intc/xlnx-zynqmp-ipi.h | 116 + 3 files changed, 380

[Qemu-devel] [PATCH v1 4/4] zynqmp: Connect the IPI devices

2016-07-05 Thread Alistair Francis
Connect the Xilinx ZynqMP Inter Processor Interrupt (IPI) devices to the ZynqMP SoC. This includes connecting the devices to each other. Signed-off-by: Alistair Francis --- hw/arm/xlnx-zynqmp.c | 102 +++ include/hw/arm/xlnx-zynqmp.h | 3 ++ 2 f

Re: [Qemu-devel] [PATCH v9 00/10] 8bit AVR cores

2016-07-05 Thread Peter Maydell
On 5 July 2016 at 21:31, Michael Rolnik wrote: > Hi Peter, > > > You're probably better off having the device in one > patch and the board model in another, rather than combining them. > > Generally, device models don't live in hw/, only board > models. Put the device model in the

Re: [Qemu-devel] [Bug 1594239] Re: After adding more scsi disks for Aarch64 virtual machine, start the VM and got Qemu Error

2016-07-05 Thread Tom Hanson
So, given the 1 register block per virt-mmio "bus" then I agree that we need a "dev path" distinction between them. On 5 July 2016 at 14:22, Thomas Hanson wrote: > OK, that makes sense. I was thinking that the MMIO transport would/could > support multiple register blocks and thus multiple devic

Re: [Qemu-devel] [Qemu-block] [PATCH v3 04/32] blockdev: Move bochs probe into separate file

2016-07-05 Thread John Snow
On 07/05/2016 11:49 AM, Daniel P. Berrange wrote: > On Tue, Jul 05, 2016 at 11:24:04AM -0400, Colin Lord wrote: >> This puts the bochs probe function into its own separate file as part of >> the process of modularizing block drivers. Having the probe functions >> separate from the rest of the dri

Re: [Qemu-devel] Qemu and PCI Interrupt Link?

2016-07-05 Thread Paolo Bonzini
On 05/07/2016 20:30, Laszlo Ersek wrote: > On 07/04/16 15:14, Peter Lieven wrote: >> Hi, >> >> i noticed that newer guest kernels emit the following message at startup: >> >> ACPI: No IRQ available for PCI Interrupt Link [LNKS]. Try pci=noacpi or >> acpi=off >> >> Cmdline: >> x86_64-softmmu/qemu-

Re: [Qemu-devel] [Qemu-block] [PATCH v3 04/32] blockdev: Move bochs probe into separate file

2016-07-05 Thread Max Reitz
On 05.07.2016 22:50, John Snow wrote: > > > On 07/05/2016 11:49 AM, Daniel P. Berrange wrote: >> On Tue, Jul 05, 2016 at 11:24:04AM -0400, Colin Lord wrote: >>> This puts the bochs probe function into its own separate file as part of >>> the process of modularizing block drivers. Having the probe

Re: [Qemu-devel] [PATCH v9 09/10] target-avr: updating translate.c to use instructions translation

2016-07-05 Thread Peter Maydell
On 1 July 2016 at 15:47, Michael Rolnik wrote: > Signed-off-by: Michael Rolnik > --- > target-avr/Makefile.objs | 4 +- > target-avr/translate.c | 142 > --- > 2 files changed, 64 insertions(+), 82 deletions(-) > > void restore_state_to_opc(CPU

Re: [Qemu-devel] [PATCH v9 00/10] 8bit AVR cores

2016-07-05 Thread Peter Maydell
On 5 July 2016 at 21:31, Michael Rolnik wrote: > > As Richard says you have problems with trying to write > CPU registers from a device anyway, but please consider > trying to have some level of abstraction rather than > just having the device code reach into the CPU object. >

Re: [Qemu-devel] [Qemu-block] [PATCH v3 04/32] blockdev: Move bochs probe into separate file

2016-07-05 Thread John Snow
On 07/05/2016 05:00 PM, Max Reitz wrote: > On 05.07.2016 22:50, John Snow wrote: >> >> >> On 07/05/2016 11:49 AM, Daniel P. Berrange wrote: >>> On Tue, Jul 05, 2016 at 11:24:04AM -0400, Colin Lord wrote: This puts the bochs probe function into its own separate file as part of the proces

Re: [Qemu-devel] [PATCH v9 00/10] 8bit AVR cores

2016-07-05 Thread Michael Rolnik
right it accesses CPU registers but from helper context. the flow is as follows 1. there is a write to [0x: 0x0100) region 2. tlb_fill is called, it does the following a. sets env->fullwr b. calls cpu_loop_exit_restore. c. the whole block is retranslated and instead of st it genera

Re: [Qemu-devel] [PATCH v9 00/10] 8bit AVR cores

2016-07-05 Thread Michael Rolnik
1. AT90CAN - http://www.atmel.com/images/doc7679.pdf 4. Memories Figure 4-2. Data Memory Map 29. Register Summary 2. AT90USB - http://www.atmel.com/images/doc7593.pdf 6. Atmel AVR AT90USB64/128 memories 33. Register summary in the "register summary" table yo

Re: [Qemu-devel] [Qemu-ppc] [PATCH 8/9] ppc: Add missing slbfee. instruction on ppc64 BookS processors

2016-07-05 Thread Benjamin Herrenschmidt
On Tue, 2016-07-05 at 19:23 +0200, Cédric Le Goater wrote: > > > So, I was trying today to reconciliate the powernv patchset with  > the current HEAD of qemu when I bumped into the old version of this  > patch. I checked the specs and when no slb are found, rt should  > just be 0. The machine che

Re: [Qemu-devel] [Qemu-block] [PATCH v8 10/16] block: Simplify drive-mirror

2016-07-05 Thread Eric Blake
On 07/05/2016 02:27 PM, John Snow wrote: > > > On 07/02/2016 10:58 PM, Eric Blake wrote: >> Now that we can support boxed commands, use it to greatly >> reduce the number of parameters (and likelihood of getting >> out of sync) when adjusting drive-mirror parameters. >> >> Signed-off-by: Eric Bla

Re: [Qemu-devel] [Qemu-block] [PATCH v8 10/16] block: Simplify drive-mirror

2016-07-05 Thread John Snow
On 07/05/2016 06:16 PM, Eric Blake wrote: > On 07/05/2016 02:27 PM, John Snow wrote: >> >> >> On 07/02/2016 10:58 PM, Eric Blake wrote: >>> Now that we can support boxed commands, use it to greatly >>> reduce the number of parameters (and likelihood of getting >>> out of sync) when adjusting driv

Re: [Qemu-devel] [SeaBIOS] [PATCH v3] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

2016-07-05 Thread Laszlo Ersek
On 06/22/16 08:53, Haozhong Zhang wrote: > OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL > for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file > "etc/msr_feature_control" to advise bits that should be set in > MSR_IA32_FEATURE_CONTROL. If this file exists, S

Re: [Qemu-devel] [PATCH v4 3/9] target-avr: adding a sample AVR board

2016-07-05 Thread Michael Rolnik
Peter, I do not understand this comment *Exactly one of these memory regions (your main "RAM") should beallocated via memory_region_allocate_system_memory()[which does the vmstate_register_ram_global() for that MR].The idea is that every board has one-and-only-one main RAM MR.(We should hav

Re: [Qemu-devel] [PATCH v9 00/10] 8bit AVR cores

2016-07-05 Thread Peter Maydell
On 5 July 2016 at 22:41, Michael Rolnik wrote: > right it accesses CPU registers but from helper context. > the flow is as follows > > 1. there is a write to [0x: 0x0100) region > 2. tlb_fill is called, it does the following > a. sets env->fullwr > b. calls cpu_loop_exit_restore. >

Re: [Qemu-devel] [PATCH v1 3/2] crypto: don't open-code qcrypto_hash_supports

2016-07-05 Thread Eric Blake
On 07/05/2016 10:43 AM, Daniel P. Berrange wrote: > Call the existing qcrypto_hash_supports method from > qcrypto_hash_bytesv instead of open-coding it again. > > Signed-off-by: Daniel P. Berrange > --- > crypto/hash-gcrypt.c | 3 +-- > crypto/hash-glib.c | 3 +-- > crypto/hash-nettle.c | 3 +-

Re: [Qemu-devel] [PATCH v4 3/9] target-avr: adding a sample AVR board

2016-07-05 Thread Peter Maydell
On 5 July 2016 at 23:22, Michael Rolnik wrote: > Peter, > > I do not understand this comment > > Exactly one of these memory regions (your main "RAM") should be > allocated via memory_region_allocate_system_memory() > [which does the vmstate_register_ram_global() for that MR]. > The idea is that e

Re: [Qemu-devel] [PATCH v2 5/6] qemu-iotests: Test setting WCE with qdev

2016-07-05 Thread Eric Blake
On 07/05/2016 08:57 AM, Max Reitz wrote: >> I'm not sure yet what the conclusion is. Change query-block to include >> anonymous BBs that are owned by devices? A new query command? Add the >> information to info qtree and whatever the QMP version of it is (if it >> even exists)? > > Well, since yo

Re: [Qemu-devel] [PATCH v9 00/10] 8bit AVR cores

2016-07-05 Thread Richard Henderson
On 07/05/2016 02:41 PM, Michael Rolnik wrote: right it accesses CPU registers but from helper context. the flow is as follows 1. there is a write to [0x: 0x0100) region 2. tlb_fill is called, it does the following a. sets env->fullwr b. calls cpu_loop_exit_restore. c. the whole b

Re: [Qemu-devel] [PATCH v2 kernel 0/7] Extend virtio-balloon for fast (de)inflating & fast live migration

2016-07-05 Thread Li, Liang Z
Ping ... Liang > -Original Message- > From: Li, Liang Z > Sent: Wednesday, June 29, 2016 6:32 PM > To: m...@redhat.com > Cc: linux-ker...@vger.kernel.org; virtualizat...@lists.linux-foundation.org; > k...@vger.kernel.org; qemu-devel@nongnu.org; virtio-dev@lists.oasis- > open.org; dgilb...

Re: [Qemu-devel] Login and Password Request

2016-07-05 Thread Fam Zheng
On Tue, 07/05 20:49, Shiv Arora wrote: > Hi Developers Hi Shiv, > > I use the qemu command to up my virtual OS. But after that command executes > it ask for > > localhost.localdomain.localdomain login: > Password: > > I don`t want to add the login and password manually as i have to launch > mu

Re: [Qemu-devel] [PATCH] quorum: Only compile when supported

2016-07-05 Thread Fam Zheng
On Tue, 07/05 10:35, Daniel P. Berrange wrote: > > Can you backup and explain more detail what the actual problem you're trying > to solve is. IIUC, it is related to module loading, but I'm not seeing exactly > what it is. This patch originated when I was researching all drivers' block_init funct

Re: [Qemu-devel] [SeaBIOS] [PATCH v3] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

2016-07-05 Thread Haozhong Zhang
On 07/06/16 00:19, Laszlo Ersek wrote: > On 06/22/16 08:53, Haozhong Zhang wrote: > > OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL > > for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file > > "etc/msr_feature_control" to advise bits that should be set in > >

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

2016-07-05 Thread Zhou Jie
Hi Alex, Due to weekend and holiday in my country, there were zero regular working hours between your emails. I wish you had a good time. The following code will be modified. 1. vfio_pci_ioctl add a flag in vfio_device_info for workable_state support return workable_state in "struct vfi

Re: [Qemu-devel] [PATCH 0/5] Auto-fragment large transactions at the block layer

2016-07-05 Thread Eric Blake
On 06/21/2016 11:54 PM, Fam Zheng wrote: > On Mon, 06/20 17:39, Eric Blake wrote: >> We have max_transfer documented in BlockLimits, but while we >> honor it during pwrite_zeroes, we were blindly ignoring it >> during pwritev and preadv, leading to multiple drivers having >> to implement fragmentat

Re: [Qemu-devel] [PULL 18/43] block: Switch discard length bounds to byte-based

2016-07-05 Thread Eric Blake
On 07/05/2016 09:50 AM, Kevin Wolf wrote: > From: Eric Blake > > Sector-based limits are awkward to think about; in our on-going > quest to move to byte-based interfaces, convert max_discard and > discard_alignment. Rename them, using 'pdiscard' as an aid to > track which remaining discard inter

Re: [Qemu-devel] [PATCH RFC] spapr: by-pass SLOF when -kernel is provided

2016-07-05 Thread David Gibson
On Tue, Jul 05, 2016 at 04:42:37PM +0200, Laurent Vivier wrote: > As device-tree is now fully built by QEMU, we don't need SLOF > anymore if the kernel is provided on the command line. > > In this case, don't load SLOF and boot directly into the > kernel. > > This saves at least 5 seconds on the

Re: [Qemu-devel] [PATCH v3 01/32] blockdev: prepare iSCSI block driver for dynamic loading

2016-07-05 Thread Fam Zheng
On Tue, 07/05 11:24, Colin Lord wrote: > This commit moves the initialization of the QemuOptsList qemu_iscsi_opts > struct out of block/iscsi.c in order to allow the iscsi module to be > dynamically loaded. > > Signed-off-by: Colin Lord > --- > block/iscsi.c | 36

[Qemu-devel] [PATCH v2] balloon: Fix failure of updating guest memory status

2016-07-05 Thread Liang Li
After live migration, 'guest-stats' can't get the expected memory status in the guest. This issue is caused by commit 4eae2a657d. The value of 's->stats_vq_elem' will be NULL after live migration, and the check in the function 'balloon_stats_poll_cb()' will prevent the 'virtio_notify()' from execut

Re: [Qemu-devel] [PATCH v9 02/13] mptsas: change .realize function name

2016-07-05 Thread Cao jin
Hi, I guess this one is suitable for trivial tree, so CC them On 06/20/2016 02:13 PM, Cao jin wrote: All the other devices` .realize function name are xxx_realize, except this one. cc: Michael S. Tsirkin cc: Marcel Apfelbaum cc: Paolo Bonzini cc: Markus Armbruster Reviewed-by: Markus Armb

[Qemu-devel] [PATCH] main-loop: check return value before using

2016-07-05 Thread Cao jin
pointer 'qemu_aio_context' should be checked first before it is used. qemu_bh_new() will use it. Also add extra newlines to make code well separated and easier to read. Signed-off-by: Cao jin --- main-loop.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/main-loop.c b

Re: [Qemu-devel] [PATCH RFC] spapr: by-pass SLOF when -kernel is provided

2016-07-05 Thread Alexey Kardashevskiy
On 06/07/16 11:35, David Gibson wrote: > On Tue, Jul 05, 2016 at 04:42:37PM +0200, Laurent Vivier wrote: >> As device-tree is now fully built by QEMU, we don't need SLOF >> anymore if the kernel is provided on the command line. >> >> In this case, don't load SLOF and boot directly into the >> kerne

Re: [Qemu-devel] [PATCH 7/7] ast2400: add a memory controller device model

2016-07-05 Thread Andrew Jeffery
On Mon, 2016-07-04 at 14:18 +0200, Cédric Le Goater wrote: > The uboot in the previous release of the SDK was using a hardcoded > value for memory size. This is not true anymore, the value is now > retrieved from the memory controller. > > Below is a model for this device, only supporting unlock a

Re: [Qemu-devel] [PATCH 2/3] Add KVM_CAP_PPC_HTM to linux/kvm.h

2016-07-05 Thread Sam Bobroff
On Tue, Jul 05, 2016 at 04:05:58PM +1000, David Gibson wrote: > On Tue, Jul 05, 2016 at 03:19:23PM +1000, Sam Bobroff wrote: > > Signed-off-by: Sam Bobroff > > Ok, so the usual procedure for updates to linux-headers is this: >1. Get the change merged on the kernel side > >2. Use scripts/

Re: [Qemu-devel] [PATCH 2/3] Add KVM_CAP_PPC_HTM to linux/kvm.h

2016-07-05 Thread David Gibson
On Wed, Jul 06, 2016 at 02:41:52PM +1000, Sam Bobroff wrote: > On Tue, Jul 05, 2016 at 04:05:58PM +1000, David Gibson wrote: > > On Tue, Jul 05, 2016 at 03:19:23PM +1000, Sam Bobroff wrote: > > > Signed-off-by: Sam Bobroff > > > > Ok, so the usual procedure for updates to linux-headers is this: >

Re: [Qemu-devel] [PATCH] main-loop: check return value before using

2016-07-05 Thread Cao jin
cc Paolo again, because failed to deliver in 'git send-email' On 07/06/2016 11:03 AM, Cao jin wrote: pointer 'qemu_aio_context' should be checked first before it is used. qemu_bh_new() will use it. Also add extra newlines to make code well separated and easier to read. Signed-off-by: Cao jin

Re: [Qemu-devel] [RFC PATCH v0 2/5] cpu: Optionally use arch_id instead of cpu_index in cpu vmstate_register()

2016-07-05 Thread Igor Mammedov
On Tue, 5 Jul 2016 18:13:22 +0530 Bharata B Rao wrote: > On Tue, Jul 05, 2016 at 09:15:51AM +0200, Igor Mammedov wrote: > > On Tue, 5 Jul 2016 10:12:49 +0530 > > Bharata B Rao wrote: > > > > > Introduce CPUState.prefer_arch_id_over_cpu_index and > > > MachineClass.prefer_arch_id_over_cpu_index

[Qemu-devel] [PATCH v2 2/3] Add KVM_CAP_PPC_HTM to linux/kvm.h

2016-07-05 Thread Sam Bobroff
Signed-off-by: Sam Bobroff --- linux-headers/linux/kvm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index e60e21b..37cb3e8 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -866,6 +866,7 @@ struct kvm_ppc_smmu_

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