From: Benjamin Herrenschmidt
None of the other presenter functions directly mucks with the
internal state, so don't do it there either.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Nikunj A Dadhania
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
hw/intc/xics.c| 8
From: Aaron Larson
Call gen_pause for all "or rx,rx,rx" encodings other nop. This
provides a reasonable implementation for yield, and a better
approximation for mdoio, mdoom, and miso. The choice to pause for all
encodings !=0 leverages the PowerISA admonition that the reserved
encodings might
From: Benjamin Herrenschmidt
The current behaviour isn't completely right, as for the DEC, we
don't properly re-arm when wrapping around, but I will fix this
in a separate patch.
Signed-off-by: Benjamin Herrenschmidt
[clg: fixed checkpatch.pl errors ]
Signed-off-by: Cédric Le Goater
Signed-off
On 07/01/2016 08:11 AM, Cédric Le Goater wrote:
> On 06/30/2016 08:24 PM, Peter Maydell wrote:
>> On 30 June 2016 at 16:50, Cédric Le Goater wrote:
>>> These strap registers are complex enough, let's not mix them.
>>>
>>> Signed-off-by: Cédric Le Goater
>>
>> Was there a cover letter for this pat
From: Benjamin Herrenschmidt
We don't give them a KVM reg number yet as no current KVM version
supports HV mode.
Signed-off-by: Benjamin Herrenschmidt
[clg: SPRs AMOR,DAWR,DARWX were already included in commit f401dd32cb8e9]
Signed-off-by: Cédric Le Goater
Signed-off-by: David Gibson
---
tar
From: Benjamin Herrenschmidt
The common class doesn't change, the KVM one is sPAPR specific. Rename
variables and functions to xics_spapr.
Retain the type name as "xics" to preserve migration for existing sPAPR
guests.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Nikunj A Dadhania
Sig
From: Benjamin Herrenschmidt
We were always advertising only 4K & 16M. Additionally the code wasn't
properly matching the page size with the PTE content, which meant we
could potentially hit an incorrect PTE if the guest used multiple sizes.
Finally, honor the CPU capabilities when decoding the
From: Benjamin Herrenschmidt
Leave the core ICP/ICS logic in xics.c and move the top level
class wrapper, hypercall and RTAS handlers to xics_spapr.c
Signed-off-by: Benjamin Herrenschmidt
[add cpu.h in xics_spapr.c, move set_nr_irqs and set_nr_servers to
xics_spapr.c]
Signed-off-by: Nikunj A D
The segment page shift parameter is never used. Let's remove it.
Signed-off-by: Cédric Le Goater
---
hw/ppc/spapr_hcall.c| 4 ++--
target-ppc/mmu-hash64.c | 6 +-
target-ppc/mmu-hash64.h | 3 +--
3 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc
From: Benjamin Herrenschmidt
The "ICP" is a different object than the "XICS". For historical reasons,
we have a number of places where we name a variable "icp" while it contains
a XICSState pointer. There *is* an ICPState structure too so this makes
the code really confusing.
This is a mechanica
Here is a little serie with API cleanups and fixes for large page and
VRMA. Previous patches which added the support did not take into
account the segment page size attribute.
Cédric Le Goater (4):
ppc: simplify ppc_hash64_hpte_page_shift_noslb()
ppc: fix large page support
ppc: simplify ppc
A regression was introduced by commit 53df75a59bcf ('ppc: Fix 64K
pages support in full emulation'). ppc_hash64_hpte_page_shift_noslb()
should be used to compute the page size.
Signed-off-by: Cédric Le Goater
---
target-ppc/mmu-hash64.c | 24 +---
1 file changed, 1 insertion(
The page shift parameter is never used. Let's remove it.
Signed-off-by: Cédric Le Goater
---
target-ppc/mmu-hash64.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index fdaff9e874ba..7ef45ee53bf5 100644
--- a/targ
commit 08109fd4360d ('ppc: Add proper real mode translation support')
introduced VRMA support for which SLB entries need to be created. But
it did not take into account the changes in ppc_slb_t and missed the
setting of the segment page size attribute.
However, gcc spotted it :
target-ppc/mmu-has
On 1 July 2016 at 07:11, Cédric Le Goater wrote:
> On 06/30/2016 08:24 PM, Peter Maydell wrote:
>> On 30 June 2016 at 16:50, Cédric Le Goater wrote:
>>> These strap registers are complex enough, let's not mix them.
>>>
>>> Signed-off-by: Cédric Le Goater
>>
>> Was there a cover letter for this p
Am 30.06.2016 um 19:23 hat Denis V. Lunev geschrieben:
> On 06/30/2016 07:40 PM, John Snow wrote:
> >
> >On 06/30/2016 05:12 AM, Denis V. Lunev wrote:
> >>On 06/30/2016 10:34 AM, Vladimir Sementsov-Ogievskiy wrote:
> >>>After loading bitmap from image and setting IN_USE flag in it's header,
> >>>co
On Thu, 30 Jun 2016 20:47:33 +0300
"Michael S. Tsirkin" wrote:
Thanks for review,
I'll fix up patch according to your comments and post v3 shortly
> On Thu, Jun 30, 2016 at 02:23:06PM +0200, Igor Mammedov wrote:
> > fixes long standing issue where Linux kernel would assing
>
> assign?
>
> >
On 07/01/2016 10:02 AM, Peter Maydell wrote:
> On 1 July 2016 at 07:11, Cédric Le Goater wrote:
>> On 06/30/2016 08:24 PM, Peter Maydell wrote:
>>> On 30 June 2016 at 16:50, Cédric Le Goater wrote:
These strap registers are complex enough, let's not mix them.
Signed-off-by: Cédric
On Do, 2016-06-30 at 17:37 +0100, Peter Maydell wrote:
> On 30 June 2016 at 17:21, Gerd Hoffmann wrote:
> > Hi,
> >
> >> Hi. I'm afraid this fails 'make check':
> >> TEST: tests/vmxnet3-test... (pid=19181)
> >> qemu-system-i386: -device vmxnet3: failed to find romfile "efi-vmxnet3.rom"
> >> Brok
Hi Tom,
Yeh it's just vmstate_register_with_alias_id printing vmsd->name at entry,
and then after the char *id = printing that as well (that's what I
labelled as the dev/id case).
Then just before the assert I was printing the se->compat and se->instance_id
values.
I noticed this bug bec
I can reasonably assume that this solved my problem. I've live migrated
41 VM's 5 times between 2 hypervisors without the 100% cpu problem
appearing.
My production servers run 2.0.0+dfsg-2ubuntu1.22, and still observe the
same problem.
Attached is the patch that I created with quilt in debian/pa
On 01.07.2016 11:12, Kevin Wolf wrote:
Am 30.06.2016 um 19:23 hat Denis V. Lunev geschrieben:
On 06/30/2016 07:40 PM, John Snow wrote:
On 06/30/2016 05:12 AM, Denis V. Lunev wrote:
On 06/30/2016 10:34 AM, Vladimir Sementsov-Ogievskiy wrote:
After loading bitmap from image and setting IN_USE f
Hi
On Thu, Jun 30, 2016 at 5:31 PM, Cornelia Huck wrote:
> The host notifier rework tried both to unify host notifiers across
> transports and plug a possible hole during host notifier
> re-assignment. Unfortunately, this meant a change in semantics that
> breaks vhost and iSCSI+dataplane.
>
> As
> > +if (s->stats_vq_elem == NULL) {
> > +virtqueue_push(s->svq, &elem, 0);
> > +virtio_notify(vdev, s->svq);
> > +return;
> > +}
> > virtqueue_push(s->svq, s->stats_vq_elem, s->stats_vq_offset);
> > virtio_notify(vdev, s->svq);
> > g_free(s->stats_vq_
On Thu, 30 Jun 2016 20:23:08 +0300
"Michael S. Tsirkin" wrote:
> I'm not sure what was I thinking when I applied this:
> it changes load without changing save - how can this work?
The ordering implications are easy to miss :(
> I am inclined to revert 1f8828ef573c83365b4a87a776daf8bcef1caa21 an
On 30/06/16 13:35, Sergey Fedorov wrote:
> On 30/06/16 13:32, Alex Bennée wrote:
>> Sergey Fedorov writes:
>>
>>> On 29/06/16 19:17, Alex Bennée wrote:
So I think there is a deadlock we can get with the async work:
(gdb) thread apply all bt
Thread 11 (Thread 0x7ffefeca7700
On 01/07/16 11:56, Sergey Fedorov wrote:
> On 30/06/16 13:35, Sergey Fedorov wrote:
>> On 30/06/16 13:32, Alex Bennée wrote:
>>> Sergey Fedorov writes:
>>>
On 29/06/16 19:17, Alex Bennée wrote:
> So I think there is a deadlock we can get with the async work:
>
> (gdb) thread apply
From: Prerna Saxena
The set_mem_table command currently does not seek a reply. Hence, there is
no easy way for a remote application to notify to QEMU when it finished
setting up memory, or if there were errors doing the so.
As an example:
(1) Qemu sends a SET_MEM_TABLE to the backend (eg, a vhos
From: Prerna Saxena
This introduces the VHOST_USER_PROTOCOL_F_REPLY_ACK.
If negotiated, client applications should send a u64 payload in
response to any message that contains the "need_response" bit set
on the message flags. Setting the payload to "zero" indicates the
command finished successful
From: Prerna Saxena
The current vhost-user protocol requires the client to send responses to only a
few commands. For the remaining commands, it is impossible for QEMU to know the
status of the requested operation -- ie, did it succeed? If so, by what time?
This is inconvenient, and can also lea
On 30 June 2016 at 18:51, Laurent Vivier wrote:
>
>
> Le 30/06/2016 à 18:33, Peter Maydell a écrit :
>> Older kernels don't have F_SETPIPE_SZ and F_GETPIPE_SZ (in
>> particular RHEL6's system headers don't define these). Add
>> ifdefs so that we can gracefully fall back to not supporting
>> those
On 30 June 2016 at 14:42, Markus Armbruster wrote:
> The following changes since commit 297e8005f88d4360480eaa2c07220fa8853f0448:
>
> MAINTAINERS: Remove Blue Swirl leftovers (2016-06-30 13:34:49 +0100)
>
> are available in the git repository at:
>
> git://repo.or.cz/qemu/armbru.git tags/pull-
Signed-off-by: Gerd Hoffmann
---
src/misc.c | 2 +
src/optionroms.c | 4 +-
src/serial.c | 340 +++
src/util.h | 2 +
4 files changed, 347 insertions(+), 1 deletion(-)
diff --git a/src/misc.c b/src/misc.c
index f02237c..f4
Hi,
Ok folks, finally took the time to put serial console support into
seabios natively, without requiring sgabios. For now this will use the
first serial port in case no vgabios was found, i.e. use something along
the lines of "qemu -vga none -serial stdio" to check it out.
Design goal is to
Signed-off-by: Gerd Hoffmann
---
src/clock.c | 1 +
src/serial.c | 255 +++
src/util.h | 1 +
3 files changed, 257 insertions(+)
diff --git a/src/clock.c b/src/clock.c
index e83e0f3..e44e112 100644
--- a/src/clock.c
+++ b/src/clock.c
Signed-off-by: Gerd Hoffmann
---
Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/Makefile b/Makefile
index 7087fc2..5ea13bc 100644
--- a/Makefile
+++ b/Makefile
@@ -416,6 +416,7 @@ pxe-e1000.rom pxe-eepro100.rom pxe-ne2k_pci.rom \
pxe-pcnet.rom pxe-rtl8139.rom pxe-virtio.rom \
efi-
... so configure re-runs on pc-bios updates such as new pxe roms.
Needed because configure symlinks the prebuilt roms from src
into build tree.
Signed-off-by: Gerd Hoffmann
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index 5ea13bc..c1ac21d
PcPciInfo has two (ill-named) members: Range w32 is the PCI hole, and
w64 is the PCI64 hole.
Three users:
* I440FXState and MCHPCIState have a member PcPciInfo pci_info, but
only pci_info.w32 is actually used. This is confusing. Replace by
Range pci_hole.
* acpi_build() uses auto PcPciInfo
Two weeks on list, two R-bys, time to merge. Michael, the orthodox
route would be through your tree, but I can do a pull request myself
if you're busy.
v2: Trivially rebased
Markus Armbruster (2):
piix: Set I440FXState member pci_info.w32 in one place
pc: Eliminate PcPciInfo
hw/i386/acpi-b
Range pci_info.w32 records the location of the PCI hole.
It's initialized to empty when QOM zeroes I440FXState. That's a fine
value for a still unknown PCI hole.
i440fx_init() sets pci_info.w32.begin = below_4g_mem_size. Changes
the PCI hole from empty to [below_4g_mem_size, UINT64_MAX]. That'
On Thu, Jun 30, 2016 at 03:09:53PM +0100, Peter Maydell wrote:
> On 28 June 2016 at 18:14, Ard Biesheuvel wrote:
> > Since QEMU performs cacheable accesses to guest memory when doing DMA
> > as part of the implementation of emulated PCI devices, guest drivers
> > should use cacheable accesses as w
Looks ready to me. My current qapi-next is based on it, so I'd
appreciate merge or further review. Thanks!
Prerequisites:
* [PATCH v2 0/2] Clean up around the PCI holes
v2:
* Trivially rebased
v1 RFC:
* PATCH 2+3 squashed
* PATCH 4 (now 3) clarify range_compare() doesn't work for empty
ranges
Works fine since the previous commit fixed the underlying range data
type. Of course it filters out nothing, but so does
0..1,2..0x, and we don't bother rejecting that either.
Signed-off-by: Markus Armbruster
Reviewed-by: Eric Blake
---
tests/test-logging.c | 5 +++--
util/log.
Range encodes an integer interval [a,b] as { begin = a, end = b + 1 },
where a \in [0,2^64-1] and b \in [1,2^64]. Thus, zero end is to be
interpreted as 2^64.
The implementation of -dfilter (commit 3514552) uses Range
differently: it encodes [a,b] as { begin = a, end = b }. The code
works, but i
Changelog:
v1->v3:
- fix commit message for 4/5
- add numa_get_node_for_cpu() helper
- add comment in code explaining why _PXM is being added
Series adds acpi tables tests for CPU hotplug and
makes hotplugged CPUs assigned to correct numa nodes for Linux guests
+ extends CPU hotplug test wi
Range represents a range as follows. Member @start is the inclusive
lower bound, member @end is the exclusive upper bound. Zero @end is
special: if @start is also zero, the range is empty, else @end is to
be interpreted as 2^64. No other empty ranges may occur.
The range [0,2^64-1] cannot be re
so it would be possible to verify _PXM generation in
DSDT and SRAT tables.
Signed-off-by: Igor Mammedov
Reviewed-by: Marcel Apfelbaum
---
NOTE to maintainer:
SRAT table is included in patch as it doesn't have
any chance for conflicts compared to often changing
DSDT
following table blobs should
Markus Armbruster writes:
> Eric Blake writes:
>
>> [First half of v4 00/28 Add qapi-to-JSON and clone visitors:
>> https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg03220.html]
>>
>> No hard prerequisites; applies to master
>>
>> Soft prerequisites (for valgrind to be happy with all touc
Signed-off-by: Igor Mammedov
---
tests/acpi-test-data/pc/APIC.cphp | Bin 0 -> 160 bytes
tests/acpi-test-data/pc/DSDT.cphp | Bin 0 -> 6435 bytes
tests/acpi-test-data/q35/APIC.cphp | Bin 0 -> 160 bytes
tests/acpi-test-data/q35/DSDT.cphp | Bin 0 -> 9197 bytes
4 files changed, 0 insertions(+),
Users of struct Range mess liberally with its members, which makes
refactoring hard. Create a set of methods, and convert all users to
call them instead of accessing members. The methods have carefully
worded contracts, and use assertions to check them.
Signed-off-by: Markus Armbruster
Reviewed
Test with:
-smp 2,cores=3,sockets=2,maxcpus=6
to capture sparse APIC ID values that default
AMD CPU has in above configuration.
Signed-off-by: Igor Mammedov
Reviewed-by: Marcel Apfelbaum
---
NOTE to maintainer:
following table blobs should be added to git tree as poart of this commit
afte
Workaround for long standing issue where Linux kernel
assigns hotplugged CPU to 1st numa node as it discards
proximity for possible CPUs from SRAT after it's parsed.
_PXM method allows linux query proximity directly from
hotplugged CPU object, which allows Linux to assing CPU
to the correct numa n
Replace repeated pattern
for (i = 0; i < nb_numa_nodes; i++) {
if (test_bit(idx, numa_info[i].node_cpu)) {
...
break;
with a helper function to lookup numa node index for cpu.
Suggested-by: Michael S. Tsirkin
Signed-off-by: Igor Mammedov
---
hw/arm/virt-acpi-
On Mi, 2016-06-22 at 14:53 +0800, Haozhong Zhang wrote:
> OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
> for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
> "etc/msr_feature_control" to advise bits that should be set in
> MSR_IA32_FEATURE_CONTROL. If this
On Fri, Jul 01, 2016 at 01:50:24PM +0200, Igor Mammedov wrote:
> Replace repeated pattern
>
> for (i = 0; i < nb_numa_nodes; i++) {
> if (test_bit(idx, numa_info[i].node_cpu)) {
>...
>break;
>
> with a helper function to lookup numa node index for cpu.
>
> Sug
On 30 June 2016 at 20:52, Alex Williamson wrote:
> The following changes since commit 8a0b4de048e20215415b24c7b42514c27b9d6ef3:
>
> pcspk: fix KVM (2016-06-30 19:00:02 +0100)
>
> are available in the git repository at:
>
> git://github.com/awilliam/qemu-vfio.git tags/vfio-update-20160630.0
>
>
On Tue, Jun 28, 2016 at 07:33:51PM +0200, Paolo Bonzini wrote:
> From: Marc-André Lureau
>
> This helps to remove various chardev resources leaks when leaving qemu.
>
> Signed-off-by: Marc-André Lureau
> Message-Id: <1466105332-10285-2-git-send-email-marcandre.lur...@redhat.com>
> Signed-off-by
On Windows 'aux.*' is a reserved name and cannot be used for
filenames; see
https://msdn.microsoft.com/en-gb/library/windows/desktop/aa365247(v=vs.85).aspx
This prevents cloning the QEMU git repo on Windows:
C:\Java\sources\kvm> git clone https://github.com/qemu/qemu.git
Cloning into 'qemu'...
On Fri, 24 Jun 2016 15:28:49 +0200
Cornelia Huck wrote:
> We had been looking at remodelling the pci representation for s390x
> to handle our slightly odd architecture correctly some time ago
> already, but now we have a patchset that we're happy with.
>
> There's a bunch of bugfixes, cleanups a
In some ways this v2 is more of an RFC then the initial posting, which
had a different subject, and is here [*]. In this version we point out
the real [current] goal, which is to get the guest MPIDR consistent
with KVM. However, what's debatable is we purposefully neglect 32-bit
consistency, as KVM
Signed-off-by: Andrew Jones
---
include/hw/intc/arm_gic.h | 3 +++
include/hw/intc/arm_gicv3_common.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/include/hw/intc/arm_gic.h b/include/hw/intc/arm_gic.h
index 0971e37710dd6..42bb535fd4571 100644
--- a/include/hw/intc/arm_gic.h
++
On Fri, 1 Jul 2016 10:44:39 +0530
Bharata B Rao wrote:
> During CPU core realization, we create all the thread objects and parent
> them to the core object in a loop. However, the realization of thread
> objects is done separately by walking the threads of a core using
> object_child_foreach().
On 1 July 2016 at 13:40, Andrew Jones wrote:
> On Thu, Jun 30, 2016 at 03:09:53PM +0100, Peter Maydell wrote:
>> On 28 June 2016 at 18:14, Ard Biesheuvel wrote:
>> > Since QEMU performs cacheable accesses to guest memory when doing DMA
>> > as part of the implementation of emulated PCI devices, g
KVM adjusts the MPIDR of guest vcpus based on the architecture of
the host, 32-bit vs. 64-bit, and, for 64-bit, also on the type of
GIC the guest is using. To be consistent and improve SGI efficiency
we make the same adjustments for TCG as 64-bit KVM hosts. We neglect
to add consistency with 32-bit
Public bug reported:
Hardware: X86-64, Intel(R) Core(TM) i7-6500U( Skylake)
OS: Linux Mint 18
Host Kernel: 4.5.7 + PaX/Grsecurity
Qemu: QEMU emulator version 2.5.0 (Debian 1:2.5+dfsg-5ubuntu10.2)
[Reproduction Steps]
1, Install a Debian 8 in the guest
2, Install a customized kernel( using same co
Linux on X86_64 does not use sel_arg_struct for select(), the args are
passed directly. This patch switches a define so X86_64 uses the correct
calling convention.
Signed-off-by: Allan Wirth
---
linux-user/syscall.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-user/s
On 1 July 2016 at 07:41, David Gibson wrote:
> The following changes since commit 8a0b4de048e20215415b24c7b42514c27b9d6ef3:
>
> pcspk: fix KVM (2016-06-30 19:00:02 +0100)
>
> are available in the git repository at:
>
> git://github.com/dgibson/qemu.git tags/ppc-for-2.7-20
On 1 July 2016 at 12:40, Andrew Jones wrote:
> I might have mentioned in the commit message that the ACPI generation
> already does this, as _CCA is set to 1, added with commit bc64b96c
> (assuming I'm right, and a value of 1 there is the ACPI equivalent of
> this patch)
>
> bc64b96c's commit mes
On 1 July 2016 at 12:59, Wirth, Allan wrote:
> Linux on X86_64 does not use sel_arg_struct for select(), the args are
> passed directly. This patch switches a define so X86_64 uses the correct
> calling convention.
>
> Signed-off-by: Allan Wirth
> ---
> linux-user/syscall.c | 2 +-
> 1 file chan
On 07/01/2016 06:45 AM, Peter Maydell wrote:
> On Windows 'aux.*' is a reserved name and cannot be used for
> filenames; see
>
> https://msdn.microsoft.com/en-gb/library/windows/desktop/aa365247(v=vs.85).aspx
>
> This prevents cloning the QEMU git repo on Windows:
>
> C:\Java\sources\kvm> git
Markus Armbruster writes:
> Sascha Silbe writes:
>
>> Dear Markus,
>>
>> Markus Armbruster writes:
>>
>>> ---
>>> tests/header-test-template.c | 16
>> [...]
>>
>> Thanks, that helped, I get a bit further now.
>>
>> Is "make header-check" supposed to work on a host that doesn't
On 06/30/16 21:07, Marcel Apfelbaum wrote:
> 64-bit BARs allocations fix for devices behind PXBs/PXB-PCIEs.
>
> In build_crs() the calculation and merging of the ranges already happens
> in 64-bit, but the entry boundaries are silently truncated to 32-bit in the
> call to aml_dword_memory(). Fix i
On 07/01/2016 04:57 PM, Laszlo Ersek wrote:
On 06/30/16 21:07, Marcel Apfelbaum wrote:
64-bit BARs allocations fix for devices behind PXBs/PXB-PCIEs.
In build_crs() the calculation and merging of the ranges already happens
in 64-bit, but the entry boundaries are silently truncated to 32-bit in
Thanks! That makes sense. But, off the cuff, it seems odd that
there's an instance_id if it can only be zero. But then again, it may be
overloaded or be applicable in other cases. I'll dig into the code
today.
On 07/01/2016 02:27 AM, Dr. David Alan Gilbert wrote:
> Hi Tom,
>Yeh it's just
On 06/30/2016 03:32 PM, John Arbuckle wrote:
> Add debug macros to the code for easier debugging.
>
> Signed-off-by: John Arbuckle
> ---
> hw/input/hid.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/hw/input/hid.c b/hw/input/hid.c
> index 3e1b46e..efe703e 100644
> --- a
Signed-off-by: Michael Rolnik
---
MAINTAINERS | 6 ++
hw/avr/Makefile.objs | 21 +
hw/avr/sample-io.c | 227 +++
hw/avr/sample.c | 116 ++
4 files changed, 370 insertions(+)
create mode 100644 hw/avr/M
This series of patches adds 8bit AVR cores to QEMU.
All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully tested
yet.
However I was able to execute simple code with functions. e.g fibonacci
calculation.
This series of patches include a non real, sample board.
No fuses support yet
Signed-off-by: Michael Rolnik
---
target-avr/decode.c | 693
1 file changed, 693 insertions(+)
create mode 100644 target-avr/decode.c
diff --git a/target-avr/decode.c b/target-avr/decode.c
new file mode 100644
index 000..44a5815
--- /dev/
Signed-off-by: Michael Rolnik
---
target-avr/cpu.c | 307 ++-
target-avr/cpu.h | 53 +
target-avr/machine.c | 1 +
3 files changed, 360 insertions(+), 1 deletion(-)
diff --git a/target-avr/cpu.c b/target-avr/cpu.c
index 1fdc1e6..
Signed-off-by: Michael Rolnik
---
arch_init.c | 2 +
configure | 5 +
default-configs/avr-softmmu.mak | 21 +++
include/disas/bfd.h | 6 +
include/sysemu/arch_init.h | 1 +
target-avr/Makefile.objs| 23 +++
target-avr/cp
Signed-off-by: Michael Rolnik
---
target-avr/helper.c | 59 -
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index 3e23646..060b2f0 100644
--- a/target-avr/helper.c
+++ b/target-avr/helper
Signed-off-by: Michael Rolnik
---
target-avr/Makefile.objs | 4 +-
target-avr/translate.c | 142 ---
2 files changed, 64 insertions(+), 82 deletions(-)
diff --git a/target-avr/Makefile.objs b/target-avr/Makefile.objs
index 2a10104..9757721 100644
-
Signed-off-by: Michael Rolnik
---
target-avr/helper.c | 222 +---
target-avr/helper.h | 6 ++
2 files changed, 215 insertions(+), 13 deletions(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index 060b2f0..1a324cb 100644
--- a/target-av
Signed-off-by: Michael Rolnik
---
target-avr/translate-inst.h | 762
1 file changed, 762 insertions(+)
create mode 100644 target-avr/translate-inst.h
diff --git a/target-avr/translate-inst.h b/target-avr/translate-inst.h
new file mode 100644
index 00
On 07/01/2016 07:45 AM, Peter Maydell wrote:
> On Windows 'aux.*' is a reserved name and cannot be used for
> filenames; see
>
> https://msdn.microsoft.com/en-gb/library/windows/desktop/aa365247(v=vs.85).aspx
>
> This prevents cloning the QEMU git repo on Windows:
>
> C:\Java\sources\kvm> gi
Signed-off-by: Michael Rolnik
---
target-avr/cpugen/CMakeLists.txt | 38 +++
target-avr/cpugen/README.md| 17 ++
target-avr/cpugen/cpu/avr.yaml | 214 ++
target-avr/cpugen/src/CMakeLists.txt | 62
target-avr/cpugen/src/cpugen.cpp
Signed-off-by: Michael Rolnik
---
target-avr/translate-inst.c | 2636 +++
target-avr/translate.h | 119 ++
2 files changed, 2755 insertions(+)
create mode 100644 target-avr/translate-inst.c
create mode 100644 target-avr/translate.h
diff --git a/tar
On 27 June 2016 at 19:53, Alistair Francis wrote:
> This patch series is based on Peter C's original register API. His
> original cover letter is below.
>
> Future work: Allow support for memory attributes.
Thanks, applied to target-arm.next. (You still had a typo
in your finalize function name b
Yeh I *think* the idea is that you either:
a) have an instance_id
or
b) have a unique name
in which case you're also allowed to have an old compatibility
name/instance_id to work with old code that didn't have a unique name (that's
in se->compat)
so the assert is:
asser
On 28 June 2016 at 19:24, Cédric Le Goater wrote:
> This enables qemu to handle late inits and report errors. All the SSI
> slave routine names were changed accordingly. Code was modified to
> handle errors when possible (m25p80 and ssi-sd)
>
> Tested with the m25p80 slave object.
>
> Suggested-by
On 28 June 2016 at 19:24, Cédric Le Goater wrote:
> A set of SPI flash slaves is attached under the flash controllers of
> the palmetto platform. "n25q256a" flash modules are used for the BMC
> and "mx25l25635e" for the host. These types are common in the
> OpenPower ecosystem.
>
> Signed-off-by:
On 01/07/2016 14:34, Andrew Jones wrote:
>> >
> With this patch, I now get
>
> qemu: qemu_mutex_destroy: Device or resource busy
>
> and a SIGABRT when my arm tcg kvm-unit-tests guest exits
> (I haven't tried any other guest types yet)
Eric, Laszlo, is it POSIX compliant to fail destruction o
On 07/01/16 17:18, Paolo Bonzini wrote:
>
>
> On 01/07/2016 14:34, Andrew Jones wrote:
>> With this patch, I now get
>>
>> qemu: qemu_mutex_destroy: Device or resource busy
>>
>> and a SIGABRT when my arm tcg kvm-unit-tests guest exits
>> (I haven't tried any other guest types yet)
>
> Eri
Thanks for the feedback. I didn’t find that patch before when I searched, so
apologies for the duplicate submission.
The proposed fix certainly does seem cleaner and more general. Does it
imply though that this patch is incorrect? It fixes the emulation bug
in my use case, and AFAICT does not intr
On Fri, Jul 01, 2016 at 12:54:30PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
Thanks. See my comments below.
[...]
> --- a/src/misc.c
> +++ b/src/misc.c
> @@ -11,6 +11,7 @@
> #include "output.h" // debug_enter
> #include "stacks.h" // call16_int
> #include "string.h" // memse
Hi,
> known issues / todo list:
> * isolinux/pxelinux seems to have trouble with this.
Found this one. video_* fields in BDA need accurate info for syslinux
to work.
Also added cp437 -> utf8 mapping for proper box character drawings.
Stuff is here: https://www.kraxel.org/cgit/seabios/log/?h
On Fri, Jul 1, 2016 at 8:11 AM, Peter Maydell wrote:
> On 27 June 2016 at 19:53, Alistair Francis
> wrote:
>> This patch series is based on Peter C's original register API. His
>> original cover letter is below.
>>
>> Future work: Allow support for memory attributes.
>
> Thanks, applied to targe
Hi all,
block jobs are currently identified by the name of the block backend
of the BDS where the job was started.
The problem with this is that you cannot have block jobs on nodes
where there is no such name.
This series turns the 'id' field of the BlockJob structure into an
actual ID, it guara
This patch adds a new optional 'job-id' parameter to 'block-commit',
allowing the user to specify the ID of the block job to be created.
Signed-off-by: Alberto Garcia
Reviewed-by: Max Reitz
---
block/commit.c| 7 ---
block/mirror.c| 6 +++---
blockdev.c
img_commit() creates a block job without an ID. This is no longer
allowed now that we require it to be unique and well-formed. We were
solving this by having a fallback in block_job_create(), but now that
we extended the API of commit_active_start() we can finally set an
explicit ID and revert that
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