On Thu, 03/24 17:56, Stefan Hajnoczi wrote:
> Stop processing the vring if an avail ring index is invalid.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> hw/virtio/virtio.c | 47 +--
> 1 file changed, 33 insertions(+), 14 deletions(-)
>
> diff --git a/hw/
On Thu, 03/24 17:56, Stefan Hajnoczi wrote:
> If the index avail ring index is bogus virtqueue_num_heads() must return
s/index avail/avail/ ?
> -EINVAL.
>
> The only caller is virtqueue_get_avail_bytes(). Return saying no bytes
> are available when virtqueue_num_heads() fails.
>
> Signed-off-b
From: Zhang Chen
Filter-mirror is a netfilter plugin.
It gives qemu the ability to mirror
packets to a chardev.
usage:
-netdev tap,id=hn0
-chardev socket,id=mirror0,host=ip_primary,port=X,server,nowait
-filter-mirror,id=m0,netdev=hn0,queue=tx/rx/all,outdev=mirror0
Signed-off-by: Zhang Chen
Si
From: Sameeh Jubran
This reverts commit 9596ef7c7b8528bedb240792ea1fb598543ad3c4.
This workaround in order to fix endless interrupts is no
longer needed because it was superseded by the previous patch
(e1000: Fixing interrupt pace).
Signed-off-by: Sameeh Jubran
Signed-off-by: Jason Wang
---
From: Zhang Chen
Change filter_mirror_send interface to make it easier
to used by other filter
Signed-off-by: Zhang Chen
Signed-off-by: Wen Congyang
Signed-off-by: Li Zhijian
Signed-off-by: Jason Wang
---
net/filter-mirror.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
From: Zhang Chen
In this unit test,we will test the filter redirector function.
Case 1, tx traffic flow:
qemu side | test side
|
+-+| +---+
| backend <---+ sock0 |
+++| +---+
|
From: Sameeh Jubran
This patch introduces an upper bound for number of interrupts
per second. Without this bound an interrupt storm can occur as
it has been observed on Windows 10 when disabling the device.
According to the SPEC - Intel PCI/PCI-X Family of Gigabit
Ethernet Controllers Software D
The following changes since commit b68a80139e37e806f004237e55311ebc42151434:
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20160324' into
staging (2016-03-24 16:24:02 +)
are available in the git repository at:
https://github.com/jasowang/qemu.git tags/net-pull-request
for you
From: Zhang Chen
In this unit test we will test the mirror function.
start qemu with:
-netdev socket,id=qtest-bn0,fd=sockfd
-device e1000,netdev=qtest-bn0,id=qtest-e0
-chardev socket,id=mirror0,path=/tmp/filter-mirror-test.sock,server,nowait
-object filter-mirror,id=qtest
From: Zhang Chen
Filter-redirector is a netfilter plugin.
It gives qemu the ability to redirect net packet.
redirector can redirect filter's net packet to outdev.
and redirect indev's packet to filter.
filter
+
redirector |
On 03/25/2016 04:34 AM, Eric Blake wrote:
> On 03/20/2016 11:25 PM, Jason Wang wrote:
>> This patch add the capability of basic vhost net busy polling which is
>> supported by recent kernel. User could configure the maximum number of
>> us that could be spent on busy polling through a new propert
On 03/21/2016 03:26 PM, Fam Zheng wrote:
> On Mon, 03/21 13:25, Jason Wang wrote:
>> diff --git a/qapi-schema.json b/qapi-schema.json
>> index 88f9b81..ea56a01 100644
>> --- a/qapi-schema.json
>> +++ b/qapi-schema.json
>> @@ -2532,7 +2532,8 @@
>> '*vhostfd':'str',
>> '*vhostfds':
On Thu, Mar 24, 2016 at 04:08:13PM -0600, Eric Blake wrote:
> On 03/23/2016 08:16 AM, Denis V. Lunev wrote:
> > From: Pavel Borzenkov
> >
> > With the availability of sparse storage formats, it is often needed to
> > query status of a particular LBA range and read only those blocks of
> > data th
On 25 Mar 2016, at 08:49, Wouter Verhelst wrote:
> Yes. This has been discussed on the nbd-general list in the past. There
> is also the (significant) problem of the server having maybe already
> sent out the header before discovering there is an error, at which point
> it can *only* drop the co
if packets are same, we send primary packet and drop secondary
packet, otherwise notify COLO do checkpoint.
Signed-off-by: Zhang Chen
Signed-off-by: Li Zhijian
Signed-off-by: Wen Congyang
---
net/colo-compare.c | 122 -
1 file changed, 121 in
In this patch we use kernel jhash table to track
connection, and then enqueue net packet like this:
+ CompareState ++
| |
+---+ +---+ +---+
|conn list +--->conn +->conn |
+---+ +-
packet come from primary char indev will be send to
outdev - packet come from secondary char dev will be drop
Signed-off-by: Li Zhijian
Signed-off-by: Zhang Chen
Signed-off-by: Wen Congyang
---
net/Makefile.objs | 1 +
net/colo-compare.c | 344 +++
COLO-compare is a part of COLO project. It is used
to compare the network package to help COLO decide
whether to do checkpoint.
v1:
- initial patch
Zhang Chen (3):
colo-compare: introduce colo compare initlization
colo-compare: track connection and enqueue packet
colo-compare: introduce p
Hi Laurent,
On Thu, 24 Mar 2016 09:41:59 +0100
Laurent Vivier wrote:
> On 24/03/2016 06:35, David Gibson wrote:
> > On Tue, Mar 22, 2016 at 05:33:45PM +0100, Laurent Vivier wrote:
> >> Hi David,
> >>
> >> using kvm-unit-tests, I've found a side effect of your patches: the MSR
> >> is cleared (
On 25/03/2016 07:49, Cao jin wrote:
> place relevant code tegother, make the code easier to read
>
> Signed-off-by: Cao jin
> ---
> hw/pci/pci.c | 16
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index e67664d..f0f41dc 10064
On Thu, 03/24 17:15, Cornelia Huck wrote:
> Here's the next version of my refactoring of the virtio host notifiers.
> This one actually survives a bit of testing for me (reboot loop).
>
> As this patchset fixes a latent bug exposed by the recent dataplane
> changes (we have a deassigned ioeventfd
The collision check does nothing and hasn't been used. Remove the
variable together with related code.
Signed-off-by: Fam Zheng
---
include/exec/memory.h | 1 -
memory.c | 35 ---
2 files changed, 36 deletions(-)
diff --git a/include/exec/memory.h b
Fam Zheng (2):
memory: Remove code for mr->may_overlap
memory: Drop FlatRange.romd_mode
include/exec/memory.h | 1 -
memory.c | 39 ---
2 files changed, 40 deletions(-)
--
2.4.3
From: Shannon Zhao
Add PMU IRQ number in ACPI table, then we can use PMU in guest through
ACPI.
Signed-off-by: Shannon Zhao
---
hw/arm/virt-acpi-build.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 6a86b2c..7a377e5 100644
---
From: Shannon Zhao
Check if kvm supports guest PMUv3. If so, set the corresponding feature
bit for vcpu.
Signed-off-by: Shannon Zhao
---
linux-headers/asm-arm64/kvm.h | 6 ++
linux-headers/linux/kvm.h | 2 ++
target-arm/cpu-qom.h | 2 ++
target-arm/kvm64.c| 5 +
From: Shannon Zhao
Add a virtual PMU device for virt machine while use PPI 7 for PMU
overflow interrupt number.
Signed-off-by: Shannon Zhao
---
hw/arm/virt.c | 31 +++
include/hw/arm/virt.h | 2 ++
include/sysemu/kvm.h | 1 +
stubs/kvm.c | 5 ++
From: Shannon Zhao
KVM-ARM64 supports guest PMU now. This series add the support in machine
virt so that guest could use PMU.
Shannon Zhao (3):
target-arm: kvm64: set guest PMUv3 feature bit if supported
hw/arm/virt: Add PMU node for virt machine
hw/arm/virt-acpi-build: Add PMU IRQ number
Its value is alway set to mr->romd_mode, so the removed comparisons are
fully superseded by "a->mr == b->mr".
Signed-off-by: Fam Zheng
---
memory.c | 4
1 file changed, 4 deletions(-)
diff --git a/memory.c b/memory.c
index d5b75f2..26af83f 100644
--- a/memory.c
+++ b/memory.c
@@ -224,7 +22
qemu_hexdump() in util/hexdump.c has been changed to give also include a
ascii dump of the buffer. Also, calls to hex_dump() in net/net.c have
been replaced with calls to qemu_hexdump(). This takes care of two misc
BiteSized Tasks.
Signed-off-by: Isaac Lozano <109loza...@gmail.com>
---
v2: Fixed
Hi there.. ping. Hey, what do you think about this all?
On 12.02.2016 21:00, Vladimir Sementsov-Ogievskiy wrote:
Hi all!
These series are derived from my 'Dirty bitmaps migration' series. The
core idea is switch to postcopy migration and drop usage of meta
bitmaps.
These patches provide dirty
> Fam Zheng (2):
> memory: Remove code for mr->may_overlap
> memory: Drop FlatRange.romd_mode
>
> include/exec/memory.h | 1 -
> memory.c | 39 ---
> 2 files changed, 40 deletions(-)
Thanks, both look good. Not sure they'll make it in 2.6 t
Hi Cedric,
On Thu, 24 Mar 2016 16:28:53 +0100
Cédric Le Goater wrote:
> This address is changed by the linux kernel using the H_SET_MODE hcall
> and needs to be migrated in order to restart a spapr VM running in
> TCG. This can be done using the AIL bits from the LPCR register.
>
> The patch in
- Original Message -
> From: "Fam Zheng"
> To: "Paolo Bonzini"
> Cc: qemu-devel@nongnu.org, "arei gonglei" ,
> m...@redhat.com
> Sent: Friday, March 25, 2016 7:20:38 AM
> Subject: Re: [PATCH 2/2] memory: hide mr->ram_addr from qemu_get_ram_ptr users
>
> On Thu, 03/24 12:03, Paolo Bonz
On Fri, 03/25 07:58, Paolo Bonzini wrote:
>
>
> - Original Message -
> > From: "Fam Zheng"
> > To: "Paolo Bonzini"
> > Cc: qemu-devel@nongnu.org, "arei gonglei" ,
> > m...@redhat.com
> > Sent: Friday, March 25, 2016 7:20:38 AM
> > Subject: Re: [PATCH 2/2] memory: hide mr->ram_addr from
> > > If called by address_space_unmap, is this addition still correct?
> >
> > No, thanks for the careful review! That's another opportunity
> > for cleanup actually, splitting the (few) users of qemu_ram_addr_from_host
> > that really need a ram_addr_t and those (the majority) that need a
> > M
Here's version 2 of the ITC feature. The main change is that this patchset
is rebased on top of CPS patch series and now ITU block is created within
the CPS container instead of Malta board directly.
Original description in version 1 of the series:
https://lists.gnu.org/archive/html/qemu-devel/201
P/V Synchronized and Try Views can be used to access Semaphore cells.
Load returns current value and post-decrements the value in the cell
(until it reaches zero). Stores increment the value (until it saturates
at 0x).
P/V Synchronized View causes the issuing thread to block on read if value
i
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index a5b8805..65f2caf 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -17194,6 +17194,7 @@ static void decode_opc_spec
Implement ITC as a single object consisting of two memory regions:
1) tag_io: ITC Configuration Tags (i.e. ITCAddressMap{0,1} registers) which
are accessible by the CPU via CACHE instruction. Also adding
MemoryRegion *itc_tag to the CPUMIPSState so that CACHE instruction will
dispatch reads/writes
Control view is used to access the ITC Storage Cell Tags. It never causes
the issuing thread to block.
Guest can empty the FIFO cell by setting Empty bit to 1.
Signed-off-by: Leon Alrae
---
hw/misc/mips_itu.c | 104 +
1 file changed, 104 inser
Empty/Full Synchronized and Try views can be used to access FIFO cells.
Store to the FIFO cell pushes the value into the queue, load pops the oldest
element from the queue. Cell's Full and Empty bits are automatically updated
to reflect new state of the cell.
Empty/Full Synchronized View causes th
Bypass View does not cause issuing thread to block and does not affect
any of the cells state bit.
Read from a FIFO cell returns the value of the oldest entry.
Store to a FIFO cell changes the value of the newest entry.
Signed-off-by: Leon Alrae
---
hw/misc/mips_itu.c | 27 +
Add CP0.ErrCtl register with WST, SPR and ITC bits. In 34K and interAptiv
processors these bits are used to enable CACHE instruction access to
different arrays. When WST=0, SPR=0 and ITC=1 the CACHE instruction will
access ITC tag values.
Generally we do not model caches and we have been treating
Make ITU available in the system if CPU supports multithreading
and is part of CPS.
Signed-off-by: Leon Alrae
---
hw/mips/cps.c | 32
include/hw/mips/cps.h | 2 ++
2 files changed, 34 insertions(+)
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 59e792
From: Aleksandar Markovic
This patch utilizes provisions from the previous patch, and configures
Mips R6 CPUs and Mips MSA units appropriately with reference to the meaning
of the signaling NaN bit (this is mentioned in point 3 in the list below).
The majority of involved MIPS instructions will b
From: Aleksandar Markovic
Mips platform represents the most complex case among QEMU-supported
platforms in reference to certain aspects of floating-point arithmetics.
This is mostly a consequence of the fact that Mips platform, for many
reasons, evolved considerably over time related to floating-
From: Aleksandar Markovic
This patch enables SoftFloat library to be configured at run-time in
relation to the meaning of signaling NaN bit.
Background:
In floating-point calculations, there is a need for denoting undefined or
unrepresentable values. This is achieved by defining certain floatin
On 14/03/2016 16:26, Pranith Kumar wrote:
> I am trying to understand what scenarios can result in no TBs
> executing for that CPU. My understanding is that there is a pending
> operation which needs to be handled before we can execute TBs from
> this CPU(I/O?).
For example the CPU could be halt
This patchset switches from the PS/2 keycode to QKeyCode support in the hid.c
file.
John Arbuckle (3):
usb-keys.h: initial commit
hid.c: convert to QKeyCode
hid.c: Add debug support
hw/input/hid.c | 279 ++--
include/hw/input/usb-keys.h
Create an emum of all the USB HID keyboard values.
Signed-off-by: John Arbuckle
---
include/hw/input/usb-keys.h | 154
1 file changed, 154 insertions(+)
create mode 100644 include/hw/input/usb-keys.h
diff --git a/include/hw/input/usb-keys.h b/includ
Switches hid.c from PS/2 to QKeyCode support.
Signed-off-by: John Arbuckle
---
hw/input/hid.c | 270 ++---
1 file changed, 179 insertions(+), 91 deletions(-)
diff --git a/hw/input/hid.c b/hw/input/hid.c
index 5912677..329a27b 100644
--- a/hw/i
Add debug macros to the code for easier debugging.
Signed-off-by: John Arbuckle
---
hw/input/hid.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/hw/input/hid.c b/hw/input/hid.c
index 329a27b..42ca592 100644
--- a/hw/input/hid.c
+++ b/hw/input/hid.c
@@ -37,6 +37,13 @@
#define
Hi
On Thu, Mar 24, 2016 at 8:10 AM, Yuanhan Liu
wrote:
>> > The following series starts from the idea that the slave can request a
>> > "managed" shutdown instead and later recover (I guess the use case for
>> > this is to allow for example to update static dispatching/filter rules
>> > etc)
>
>
Removing support for DEPTH != 32 from blizzard template header
and file that includes it, as macro DEPTH == 32 only used.
Reviewed-by: Eric Blake
Signed-off-by: Pooja Dhannawat
---
hw/display/blizzard.c | 41 -
hw/display/blizzard_template.h | 30
Programmingkid writes:
> Add debug macros to the code for easier debugging.
>
> Signed-off-by: John Arbuckle
> ---
> hw/input/hid.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/hw/input/hid.c b/hw/input/hid.c
> index 329a27b..42ca592 100644
> --- a/hw/input/hid.c
> +++
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