Hi,
is there a way to set the DHCP client identifier that iPXE uses?
The issue I face is that each client gets 2 IP addresses assigned.
One for iPXE which sends a client identifer derived from the MAC
address. The second is assigned to ipconfig in initrd which uses
no client identifier.
Assigni
On Mon, 03/21 13:25, Jason Wang wrote:
> diff --git a/qapi-schema.json b/qapi-schema.json
> index 88f9b81..ea56a01 100644
> --- a/qapi-schema.json
> +++ b/qapi-schema.json
> @@ -2532,7 +2532,8 @@
> '*vhostfd':'str',
> '*vhostfds': 'str',
> '*vhostforce': 'bool',
> -'*queues
On 20.03.2016 12:39, Samuel Thibault wrote:
> Make net=0.0.0.0 disable IPv4 and ip6-net=:: disable IPv6, so the user can
> setup IPv4-only and IPv6-only network environments.
>
> Signed-off-by: Samuel Thibault
> ---
> net/slirp.c | 8 +---
> qapi-schema.json | 4 ++--
> qemu-options
Samuel Thibault writes:
> Make net=0.0.0.0 disable IPv4 and ip6-net=:: disable IPv6, so the user can
> setup IPv4-only and IPv6-only network environments.
Do "net=" and "ip6-net=" mean anything useful? If not, wouldn't that be
a more natural way to switch off than abusing the wildcard address?
Each Partitionable Endpoint (IOMMU group) has an address range on a PCI bus
where devices are allowed to do DMA. These ranges are called DMA windows.
By default, there is a single DMA window, 1 or 2GB big, mapped at zero
on a PCI bus.
PAPR defines a DDW RTAS API which allows pseries guests
queryin
6a81dd17 "spapr_iommu: Rename vfio_accel parameter" renamed vfio_accel
flag everywhere but one spot was missed.
Signed-off-by: Alexey Kardashevskiy
---
target-ppc/kvm_ppc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
index fc793
We are going to have multiple DMA windows soon so let's start preparing.
This adds a new helper to create a DMA window and makes use of it in
sPAPRPHBState::realize().
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v14:
* replaced "int" return to Error* in spapr_phb_dma_window_enable()
---
hw
At the moment presence of vfio-pci devices on a bus affect the way
the guest view table is allocated. If there is no vfio-pci on a PHB
and the host kernel supports KVM acceleration of H_PUT_TCE, a table
is allocated in KVM. However, if there is vfio-pci and we do yet not
KVM acceleration for these,
The sPAPR TCE tables manage 2 copies when VFIO is using an IOMMU -
a guest view of the table and a hardware TCE table. If there is no VFIO
presense in the address space, then just the guest view is used, if
this is the case, it is allocated in the KVM. However since there is no
support yet for VFIO
This adds @bus_offset, @page_shift, @enabled members to migration stream.
These cannot change without dynamic DMA windows so no change in
behavior is expected.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v14:
* new to the series
---
hw/ppc/spapr_iommu.c | 5 -
1 file changed, 4 insertio
There are going to be multiple IOMMUs per a container. This moves
the single host IOMMU parameter set to a list of VFIOHostIOMMU.
This should cause no behavioral change and will be used later by
the SPAPR TCE IOMMU v2 which will also add a vfio_host_iommu_del() helper.
Signed-off-by: Alexey Karda
This allows dynamic allocation for migrating arrays.
Already existing VMSTATE_VARRAY_UINT32 requires an array to be
pre-allocated, however there are cases when the size is not known in
advance and there is no real need to enforce it.
This defines another variant of VMSTATE_VARRAY_UINT32 with WMS_
New VFIO_SPAPR_TCE_v2_IOMMU type supports dynamic DMA window management.
This adds ability to VFIO common code to dynamically allocate/remove
DMA windows in the host kernel when new VFIO container is added/removed.
This adds VFIO_IOMMU_SPAPR_TCE_CREATE ioctl to vfio_listener_region_add
and adds ju
This adds support for Dynamic DMA Windows (DDW) option defined by
the SPAPR specification which allows to have additional DMA window(s)
This implements DDW for emulated and VFIO devices.
This reserves RTAS token numbers for DDW calls.
This changes the TCE table migration descriptor to support dyn
Since a788f227 "memory: Allow replay of IOMMU mapping notifications"
when new VFIO listener is added, all existing IOMMU mappings are
replayed. However there is a problem that the base address of
an IOMMU memory region (IOMMU MR) is ignored which is not a problem
for the existing user (which is pse
LoPAPR dictates that during system reset all DMA windows must be removed
and the default DMA32 window must be created so does the patch.
At the moment there is just one window supported so no change in
behaviour is expected.
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
---
hw/
This makes use of the new "memory registering" feature. The idea is
to provide the userspace ability to notify the host kernel about pages
which are going to be used for DMA. Having this information, the host
kernel can pin them all once per user process, do locked pages
accounting (once) and not s
This will be later used by the "ibm,reset-pe-dma-window" RTAS handler
which resets the DMA configuration to the defaults.
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
---
hw/ppc/spapr_pci.c | 10 --
include/hw/pci-host/spapr.h | 2 ++
2 files changed, 10 inser
Every IOMMU has some granularity which MemoryRegionIOMMUOps::translate
uses when translating, however this information is not available outside
the translate context for various checks.
This adds a get_page_sizes callback to MemoryRegionIOMMUOps and
a wrapper for it so IOMMU users (such as VFIO) c
We are going to have multiple DMA windows at different offsets on
a PCI bus. For the sake of migration, we will have as many TCE table
objects pre-created as many windows supported.
So we need a way to map windows dynamically onto a PCI bus
when migration of a table is completed but at this stage a
Currently TCE tables are created once at start and their sizes never
change. We are going to change that by introducing a Dynamic DMA windows
support where DMA configuration may change during the guest execution.
This changes spapr_tce_new_table() to create an empty zero-size IOMMU
memory region (
On Sa, 2016-03-19 at 20:31 +, Richard W.M. Jones wrote:
> I've been analyzing the libguestfs appliance[1] boot time. See
> attached file, especially the end of it.
>
> About 50% of the boot time is because of SeaBIOS.
And the bulk of that is loading the kernel from fw_cfg.
> I'm using the q
The source guest could have reallocated the default TCE table and
migrate bigger/smaller table. This adds reallocation in post_load()
if the default table size is different on source and destination.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v14:
* new to the series
---
hw/ppc/spapr_iommu
psw_read() ought to sync the PSW value with the
cached status bits (C,V,SV,AV,SAV). For this the bits
are cleared in the PSW before they are written from the
cached bits. The clear mask is too big and clears two
additional bits.
Signed-off-by: Bastian Koppelmann
---
target-tricore/helper.c | 2 +
Hi,
this series tackles the bugfixes found during FPU implementation
and are mostly on liners. This includes a missing break in a switch
statement, a forgotten reset of an OVF bit, and psw_read() clearing
too many bits.
Cheers,
Bastian
v1 -> v2:
- in patch 01 another missing break was added
When this instruction does not produce an overflow the corresponding
bit has to be reset.
Signed-off-by: Bastian Koppelmann
---
target-tricore/op_helper.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c
index 55f6724..40656c3 100644
-
After decoding/translating a RRR_DIVIDE/_EXTRACT_INSERT type instruction
we would simply fall through and would decode/translate another unintended
RRR2_MADD/RRRW_EXTRACT_INSERT instruction.
Signed-off-by: Bastian Koppelmann
---
v1 -> v2:
- Add second missing break
target-tricore/transl
On 03/20/2016 07:31 PM, rutu.shah...@gmail.com wrote:
> From: Rutuja Shah
Can you add the patch description (with examples of why this is the right thing
to do) here and not in the cover letter?
>
> Signed-off-by: Rutuja Shah
>
> ---
> audio/audio.c | 3 +--
> audio/noaudio.c
You're welcome Jason.
Dear Denis,
The policy with e1000 was to keep it as much as possible to the real
Hardware, That's why I think we should keep it 500 even though 250 pushes
the performance to the limit.
Jason what do you think about that?
On Fri, Mar 18, 2016 at 3:34 AM, Jason Wang wrote:
On Mon, Mar 21, 2016 at 08:58:27AM +0100, Gerd Hoffmann wrote:
> On Sa, 2016-03-19 at 20:31 +, Richard W.M. Jones wrote:
> > I've been analyzing the libguestfs appliance[1] boot time. See
> > attached file, especially the end of it.
> >
> > About 50% of the boot time is because of SeaBIOS.
>
Hi,alls,
I compile qemu on ubuntu 12.04,when "make",some error appears.the error:
migration/rdma.c: In function ‘qemu_rdma_dump_id’:
migration/rdma.c:738:21: error: ‘struct ibv_port_attr’ has no member named
‘link_layer’
migration/rdma.c:739:22: error: ‘struct ibv_port_attr’ has no member named
Hi,alls,
I compile qemu on ubuntu 12.04,when "make",some error appears.the error:
migration/rdma.c: In function ‘qemu_rdma_dump_id’:
migration/rdma.c:738:21: error: ‘struct ibv_port_attr’ has no member named
‘link_layer’
migration/rdma.c:739:22: error: ‘struct ibv_port_attr’ has no member named
Markus Armbruster, on Mon 21 Mar 2016 08:33:52 +0100, wrote:
> > +either in the form a.b.c.d or as number of valid top-most bits. Set to
> > 0.0.0.0
> > +to disable IPv4 completely. Default is 10.0.2.0/24.
>
> Long line.
How long is too long? This is 78 characters, and I see plenty of lines
beyo
On 20/03/2016 20:20, Sean Bruno wrote:
> aarch64 targets are now failing to build on i386 hosts due to missing
> __atomic_load_8() calls since this commit:
>
> https://github.com/qemu/qemu/commit/a0aa44b488b3601415d55041e4619aef5f3a4ba8#diff-c143d686899ae51d7b927d9c682e12fd
>
> I'm unsure if Li
Peter Maydell writes:
> On 20 March 2016 at 19:20, Sean Bruno wrote:
>> -BEGIN PGP SIGNED MESSAGE-
>> Hash: SHA512
>>
>> aarch64 targets are now failing to build on i386 hosts due to missing
>> __atomic_load_8() calls since this commit:
>>
>> https://github.com/qemu/qemu/commit/a0aa44b4
Richard W.M. Jones writes:
> This fixes commit ed7f5f1d8db06fc31352a5ef4f54985e630c575a.
>
> Signed-off-by: Richard W.M. Jones.
> Cc: Paolo Bonzini
> Cc: Stefan Hajnoczi
Reviewed-by: Alex Bennée
> ---
> docs/tracing.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff -
At the moment IOMMU MR only translate to the system memory.
However if some new code changes this, we will need clear indication why
it is not working so here is the check.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v14:
* new to the series
---
hw/vfio/common.c | 6 ++
1 file changed,
On 21 March 2016 at 09:06, Paolo Bonzini wrote:
> x86 can actually do 64-bit atomic loads and stores through the FPU, but
> I'm not sure about other 32-bit targets?
As I say, ppc32 linux is one that can't -- see commit 8a5956ad6392f1155
for last time this came up.
Ideally we should put a compile
Hi,
> > And the bulk of that is loading the kernel from fw_cfg.
>
> Yes after further investigation that is correct. It looks like
> fw_cfg has grown a DMA interface, but it's not used on x86.
>
> There is still a considerable amount of SeaBIOS overhead. In
> particular, it scans the whole o
On Fri, 03/18 16:03, Paolo Bonzini wrote:
>
>
> On 17/03/2016 17:08, Christian Borntraeger wrote:
> > Good (or bad?) news is the assert also triggers on F23, it just seems
> > to take longer.
>
> I guess good news, because we can rule out the kernel (not that I
> believed it was a kernel problem, b
Samuel Thibault writes:
> Markus Armbruster, on Mon 21 Mar 2016 08:33:52 +0100, wrote:
>> > +either in the form a.b.c.d or as number of valid top-most bits. Set to
>> > 0.0.0.0
>> > +to disable IPv4 completely. Default is 10.0.2.0/24.
>>
>> Long line.
>
> How long is too long? This is 78 charac
On 18 March 2016 at 17:00, Markus Armbruster wrote:
> Major issues addressed by this series:
>
> * The specification document is incomplete and vague. Rewritten.
>
> * When a peer goes away, and its ID gets reused for another one,
> interrupts don't work.
>
> * When configured for interrupts, w
On 20 March 2016 at 14:08, Samuel Thibault wrote:
> The following changes since commit 4829e0378dfb91d55af9dfd741bd09e8f2c4f91a:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2016-03-18'
> into staging (2016-03-18 17:18:41 +)
>
> are available in the git repository at:
>
>
On 20 March 2016 at 14:05, Samuel Thibault wrote:
> The following changes since commit 4829e0378dfb91d55af9dfd741bd09e8f2c4f91a:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2016-03-18'
> into staging (2016-03-18 17:18:41 +)
>
> are available in the git repository at:
>
>
On Sun, Mar 20, 2016 at 01:33:44AM -0400, Grant Wu wrote:
> Side note: After manually patching tap\0 to qem2, Spencer and I were still
> unable to get qemu-img info working with the image. Unsure if this is
> related to the patch or not.
What output did you get from "qemu-img info /dev/dm-1"?
D
Peter Maydell writes:
> On 18 March 2016 at 17:00, Markus Armbruster wrote:
>> Major issues addressed by this series:
>>
>> * The specification document is incomplete and vague. Rewritten.
>>
>> * When a peer goes away, and its ID gets reused for another one,
>> interrupts don't work.
>>
>> *
From: Chen Fan
the function is used to get affected devices by bus reset.
so here extract it, and can used for aer soon.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 66 +++
1 file changed, 48 insertions(+), 18 deletions(-)
diff --git a/h
From: Chen Fan
v3-v4:
1. rebase patchset to fit latest master branch.
2. modifying patches 5/10 ~ 8/10 as Alex sugguestion(Thanks).
v2-v3:
1. fix patch 4/9, 5/9 as Alex sugguestion.
2. patches 5/9 ~ 8/9 are made to force limiting that all vfio functions
are combined in the same
From: Chen Fan
For vfio pcie device, we could expose the extended capability on
PCIE bus. due to add a new pcie capability at the tail of the chain,
in order to avoid config space overwritten, we introduce a copy config
for parsing extended caps. and rebuild the pcie extended config space.
Signe
From: Chen Fan
when boot up a VM that assigning vfio devices with aer enabled, we
must check the vfio device whether support host bus reset. because
when one error occur. OS driver always recover the device by do a
bus reset, in order to recover the vfio device, qemu must able to do
a host bus re
The following changes since commit 4829e0378dfb91d55af9dfd741bd09e8f2c4f91a:
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2016-03-18' into
staging (2016-03-18 17:18:41 +)
are available in the git repository at:
git://github.com/berrange/qemu tags/pull-crypto-2016-03-21-1
From: Chen Fan
squeeze out vfio_pci_do_hot_reset to do host bus reset when AER recovery.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 75 +++
1 file changed, 44 insertions(+), 31 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
ind
From: Chen Fan
Calling pcie_aer_init to initilize aer related registers for
vfio device, then reload physical related registers to expose
device capability.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 85 ---
hw/vfio/pci.h | 3 +++
2 fil
Prior to the nettle 3.0.0 release, the cast5_set_key function
was actually named cast128_set_key, so we must add a compatibility
definition.
Signed-off-by: Daniel P. Berrange
---
crypto/cipher-nettle.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/crypto/cipher-nettle.c b/crypto/cipher-n
Hi Marcel,
I found that the information on "Enabling multi-queue" in
http://wiki.qemu.org/Features/vhost-user-ovs-dpdk
are inaccurate.
In ovs 2.5 or older, The option 'other_config:n-dpdk-rxqs' is used and there is
no options:n_rxq.
The n_rxq is available since post 2.5.0.
But when setup an
From: Chen Fan
Due to all devices assigned to VM on the same way as host if enable
aer, so we can easily do the hot reset by selecting the function #0
to do the hot reset.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 50 ++
hw/vfio/pci.h | 2 ++
From: Chen Fan
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 29 -
1 file changed, 20 insertions(+), 9 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 0516d94..8842b7f 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -2060,14 +2060,25 @@ static void vfi
From: Chen Fan
when the vfio device encounters an uncorrectable error in host,
the vfio_pci driver will signal the eventfd registered by this
vfio device, resulting in the qemu eventfd handler getting
invoked.
this patch is to pass the error to guest and let the guest driver
recover from the err
From: Chen Fan
add 'aer' property to let user able to decide whether expose
the aer capability. by default we should disable aer feature,
because it needs configuration restrictions.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/vfio/pci.c b
From: Chen Fan
because we make the vfio functions are combined
in the same way as on the host for aer, so we can
do the aer check when the function 0 was hotplugged.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 45 +
1 file changed, 45 insertions(+)
For versions of nettle < 3.0.0, the cipher functions took a
'void *ctx' and 'unsigned len' instad of 'const void *ctx'
and 'size_t len'. The xts functions though are builtin to
QEMU and always expect the latter signatures. Define a
second set of wrappers to use with the correct signatures
needed by
On 21 March 2016 at 10:05, Markus Armbruster wrote:
> Peter Maydell writes:
>> Also some new clang ubsan warnings on x86 Linux:
>> GTESTER check-qtest-i386
>> [deleted existing warnings about slirp code]
>> /home/petmay01/linaro/qemu-for-merges/hw/pci/pci.c:166:23: runtime
>> error: shift exponen
Hello Liang, or anyone else affected,
Accepted qemu into kilo-proposed. The package will build now and be
available in the Ubuntu Cloud Archive in a few hours, and then in the
-proposed repository.
Please help us by testing this new package. To enable the -proposed
repository:
sudo add-apt-rep
On Fr, 2016-03-18 at 14:45 +0100, Marc-André Lureau wrote:
> Hi
>
> On Fri, Mar 18, 2016 at 2:17 PM, Gerd Hoffmann wrote:
> > Ping Marc? Any comment on this?
>
>
> Could you send a rebased series, for the patches that lead to the
> issue?
Update pushed to https://www.kraxel.org/cgit/qemu/log/
Any ideas?
On Thu, Mar 17, 2016 at 4:19 PM, Mohammed Gamal wrote:
> Hi All,
>
> I have a question regarding the way CPU topology is exposed to the guest.
>
> On a 4-core Amazon AWS VM I can see the CPU topology exposed to the
> guest in the following manner:
>
> # lstopo
> Machine (7480MB)
> So
On Mon, 21 Mar 2016 14:57:53 +1100
David Gibson wrote:
> On Fri, Mar 18, 2016 at 08:59:32AM +0530, Bharata B Rao wrote:
> > On Thu, Mar 17, 2016 at 09:03:43PM +1100, David Gibson wrote:
> > > On Wed, Mar 16, 2016 at 04:48:50PM +0100, Igor Mammedov wrote:
> > > > On Wed, 16 Mar 2016 09:18:03 +
On Fri, 18 Mar 2016 16:26:28 -0300
Eduardo Habkost wrote:
> On Tue, Mar 15, 2016 at 02:24:07PM +0100, Igor Mammedov wrote:
> [...]
> > diff --git a/stubs/qmp_query_hotpluggable_cpus.c
> > b/stubs/qmp_query_hotpluggable_cpus.c
> > new file mode 100644
> > index 000..21a75a3
> > --- /dev/null
On Thu, 03/17 19:03, tu bo wrote:
>
> On 03/17/2016 08:39 AM, Fam Zheng wrote:
> >On Wed, 03/16 14:45, Paolo Bonzini wrote:
> >>
> >>
> >>On 16/03/2016 14:38, Christian Borntraeger wrote:
> If you just remove the calls to virtio_queue_host_notifier_read, here
> and in virtio_queue_aio_set_
On Thu, 17 Mar 2016 15:54:05 -0600
Bruce Rogers wrote:
> This file is no longer used. Remove it from
> pc-bios/ and from the list of blobs to install.
>
> Signed-off-by: Bruce Rogers
It would be nice for commit message to say since
when/what commit the blob is not used.
> ---
> Makefile
From: Peter Xu
Use heap instead of stack.
Signed-off-by: Peter Xu
Signed-off-by: Gerd Hoffmann
---
hw/usb/dev-mtp.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c
index 7391783..62fb7cd 100644
--- a/hw/usb/dev-mtp.c
+++ b/hw/usb/dev-
From: Peter Xu
All the callers for xhci_dma_write_u32s() are using mostly 5 * uint32_t
in len. To avoid unbound stack warning for the function, make it
statically allocated, and assert when it's not big enough in the
future.
Signed-off-by: Peter Xu
Message-id: 1457661106-9569-1-git-send-email-p
From: Peter Xu
Signed-off-by: Peter Xu
Reviewed-by: Paolo Bonzini
Message-id: 1457503640-31473-1-git-send-email-pet...@redhat.com
Signed-off-by: Gerd Hoffmann
---
hw/usb/dev-mtp.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c
inde
From: Stefan Weil
Mingw-w64 does not provide sys/ioctl.h and Linux builds don't need it,
so remove that include statement.
ERROR is defined by wingdi.h (included via windows.h). Undefine it before
it is redefined to avoid a compiler warning / error.
Signed-off-by: Stefan Weil
Message-id: 14581
From: Matthew Fortune
inotify_init1 usage was guarded by a check for linux but does not
exist on older distributions like CentOS 5 resulting in build
failures.
Signed-off-by: Matthew Fortune
Message-id: 6d39441bf12ef246a7abce6654b023536bb85...@hhmail02.hh.imgtec.org
Signed-off-by: Gerd Hoffmann
From: Prasad J Pandit
USB Ehci emulation supports host controller capability registers.
But its mmio '.write' function was missing, which lead to a null
pointer dereference issue. Add a do nothing 'ehci_caps_write'
definition to avoid it; Do nothing because capability registers
are Read Only(RO).
On 03/21/2016 10:42 AM, Fam Zheng wrote:
> On Fri, 03/18 16:03, Paolo Bonzini wrote:
>>
>>
>> On 17/03/2016 17:08, Christian Borntraeger wrote:
>>> Good (or bad?) news is the assert also triggers on F23, it just seems
>>> to take longer.
>>
>> I guess good news, because we can rule out the kernel (
following changes since commit 6741d38ad0f2405a6e999ebc9550801b01aca479:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
(2016-03-17 15:59:42 +)
are available in the git repository at:
git://git.kraxel.org/qemu tags/pull-usb-20160321-1
for yo
My notes on this patch:
* It applies and compiles fine with current qemu on Linux/x86_64 host.
However after building I had to do:
cp pc-bios/optionrom/linuxboot_dma.bin pc-bios/
I wasn't sure if that was supposed to be done automatically.
* It reduces libguestfs appliance boot time by ab
On Mon, 21 Mar 2016 18:57:18 +0800
Fam Zheng wrote:
> diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
> index 08275a9..47f8043 100644
> --- a/hw/virtio/virtio.c
> +++ b/hw/virtio/virtio.c
> @@ -1098,7 +1098,14 @@ void virtio_queue_notify_vq(VirtQueue *vq)
>
> void virtio_queue_notify(VirtI
On 21/03/2016 10:35, Peter Maydell wrote:
> > x86 can actually do 64-bit atomic loads and stores through the FPU, but
> > I'm not sure about other 32-bit targets?
>
> As I say, ppc32 linux is one that can't -- see commit 8a5956ad6392f1155
> for last time this came up.
Yes, I remember that. Loa
On 18/03/2016 19:34, Dr. David Alan Gilbert wrote:
> Can someone pick this tiny patch up that I sent in January:
>
> (adding in qemu-trivial)
Will do.
Paolo
> Dave
Paolo Bonzini writes:
> On 21/03/2016 10:35, Peter Maydell wrote:
>> > x86 can actually do 64-bit atomic loads and stores through the FPU, but
>> > I'm not sure about other 32-bit targets?
>>
>> As I say, ppc32 linux is one that can't -- see commit 8a5956ad6392f1155
>> for last time this came up
Peter Maydell writes:
> On 21 March 2016 at 10:05, Markus Armbruster wrote:
>> Peter Maydell writes:
>>> Also some new clang ubsan warnings on x86 Linux:
>>> GTESTER check-qtest-i386
>>> [deleted existing warnings about slirp code]
>>> /home/petmay01/linaro/qemu-for-merges/hw/pci/pci.c:166:23:
Peter Maydell writes:
[...]
> Also some new clang ubsan warnings on x86 Linux:
> GTESTER check-qtest-i386
> [deleted existing warnings about slirp code]
> /home/petmay01/linaro/qemu-for-merges/hw/pci/pci.c:166:23: runtime
> error: shift exponent -1 is negative
> /home/petmay01/linaro/qemu-for-mer
- 元のメッセージ -
> 差出人: "Eduardo Otubo"
> 宛先: mreza...@redhat.com
> Cc: qemu-devel@nongnu.org, arm...@redhat.com
> 送信済み: 2016年3月11日, 金曜日 午前 9:51:50
> 件名: Re: [Qemu-devel] [PATCH] Whitelist sysinfo call
>
> On Mon, Mar 07, 2016 at 10=34=46AM +0100, mreza...@redhat.com wrote:
> > From: Mirosla
On Mon, 21 Mar 2016 17:42:06 +0800
Fam Zheng wrote:
> On Fri, 03/18 16:03, Paolo Bonzini wrote:
> >
> >
> > On 17/03/2016 17:08, Christian Borntraeger wrote:
> > > Good (or bad?) news is the assert also triggers on F23, it just seems
> > > to take longer.
> >
> > I guess good news, because we can
>From 74b97a070bdadb4343a63c7f214bcda30a0ab37e Mon Sep 17 00:00:00 2001
From: Markus Armbruster
Date: Mon, 21 Mar 2016 13:12:10 +0100
Subject: [PATCH] fixup! ivshmem: Split ivshmem-plain, ivshmem-doorbell off
ivshmem
ivshmem_update_irq() must not touch INTx when the device doesn't use
it. The o
On Mon, 03/21 12:15, Cornelia Huck wrote:
> On Mon, 21 Mar 2016 18:57:18 +0800
> Fam Zheng wrote:
>
> > diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
> > index 08275a9..47f8043 100644
> > --- a/hw/virtio/virtio.c
> > +++ b/hw/virtio/virtio.c
> > @@ -1098,7 +1098,14 @@ void virtio_queue_not
>From 1ab371430a90fb8e0388d1a0e9feb2a8e28f989f Mon Sep 17 00:00:00 2001
From: Markus Armbruster
Date: Mon, 21 Mar 2016 13:33:20 +0100
Subject: [PATCH] fixup! event_notifier: Make event_notifier_init_fd() #ifdef
CONFIG_EVENTFD
---
tests/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion
Hello,
This is a first mini-serie of patches adding support for new ppc SPRs.
They were taken from Ben's larger patchset adding the ppc powernv
platform and they should already be useful for the pseries guest
migration.
Initial patches come from :
https://github.com/ozbenh/qemu/commits/p
From: Benjamin Herrenschmidt
And move the code adjusting the MSR mask and calling kvmppc_set_papr()
to it. This allows us to add a few more things such as disabling setting
of MSR:HV and appropriate LPCR bits which will be used when fixing
the exception model.
Signed-off-by: Benjamin Herrenschmi
From: Benjamin Herrenschmidt
The current set of spr_register_* macros only take the user and
supervisor function pointers. To make the transition easy, we
don't change that but we add "_hv" variants that can be used to
register all 3 sets.
To simplify the transition, users of the "old" macro wil
From: Benjamin Herrenschmidt
Add definitions for additional SPR numbers and SPR bit definitions
that will be relevant for subsequent improvements to POWER8 emulation
Also fix the definition of LPIDR which was incorrect (and is different
for server and embedded).
Signed-off-by: Benjamin Herrensc
From: Benjamin Herrenschmidt
With appropriate AMR-like masks. Not actually used by the translation
logic at that point
Signed-off-by: Benjamin Herrenschmidt
[clg: changed spr_register_hv(SPR_IAMR) to spr_register_kvm_hv(SPR_IAMR)
changed gen_spr_amr() prototype ]
Signed-off-by: Cédric Le
From: Benjamin Herrenschmidt
Signed-off-by: Benjamin Herrenschmidt
[clg: squashed in patch 'ppc: Add dummy ACOP SPR' ]
Signed-off-by: Cédric Le Goater
Reviewed-by: Thomas Huth
Reviewed-by: David Gibson
---
target-ppc/cpu.h| 3 +++
target-ppc/translate_init.c | 12
2
From: Benjamin Herrenschmidt
Make sure we give the guest full authorization
Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: Thomas Huth
Reviewed-by: David Gibson
---
target-ppc/translate_init.c |4
1 file changed, 4 insertions(+)
Index: qemu-dgibson-for-2.6.git/target-ppc/transl
From: Benjamin Herrenschmidt
It's supposed to be an instruction counter. For now make us not
crash when accessing it.
Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: Thomas Huth
Reviewed-by: David Gibson
---
This is required for patch "ppc: A couple more dummy POWER8 Book4 regs"
target
From: Benjamin Herrenschmidt
We don't give them a KVM reg number to most of the registers yet as no
current KVM version supports HV mode. For DAWR and DAWRX, the KVM reg
number is needed since this register can be set by the guest via the
H_SET_MODE hypercall.
Signed-off-by: Benjamin Herrenschmi
From: Benjamin Herrenschmidt
The masks weren't chosen nor applied properly. The architecture specifies
that writes to AMR are masked by UAMOR for PR=1, otherwise AMOR for HV=0.
The writes to UAMOR are masked by AMOR for HV=0
Signed-off-by: Benjamin Herrenschmidt
[clg: moved gen_spr_amr() proto
From: Benjamin Herrenschmidt
We should implement HW breakpoint/watchpoint, qemu supports them...
Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: Thomas Huth
Reviewed-by: David Gibson
---
target-ppc/cpu.h| 1 +
target-ppc/translate_init.c | 5 +
2 files changed, 6 insertion
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