On 07/17/2015 02:42 PM, Aurelien Jarno wrote:
On 2015-07-17 12:23, Aurelien Jarno wrote:
On 2015-07-16 22:29, Richard Henderson wrote:
On 07/15/2015 09:54 PM, Aurelien Jarno wrote:
While I understand why we need the new trunc_shr_i32 opcode for MIPS64
(the 32-bit values must be kept sign-exten
On 07/17/2015 11:33 AM, Aurelien Jarno wrote:
For now I do wonder if we shouldn't get the size changing extu/exts
mandatory instead of reusing the 64-bit only version. This doesn't
change the generated code, at least on x86.
I'd be surprised if it did anywhere. I don't mind starting with them
Enforce the invariant that 32-bit quantities are zero extended
in the register. This avoids having to re-zero-extend at memory
accesses for 32-bit guests.
Signed-off-by: Richard Henderson
---
Here's an alternative to the other things we've been considering.
We could even make this conditional on
Type fprintf_function which fits here was defined with this attribute.
Signed-off-by: Stefan Weil
---
This is an optional trivial patch for 2.4 which fixes compiler warnings
in my build environment (with -Wextra).
disas/arm-a64.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
On 18 July 2015 at 04:55, Peter Crosthwaite
wrote:
> On Thu, Jul 16, 2015 at 1:11 PM, Peter Maydell
> wrote:
>> For ARM we have a little minimalist bootloader in hw/arm/boot.c which
>> takes the place of firmware if we're directly booting a Linux kernel.
>> Unfortunately a few devices need speci
On 18 July 2015 at 07:00, Peter Crosthwaite wrote:
> Replace the hw_error for no-EL2 VIRQ with a LOG_UNIMP. This is more
> accurate and handles the corner case where the user defeatures EL2
> using overrides in a system that would otherwise have EL2
> connectivity.
>
> Signed-off-by: Peter Crosthw
On 18 July 2015 at 07:00, Peter Crosthwaite wrote:
> All of these hw_errors are fatal and indicate something wrong with
> QEMU implementation.
>
> Convert to g_assert_not_reached.
>
> Signed-off-by: Peter Crosthwaite
> ---
> Dropped the error messages as they are not hugely useful outside of
> a
On 18 July 2015 at 07:25, Peter Crosthwaite wrote:
> Every arch adds its disas configury to both its own config as well
> config_disas_all. Make a small function do to both at once.
>
> Signed-off-by: Peter Crosthwaite
> ---
> Prepares support for multi-arch where the disas configury for
> multi-
On 18 July 2015 at 09:27, Stefan Weil wrote:
> Type fprintf_function which fits here was defined with this attribute.
>
> Signed-off-by: Stefan Weil
> ---
>
> This is an optional trivial patch for 2.4 which fixes compiler warnings
> in my build environment (with -Wextra).
Reviewed-by: Peter Mayd
The goal is to split the functions such that cpu-exec is CPU specific
content, while cpus-exec-common.c is generic code only. The function
interface to cpu-exec needs to be virtualised to prepare support for
multi-arch and moving these definitions out saves bloating the QOM
interface. So move these
Move the size and mask globals for the "real" host page size to
translate-common. This is to allow system-level code to use
REAL_HOST_PAGE_ALIGN and friends in builds which hide translate-all
behind arch-obj.
Signed-off-by: Peter Crosthwaite
---
translate-all.c| 2 --
translate-common.c | 3
Hi All,
This is target-multi, a system-mode build that can support multiple
cpu-types.
Two architectures are initially converted. Microblaze and ARM. Step
by step conversion in done for each. A microblaze is added to
Xilinx Zynq platform as a test case. This will be elaborted more in
future spins
tcg_op_defs (and the _max) are both needed by the TCI disassembler. For
multi-arch, tcg.c will be multiple-compiled (arch-obj) with its symbols
hidden from common code. So split the definition off to new file,
tcg-common.c which will remain a regular obj-y for use by both the TCI
disas as well as t
Move this function to common code. It has no arch specific
dependencies. Prepares support for multi-arch where the translate-all
interface needs to be virtualised. One less thing to virtualise.
Reviewed-by: Richard Henderson
Signed-off-by: Peter Crosthwaite
---
translate-all.c| 30 -
Add an interface for TCG engines to register their tcg_enabled()
function for addition to a global list. Each TCG engine will
register and then two functions, tcg_any_enabled() & tcg_all_enabled()
can be used to query the overall tcg enablement state.
Signed-off-by: Peter Crosthwaite
---
include
Create a global list of tcg_exec_init() functions that is populated at
startup. Multiple translation engines can register an init function
and all will be called on the master call to tcg_exec_init().
Introduce a new module, translate-common. This is a common-obj for
translation functionality such
This function has no architecture specific dependencies and should be
callable from core code. Move it to qom/cpu.h.
Reviewed-by: Richard Henderson
Signed-off-by: Peter Crosthwaite
---
include/exec/exec-all.h | 21 -
include/qom/cpu.h | 21 +
2 file
Move the architecture agnostic function prototypes for exec.c out of
cputlb.h to exec-all.h. This allows hiding of the arch specific
cputlb.h from exec.c which should be getting close to having no
architecture specifics. Prepares support for multi-arch, which will have
a minimal cpu.h that services
Multiple multi-arch targets may wish to implement cpu_list(). When the
command is called each should be called one after other. Create a list
to allow registrations. When cpu_list() is called the list is iterated
calling all implementors.
The original singleton #define'able cpu_list() mechanism re
To prepare for multi-arch, cputlb should only have awareness of one
single architecture. This means it should not have access to the full
CPU lists which may be heterogeneous. Instead, push the CPU_LOOP() up
to the one and only caller in exec.c.
Signed-off-by: Peter Crosthwaite
---
Easier reading
This header is non-needed anymore and wont work in multi-arch where
this service is not provided to core code.
Signed-off-by: Peter Crosthwaite
---
monitor.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/monitor.c b/monitor.c
index aeea2b5..f283035 100644
--- a/monitor.c
+++ b/monitor.c
@@
From: Peter Crosthwaite
Device land code that needs cpu.h only needs it for architecture
specific reasons. So include target-arm/cpu.h explicitly rather than
the one provided by common code.
This prepares support for multi-arch where the common cpu.h will be
minimal and not contain any arch spec
Create the multi-softmmu build target. The multi-arch build will be
a combination of all softmmu targets that are:
1: also configured for build (as --target-list items)
2: support multi-arch
target-multi will define TARGET_FOO for each supported target. This is
to allow access to these defs from
This requires global visibility to common code. Move to tcg-common.
Signed-off-by: Peter Crosthwaite
---
tcg/tcg-common.c | 2 ++
tci.c| 6 --
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/tcg/tcg-common.c b/tcg/tcg-common.c
index 8a848d0..c380533 100644
--- a/tc
Convert core code usages of tcg_enabled() which don't have a specific
CPU associated with, to either tcg_any_enabled() or tcg_all_enabled().
This is to prepare support for multiple tcg engines, where queries must
query a specific CPU or use global any/all logic.
Signed-off-by: Peter Crosthwaite
-
Multi-arch conversion consisting of:
* Compiling out all target-arm private contents of cpu.h when doing
multi-arch build
* Defining the QOM cpu hooks
* move cp.c to hw subdir for system-level visibility
* Add aarch64 to multi-support list
Signed-off-by: Peter Crosthwaite
---
I guess I cou
Change tlb_set_dirty() to accept a CPU instead of an env pointer. This
allows for removal of another CPUArchState usage from prototypes that
need to be QOMified.
Signed-off-by: Peter Crosthwaite
---
cputlb.c | 3 ++-
exec.c| 3 +--
include/exec/cputlb.h | 2 +-
3 fil
Pre-undefine all symbols that cpu.h defines for the sake of core code.
This is to allow inclusion of multiple cpu.h's from system level code
implementing multi-arch machines.
Signed-off-by: Peter Crosthwaite
---
Such system level code cannot validly use these symbols as they are
ambiguous. So we
Add a new *obj- category, arch-obj. arch-obj-y will be a subset of the
existing obj-y. The difference, is arch-obj components are usable by
multi-arch builds. That is, following the single-arch target builds, the
already-built arch_obj components for multiple targets can be linked
together to form
From: Peter Crosthwaite
The only generic code relying on this is linux-user. Linux user already
has a lot of #ifdef TARGET_ customisation so just define ELF_MACHINE
locally there.
The armv7m bootloader can just pass EM_ARM directly, as that
is architecture specific code.
This remove another arc
In system mode emulation (at least) this definition has no architecture
specific dependencies. Move it to common code such that common code can
use it (primarily for defining function prototypes).
Signed-off-by: Peter Crosthwaite
---
So this is the same as in RFCv2 and the comment there was that
From: Peter Crosthwaite
The only generic code relying on this is linux-user. Linux user already
has a lot of #ifdef TARGET_ customisation so just define ELF_MACHINE
locally there.
The microblaze bootloader can just pass EM_MICROBLAZE directly, as that
is architecture specific code.
This remove
The core code interfaces to translate-all, cpu-tlb and cpu-exec are
virtualised. This prepare support for multi-arch where these modules
are multi-compiled for the different target backends and will need
to co-exist.
The names of functions are not changed. They still have their generic
names and c
This is currently provided by cpu-defs and is a target specific
definition. However, to prepare for multi-arch only the bare minimum
content from cpu-defs.h should be exported to core code. And this is
all we need. So split it to a new header that the target_multi cpu.h
can include to save on havin
From: Peter Crosthwaite
Multi-arch platforms may wish to use the ARM bootloader. Don't assert
that all CPUs in the CPU list are ARM.
Signed-off-by: Peter Crosthwaite
---
hw/arm/boot.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
inde
Move this implementation up to the header so it is visible from system
level code once the architecture is converted to arch-obj-y. Alternative
would be to create init.c in target-arm/hw but this implementation is
trivial enough for static inline.
Signed-off-by: Peter Crosthwaite
---
target-arm/
Allow subsequent inclusion of cpu-defs.h. This allows including
multiple cpu.h's and each getting the right set of definitions for
its env structure definition. All defined symbols are undeffed and
redeffed to the new values.
CPUTLBEntry and CPUIOTLBEntry are defined as types so each needs some
sp
Move the ARM coprocessor API to a new C file. helper.c is huge and
splitting off this self contained piece increases modularity.
Signed-off-by: Peter Crosthwaite
---
I also need this for multi-arch where, this file needs to remain obj-y
while the others in target-arm are converted to arch-obj-y.
This function needs to be converted to QOM hook and virtualised for
multi-arch. This rename interferes, as cpu-qom will not have access
to the renaming causing name divergence. This rename doesn't really do
anything anyway so just delete it.
Signed-off-by: Peter Crosthwaite
---
include/exec/cpu-
Register ARMs cpu_list() fn using the new cpu_list registration API.
This prepares support for multi-arch where, #define cpu_list is not
possible.
Signed-off-by: Peter Crosthwaite
---
target-arm/cpu.h| 2 --
target-arm/helper.c | 5 -
2 files changed, 4 insertions(+), 3 deletions(-)
dif
Multi-arch conversion consisting of:
* Compiling out all target-microblaze private contents of cpu.h
when doing multi-arch build
* Defining the QOM cpu hooks
* Add microblazeel to multi-support list
Signed-off-by: Peter Crosthwaite
---
I guess I could split to multi patches but it will bloa
From: Peter Crosthwaite
Device land code that needs cpu.h only needs it for architecture
specific reasons. So include target-microblaze/cpu.h explicitly rather
than the just the one provided by common code.
This prepares support for multi-arch where the common cpu.h will be
minimal and not conta
From: Peter Crosthwaite
Linux kernel booting is not yet defined for multi-arch and Microblaze's
DTB loader sometimes gets in the way of elfs. Just disable it for
multi-arch.
Signed-off-by: Peter Crosthwaite
---
hw/microblaze/boot.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/mic
From: Peter Crosthwaite
Assume that when using MULTI arch, the -firmware switch dictates the
software to load on microblaze. A hack until we get generic bootloading
working.
Signed-off-by: Peter Crosthwaite
---
hw/microblaze/boot.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/mic
On 18/07/2015 11:40, Peter Crosthwaite wrote:
> +/* target_ulong is the type of a virtual address */
> +#if TARGET_LONG_SIZE == 4
> +#define target_long int32_t
> +#define target_ulong uint32_t
> +#define TARGET_FMT_lx "%08x"
> +#define TARGET_FMT_ld "%d"
> +#define TARGET_FMT_lu "%u"
> +#elif TA
On 18/07/2015 11:40, Peter Crosthwaite wrote:
> -)
>
> diff --git a/Makefile.target b/Makefile.target
> index 6186f03..31eda57 100644
> --- a/Makefile.target
> +++ b/Makefile.target
> @@ -13,6 +13,12 @@ QEMU_CFLAGS += -I../linux-headers
> endif
> QEMU_CFLAGS += -I.. -I$(SRC_PATH)/target-$(TARG
On 18/07/2015 11:40, Peter Crosthwaite wrote:
> diff --git a/target-arm/cp.c b/target-arm/cp.c
> new file mode 100644
> index 000..39a15ee
> --- /dev/null
> +++ b/target-arm/cp.c
> @@ -0,0 +1,328 @@
> +#include "qemu-common.h"
> +#include "../cpu.h"
> +
Shouldn't this still be "cpu.h" at thi
On 18/07/2015 11:40, Peter Crosthwaite wrote:
> target-foo is converted to arch-obj. But some CPUs may still need to
> export APIs to device land (hw/). An example of this is the ARM
> co-processor register interface. Such fns can be split off to new C
> files in target-foo/hw dir where they rema
On 18/07/2015 11:40, Peter Crosthwaite wrote:
> Multi-arch conversion consisting of:
> * Compiling out all target-arm private contents of cpu.h when doing
>multi-arch build
> * Defining the QOM cpu hooks
> * move cp.c to hw subdir for system-level visibility
> * Add aarch64 to multi-suppo
On 18/07/2015 11:40, Peter Crosthwaite wrote:
> From: Peter Crosthwaite
>
> The only generic code relying on this is linux-user. Linux user already
> has a lot of #ifdef TARGET_ customisation so just define ELF_MACHINE
> locally there.
>
> The armv7m bootloader can just pass EM_ARM directly, a
On 18/07/2015 11:40, Peter Crosthwaite wrote:
> Multi-arch conversion consisting of:
> * Compiling out all target-microblaze private contents of cpu.h
>when doing multi-arch build
> * Defining the QOM cpu hooks
> * Add microblazeel to multi-support list
>
> Signed-off-by: Peter Crosthwait
On 18/07/2015 14:16, Paolo Bonzini wrote:
>> > +/* target_ulong is the type of a virtual address */
>> > +#if TARGET_LONG_SIZE == 4
>> > +#define target_long int32_t
>> > +#define target_ulong uint32_t
>> > +#define TARGET_FMT_lx "%08x"
>> > +#define TARGET_FMT_ld "%d"
>> > +#define TARGET_FMT_lu
On 18/07/2015 11:40, Peter Crosthwaite wrote:
> The goal is to split the functions such that cpu-exec is CPU specific
> content, while cpus-exec-common.c is generic code only. The function
> interface to cpu-exec needs to be virtualised to prepare support for
> multi-arch and moving these definit
On 18/07/2015 11:40, Peter Crosthwaite wrote:
> Hi All,
>
> This is target-multi, a system-mode build that can support multiple
> cpu-types.
Hi Peter,
I commented on a few patches, but overall looks great.
Paolo
> > Do you know the size of the ram_addr_t space from
> > VHOST_USER_SET_MEM_TABLE's user address and size fields?
>
> For some reason, vhost_get_log_size() also takes pc-bios region. I
> think it's quite unnecessary given that the backend will not have
> access to this region.
That's by design.
We want to have uniform build messages, so fix some messages
which did not follow the standard pattern.
Signed-off-by: Stefan Weil
---
This is an optional trivial patch for 2.4.
Makefile | 2 +-
tests/Makefile | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/Makef
They need QTEST_QEMU_IMG. Without it, the tests raise an assertion:
$ make -C bin check-report-qtest-i386.xml
make: Entering directory 'bin'
GTESTER check-report-qtest-i386.xml
blkdebug: Suspended request 'A'
blkdebug: Resuming request 'A'
ahci-test: tests/libqos/libqos.c:162:
mkimg: Assertion `q
On Sat, Jul 18, 2015 at 01:47:34AM +1000, Alexey Kardashevskiy wrote:
> On 07/17/2015 11:39 PM, David Gibson wrote:
> >On Fri, Jul 17, 2015 at 05:13:37PM +1000, Alexey Kardashevskiy wrote:
> >>On 07/16/2015 03:11 PM, David Gibson wrote:
> >>>On Tue, Jul 14, 2015 at 10:21:54PM +1000, Alexey Kardashe
On Fri, Jul 17, 2015 at 12:25:31PM -0600, Alex Williamson wrote:
> On Fri, 2015-07-17 at 15:20 +1000, David Gibson wrote:
> > On Thu, Jul 16, 2015 at 08:44:59AM -0600, Alex Williamson wrote:
> > > On Thu, 2015-07-16 at 15:11 +1000, David Gibson wrote:
> > > > On Tue, Jul 14, 2015 at 10:21:54PM +100
On Sat, Jul 18, 2015 at 5:37 AM, Paolo Bonzini wrote:
>
>
> On 18/07/2015 14:16, Paolo Bonzini wrote:
>>> > +/* target_ulong is the type of a virtual address */
>>> > +#if TARGET_LONG_SIZE == 4
>>> > +#define target_long int32_t
>>> > +#define target_ulong uint32_t
>>> > +#define TARGET_FMT_lx "%0
On Sat, Jul 18, 2015 at 5:44 AM, Paolo Bonzini wrote:
>
>
> On 18/07/2015 11:40, Peter Crosthwaite wrote:
>> Hi All,
>>
>> This is target-multi, a system-mode build that can support multiple
>> cpu-types.
>
> Hi Peter,
>
> I commented on a few patches, but overall looks great.
>
Thanks,
Ill let
On 18/07/2015 17:37, Peter Crosthwaite wrote:
> > > Would it be possible, or make sense, to do
> > >
> > > #define target_long arm_target_long
> > > #define target_ulong arm_target_ulong
> > >
> > > instead? This makes prototypes nicer when printed in the debugger with
> > > ptype. Where could
*** This bug is a duplicate of bug 1346917 ***
https://bugs.launchpad.net/bugs/1346917
Same issue there. 2 VMs with 2008 sp2 x86, and 2008 R2 sp1 x64 hanging
simultaneously with BSOD stop 0x005c (0x010b 0x0003 0x)
Issue arrised after upgrading kernel from 3.12 to 3.13.
Not
On Sat, Jul 18, 2015 at 5:35 AM, Paolo Bonzini wrote:
>
>
> On 18/07/2015 11:40, Peter Crosthwaite wrote:
>> Multi-arch conversion consisting of:
>> * Compiling out all target-microblaze private contents of cpu.h
>>when doing multi-arch build
>> * Defining the QOM cpu hooks
>> * Add microbl
The change from v2 is very small, notify_me is decremented as soon
as ppoll returns.
Paolo
v1->v2
Split some changes to the tests to a separate patch
Fix commit message [Laszlo]
Clarify do...while loop in aio-win32.c [Kevin]
v2->v3
Decrement notify_me a little ear
Preparatory bugfixes and tweaks to the loop before the next patch:
- disable dispatch optimization during aio_prepare. This fixes a bug.
- do not modify "blocking" until after the first WaitForMultipleObjects
call. This is needed in the next patch.
- change the loop to do...while. This makes
This patch rewrites the ctx->dispatching optimization, which was the cause
of some mysterious hangs that could be reproduced on aarch64 KVM only.
The hangs were indirectly caused by aio_poll() and in particular by
flash memory updates's call to blk_write(), which invokes aio_poll().
Fun stuff: they
In these tests, the purpose of the initial calls to aio_poll and
g_main_context_iteration is simply to put the AioContext in a
known state; the return value of the function does not really
matter. The next patch will change those return values; change
the assertions to a while loop which expresses
It is pretty rare for aio_notify to actually set the EventNotifier. It
can happen with worker threads such as thread-pool.c's, but otherwise it
should never be set thanks to the ctx->notify_me optimization. The
previous patch, unfortunately, added an unconditional call to
event_notifier_test_and_
This series fixes the remaining case where aio_poll() could hang
I/O on the main thread due to a missing wakeup. It consists of
a bugfix and an optimization, both of which have survived hundreds
of tests on aarch64.
Both the bugfix and the optimization come with a formal model of the
interactions
event_notifier_test_and_clear must be called before processing events.
Otherwise, an aio_poll could "eat" the notification before the main
I/O thread invokes ppoll(). The main I/O thread then never wakes up.
This is an example of what could happen:
i/o thread vcpu thread
On 2015-07-18 08:58, Richard Henderson wrote:
> Enforce the invariant that 32-bit quantities are zero extended
> in the register. This avoids having to re-zero-extend at memory
> accesses for 32-bit guests.
>
> Signed-off-by: Richard Henderson
> ---
> Here's an alternative to the other things we
On 2015-07-18 08:21, Richard Henderson wrote:
> On 07/17/2015 02:42 PM, Aurelien Jarno wrote:
> >On 2015-07-17 12:23, Aurelien Jarno wrote:
> >>On 2015-07-16 22:29, Richard Henderson wrote:
> >>>On 07/15/2015 09:54 PM, Aurelien Jarno wrote:
> While I understand why we need the new trunc_shr_i32
On 2015-07-18 08:24, Richard Henderson wrote:
> On 07/17/2015 11:33 AM, Aurelien Jarno wrote:
> >For now I do wonder if we shouldn't get the size changing extu/exts
> >mandatory instead of reusing the 64-bit only version. This doesn't
> >change the generated code, at least on x86.
>
> I'd be surpr
atapi: ATAPI-SCSI bridge device created
private SCSI bus added to bridge
ATAPI inquiry command can use a bridge
---
hw/ide/atapi.c | 36 +--
hw/ide/core.c | 207 +++
hw/ide/internal.h | 257 +--
Hello,
On x86 one can get the current PGD from CR3. What's the right way to
do this on ARM?
In a code based on an old QEMU version, I see the following:
pgd = env->cp15.c2_base0 & env->cp15.c2_base_mask;
But in the recent QEMU version c2_base0 field is absent. Instead,
there's ttbr0[] array. So s
On 18 July 2015 at 20:30, Igor R wrote:
> Hello,
>
> On x86 one can get the current PGD from CR3. What's the right way to
> do this on ARM?
What's a PGD ?
> In a code based on an old QEMU version, I see the following:
> pgd = env->cp15.c2_base0 & env->cp15.c2_base_mask;
We renamed those, both t
We rework the way the MMU indices are calculated, providing separate
indices for I and D side based on MSR:IR and MSR:DR respectively,
and thus no longer need to flush the TLB on context changes. This also
adds correct support for HV as a separate address space.
Signed-off-by: Benjamin Herrenschmi
We don't use the resulting accessors and this gets in the way of
the split I/D TLB work.
Signed-off-by: Benjamin Herrenschmidt
---
target-ppc/cpu.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 6f76674..5dfd195 100644
--- a/target-ppc/cpu.h
+++ b
This is set to true when the index is for an instruction fetch
translation.
The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS
acessors.
All targets ignore it for now, and all other callers pass "false".
This will allow targets who which to split the mmu index between
instructi
On ppc64 especially, we flush the tlb on any slbie or tlbie instruction.
However, those instructions often come in bursts of 3 or more (context
switch will favor a series of slbie's for example to an slbia if the
SLB has less than a certain number of entries in it, and tlbie's can
happen in a seri
From: "Carlos L. Torres"
Introduce qemu_ wrappers for strtol/strtoul/strtoll/strtoull
C functions, ensure that errno is checked, and if NULL is
passed as the endptr argument, then whole string has to be
a valid number on the given base, otherwise return appropriate
error.
Different from the C st
From: "Carlos L. Torres"
Signed-off-by: Carlos L. Torres
---
qmp.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/qmp.c b/qmp.c
index 403805a..837cb3f 100644
--- a/qmp.c
+++ b/qmp.c
@@ -49,14 +49,27 @@ VersionInfo *qmp_query_version(Error **errp)
{
From: "Carlos L. Torres"
Add wrapper for strtol() function. Include unit tests.
Signed-off-by: Carlos L. Torres
---
include/qemu-common.h | 2 +
tests/test-cutils.c | 319 ++
util/cutils.c | 58 +
3 files changed, 379 inserti
From: "Carlos L. Torres"
Add wrapper for strtoul() function. Include unit tests.
Signed-off-by: Carlos L. Torres
---
include/qemu-common.h | 2 +
tests/test-cutils.c | 318 ++
util/cutils.c | 32 +
3 files changed, 352 insertions
From: "Carlos L. Torres"
Add wrapper for strtoll() function. Include unit tests.
Signed-off-by: Carlos L. Torres
---
include/qemu-common.h | 2 +
tests/test-cutils.c | 320 ++
util/cutils.c | 23
3 files changed, 345 insertions(
From: "Carlos L. Torres"
Add wrapper for strtoull() function. Include unit tests.
Signed-off-by: Carlos L. Torres
---
include/qemu-common.h | 2 +
tests/test-cutils.c | 323 ++
util/cutils.c | 23
3 files changed, 348 insertions
>> On x86 one can get the current PGD from CR3. What's the right way to
>> do this on ARM?
>
> What's a PGD ?
Page global directory
> However just looking at base & mask is not necessarily
> correct -- depending on the configuration of the CPU we
> might be using translation table base control r
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