Originally the endi PVR bits were manually set for each machine. This
is a hassle and difficult to read, instead set them based on the CPU
properties.
Signed-off-by: Alistair Francis
---
hw/microblaze/petalogix_ml605_mmu.c |2 +-
target-microblaze/cpu-qom.h |1 +
target-microblaz
Originally the version_mask PVR bits were manually set for each
machine. This is a hassle and difficult to read, instead set them
based on the CPU properties.
Signed-off-by: Alistair Francis
---
hw/microblaze/petalogix_ml605_mmu.c |3 ++-
target-microblaze/cpu-qom.h |1 +
target-
Originally the pvr-full PVR bits were manually set for each machine. This
is a hassle and difficult to read, instead set them based on the CPU
properties.
Signed-off-by: Alistair Francis
---
target-microblaze/cpu-qom.h |1 +
target-microblaze/cpu.c |7 ---
target-microblaze/helpe
Move the hard coded register values to the init function.
This also allows the entire reset function to be deleted, as
PVR registers are now preserved on reset.
Signed-off-by: Alistair Francis
---
hw/microblaze/petalogix_ml605_mmu.c | 19 +++
1 files changed, 7 insertions(+), 1
On Wed, May 27, 2015 at 5:37 PM, Alistair Francis
wrote:
> Previously the stream_running() function didn't check
> if the DMA was halted. This caused hangs in recent versions
> of MicroBlaze u-boot. Correct stream_running() to check
> DMASR_HALTED as well as DMACR_RUNSTOP.
>
> Signed-off-by: Alist
On 03/06/2015 08:51, Sandhya Kumar wrote:
> As per my understanding (which matches versions prior to this commit),
> we generally maintain only two TLBs [one for kernel and one for user] in
> x86 ISA for caching address translations. With this commit we seem to
> have three modes of MMU, although
Remove the hardcoded values from the machine specific reset
function, as the same values are already set in the standard
MicroBlaze reset.
This also allows the entire reset function to be deleted, as
PVR registers are now preserved on reset.
Signed-off-by: Alistair Francis
---
hw/microblaze/pet
This code is already being run in the mb_cpu_realizefn()
function. As PVR registers are preserved on reset this
code is not required.
Signed-off-by: Alistair Francis
---
target-microblaze/cpu.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/target-microblaze/cpu.c b/
On 03/06/2015 06:30, Richard Henderson wrote:
> On 05/21/2015 06:19 AM, Paolo Bonzini wrote:
>> memcpy is faster than struct assignment, which copies each bitfield
>> individually. Arguably a compiler bug, but memcpy is super-special
>> cased anyway so what could go wrong?
>
> The compiler has
Stefan Berger wrote:
> Prevent the function tpm_tis_get_tpm_version() from being called
> if not TPM support is requested.
>
> Signed-off-by: Stefan Berger
> ---
> include/sysemu/tpm.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/sysemu/tpm.h b/include/sysemu/tpm.h
> index
On 2015-06-02 19:01, Christopher Covington wrote:
> Hi Aurelien,
>
> On 06/01/2015 05:29 PM, Aurelien Jarno wrote:
> > Use the bit number for SR constants instead of using a bit mask. This
> > make possible to also use the constants for shifts.
> >
> > Reviewed-by: Richard Henderson
> > Signed-o
"Jason J. Herne" wrote:
> Provide a method to throttle guest cpu execution. CPUState is augmented with
> timeout controls and throttle start/stop functions. To throttle the guest cpu
> the caller simply has to call the throttle start function and provide a ratio
> of
> sleep time to normal execut
On Tue, 06/02 11:28, Eric Blake wrote:
> On 05/27/2015 11:29 PM, Fam Zheng wrote:
> > If specified as "true", it allows discarding on target sectors where source
> > is
> > not allocated.
> >
> > Signed-off-by: Fam Zheng
> > ---
>
> > +++ b/qapi/block-core.json
> > @@ -954,6 +954,11 @@
> > # @
"Jason J. Herne" wrote:
> Remove traditional auto-converge static 30ms throttling code and replace it
> with a dynamic throttling algorithm.
>
> Additionally, be more aggressive when deciding when to start throttling.
> Previously we waited until four unproductive memory passes. Now we begin
> thr
"Jason J. Herne" wrote:
> On 06/02/2015 09:58 AM, Dr. David Alan Gilbert wrote:
>> * Jason J. Herne (jjhe...@linux.vnet.ibm.com) wrote:
>>> On 06/01/2015 11:32 AM, Dr. David Alan Gilbert wrote:
* Jason J. Herne (jjhe...@linux.vnet.ibm.com) wrote:
> Remove traditional auto-converge static
"Daniel P. Berrange" writes:
> On Tue, Jun 02, 2015 at 04:34:09PM +0200, Kevin Wolf wrote:
>> Am 02.06.2015 um 14:56 hat Daniel P. Berrange geschrieben:
>> > So I'm wondering if there is a long term vision / desire for translation
>> > in QEMU or not ?
I'm not aware of any plans, just idle talk
On Tue, 06/02 17:21, Stefan Hajnoczi wrote:
> On Tue, May 19, 2015 at 10:51:03AM +, Fam Zheng wrote:
> > -while (qemu_can_send_packet(&s->nc)) {
> > +while (true) {
> > +bool can_send;
> > uint8_t *buf = s->buf;
> >
> > +can_send = qemu_can_send_packet(&s->nc)
On 02.06.2015 16:28, Peter Maydell wrote:
> On 2 June 2015 at 14:18, Peter Maydell wrote:
>> NB: a bug that's been on my todo list for ages is that the comment
>> is incorrect about the wildcard being unnecessary -- this was a
>> misreading of the ARM ARM by me when I wrote that code. v8 *does*
>>
Thanks for your mail. Are these TLB modes logic specific to QEMU
implementation for x86?
Asking this as I am not able to get any information about seperate TLBs
from Intel developer manuals
On Wed, Jun 3, 2015 at 3:01 PM, Paolo Bonzini wrote:
>
>
> On 03/06/2015 08:51, Sandhya Kumar wrote:
> >
On 02.06.2015 16:54, Peter Maydell wrote:
> On 2 June 2015 at 13:21, Sergey Fedorov wrote:
>> According to ARM Cortex-A57 TRM, REVIDR reset value should be zero. So
>> let REVIDR reset value be specified by CPU model and fix it for
>> Cortex-A57.
>>
>> Signed-off-by: Sergey Fedorov
>> --
> Do you
> On 03 Jun 2015, at 09:57, Alistair Francis wrote:
>
>
> ... Do you have the tests you are using available anywhere?
>
> ... It'd be great to have more tests to run on the machine.
I use projects generated by the GNU ARM Eclipse C/C++ wizards. The "Hello World
ARM Cortex-M" template can gen
"Daniel P. Berrange" writes:
> The default emacs setup indents by 2 spaces and uses tabs
> which is counter to the QEMU coding style rules. Adding a
> .dir-locals.el file in the top level of the GIT repo will
> inform emacs about the QEMU coding style, and so assist
> contributors in avoiding com
"Jason J. Herne" wrote:
> Provide a method to throttle guest cpu execution. CPUState is augmented with
> timeout controls and throttle start/stop functions. To throttle the guest cpu
> the caller simply has to call the throttle start function and provide a ratio
> of
> sleep time to normal execut
Hi,
thanks for your point, I did not notice the problem of the lost of ARP
announce by discarding the message.
So I must rewrite my patch to define a queue to transmit the ARP announce
to the guest. Is it the proper solution?
Thanks.
Best regards.
Thibaut.
On Tue, Jun 2, 2015 at 12:34 PM, Stef
On 03/06/2015 09:41, Sandhya Kumar wrote:
> Thanks for your mail. Are these TLB modes logic specific to QEMU
> implementation for x86?
Yes, they are specific to QEMU.
> Asking this as I am not able to get any information about seperate TLBs
> from Intel developer manuals
Real hardware TLBs p
Thanks again. One more question.
On versions prior to the mentioned commit, is there any specific reason (in
x86 source code of QEMU) to choose separate modes for address translations
(of kernel and user mode)? Or was that done just for performance
improvement?
On Wed, Jun 3, 2015 at 3:58 PM, P
On 03/06/2015 10:07, Sandhya Kumar wrote:
> Thanks again. One more question.
>
> On versions prior to the mentioned commit, is there any specific reason
> (in x86 source code of QEMU) to choose separate modes for address
> translations (of kernel and user mode)? Or was that done just for
> perfo
On Fri, 29 May 2015 21:27:19 +0200
Paolo Bonzini wrote:
>
>
> On 29/05/2015 20:04, Eduardo Habkost wrote:
> > static int apic_no;
> > -static bool mmio_registered;
> > +CPUState *cpu = CPU(s->cpu);
> > +MemoryRegion *root;
> >
> > if (apic_no >= MAX_APICS) {
> >
On 03/06/2015 10:29, Igor Mammedov wrote:
>>> > > +root = address_space_root_memory_region(cpu->as);
>> >
>> > I think just using cpu->as->root is okay.
>> >
>>> > > +memory_region_add_subregion_overlap(root,
>>> > > +s->apicbase &
>>> > > MSR_IA
On 02/06/2015 09:11, Gerd Hoffmann wrote:
> Accessing fw_cfg after migration is fine. Problem is this ...
>
> (1) read directory
> (2) migrate
> (3) read file
>
> ... in case the file ordering happens to be different on the destination
> host due to initialization order changes.
>
> So,
This patch series combines two changes:
* use correct REVIDR reset value for Cortex-A53/A57
* add missing MIDR AArch32 aliases
Sergey Fedorov (2):
target-arm: Fix REVIDR reset value
target-arm: Add AArch32 MIDR aliases in ARMv8
target-arm/cpu-qom.h | 1 +
target-arm/cpu64.c | 2 ++
tar
According to ARM Cortex-A53/A57 TRM, REVIDR reset value should be zero. So let
REVIDR reset value be specified by CPU model and correct it for Cortex-A53/A57.
Signed-off-by: Sergey Fedorov
---
target-arm/cpu-qom.h | 1 +
target-arm/cpu64.c | 2 ++
target-arm/helper.c | 5 ++---
3 files change
According to ARMv8 ARM, there are additional aliases to MIDR system register in
AArch32 state. So add them to the list.
Signed-off-by: Sergey Fedorov
---
target-arm/helper.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
i
It makes sense that extra-cflags should be appended after the normal
CFLAGS so they don't get overridden by default behaviour. This way if
you specify something like:
./configure --extra-cflags="-O0"
You will see the requested behaviour.
Signed-off-by: Alex Bennée
---
configure | 2 +-
1 fil
Paolo Bonzini writes:
> On 02/06/2015 10:01, Alex Bennée wrote:
>>
>> Michael Tokarev writes:
>>
>>> 29.05.2015 19:29, Paolo Bonzini wrote:
On 29/05/2015 16:14, Alex Bennée wrote:
> You mean just do:
>
> diff --git a/configure b/configure
> index b707429..f13831a 100755
>
John Snow wrote:
> On 05/20/2015 11:58 AM, Eric Blake wrote:
>> On 05/20/2015 09:35 AM, Juan Quintela wrote:
>>> We assign the MIGRATION_STATUS_SETUP status in two places. Just
>>> in sucession. Just remove the second one.
>>
>> s/sucession/succession/
>>
>
> Also s/assignement/assignment/ in
When -netdev vhost-user fails, it first reports a specific error, then
one or more generic ones, like this:
$ qemu-system-x86_64 -netdev vhost-user,id=foo,chardev=xxx
qemu-system-x86_64: -netdev vhost-user,id=foo,chardev=xxx: chardev "xxx"
not found
qemu-system-x86_64: -netdev vhost-u
Retain the function value for now, to permit selective conversion of
its callers.
Signed-off-by: Markus Armbruster
Reviewed-by: Eric Blake
---
include/qemu/option.h | 7 +--
net/vhost-user.c | 7 ---
qdev-monitor.c| 5 +++--
ui/spice-core.c | 5 +++--
util/qemu-config
When the argument is non-zero, qemu_opt_foreach() stops on callback
returning non-zero, and returns that value.
When the argument is zero, it doesn't stop, and returns the callback's
value from the last iteration.
The two callers that pass zero could just as well pass one:
* qemu_spice_init()'s
When the argument is non-zero, qemu_opts_foreach() stops on callback
returning non-zero, and returns that value.
When the argument is zero, it doesn't stop, and returns the bit-wise
inclusive or of all the return values. Funky :)
The callers that pass zero could just as well pass one, because th
Failure to create an object with -object is a fatal error. However,
we delay the actual exit until all -object are processed. On the one
hand, this permits detection of genuine additional errors. On the
other hand, it can muddy the waters with uninteresting additional
errors, e.g. when a later -
On Tue, Jun 02, 2015 at 04:51:46PM +0200, Paolo Bonzini wrote:
>
>
> On 02/06/2015 16:36, Christian Borntraeger wrote:
> > commit a0710f7995f914e3044e5899bd8ff6c43c62f916
> > Author: Paolo Bonzini
> > AuthorDate: Fri Feb 20 17:26:52 2015 +0100
> > Commit: Kevin Wolf
> > CommitDate: Tue
Retain the function value for now, to permit selective conversion of
its callers.
Signed-off-by: Markus Armbruster
Reviewed-by: Eric Blake
Acked-by: Kevin Wolf
---
block/blkdebug.c | 6 ++--
hw/core/qdev-properties-system.c | 5 +--
include/qemu/option.h| 4 +--
Touches vl.c, which gives me pretext to ask Paolo: would you be
willing to take this through your tree? Or should I take it through
mine?
v2:
* Straightforward rebase, R-bys retained.
* PATCH 1,3,4: Commit message improvements [Eric]
* PATCH 5,8: Use NULL instead of &error_abort [Kevin]
* PATCH 5
It's reported once per -sandbox on. Stop on the first failure, like
we do for other options.
Not fixed: "-sandbox on -sandbox off" should leave the sandbox off.
It doesn't.
Signed-off-by: Markus Armbruster
Reviewed-by: Eric Blake
---
vl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
We print it once for each -device help. Not helpful. Stop after the
first one.
Signed-off-by: Markus Armbruster
Reviewed-by: Eric Blake
---
vl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/vl.c b/vl.c
index 04a6066..2194e5d 100644
--- a/vl.c
+++ b/vl.c
@@ -4038,7 +4038
Cc: Kevin Wolf
Cc: qemu-bl...@nongnu.org
Signed-off-by: Markus Armbruster
Reviewed-by: Eric Blake
Acked-by: Kevin Wolf
---
block/blkdebug.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/block/blkdebug.c b/block/blkdebug.c
index be0d273..1e92607 100644
--- a/blo
Well, I think we can also achieve this like adding a flag in the structure
of CPUTLBEntry.
Am I missing something?
On Wed, Jun 3, 2015 at 4:22 PM, Paolo Bonzini wrote:
>
>
> On 03/06/2015 10:07, Sandhya Kumar wrote:
> > Thanks again. One more question.
> >
> > On versions prior to the mentioned
This reverts commit a0710f7995f914e3044e5899bd8ff6c43c62f916.
In qemu-devel email message <556dbf87.2020...@de.ibm.com>, Christian
Borntraeger writes:
Having many guests all with a kernel/ramdisk (via -kernel) and
several null block devices will result in hangs. All hanging
guests are in pa
Extend EntryLo0, EntryLo1, LLAddr and TagLo from 32 to 64 bits in MIPS32.
Signed-off-by: Leon Alrae
---
target-mips/cpu.h | 14 +++---
target-mips/machine.c | 20 ++--
target-mips/op_helper.c | 8
target-mips/translate.c | 5 +++--
4 files changed, 24 i
Since PFNX is now supported the bits 31:30 have to be cleared.
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index c931eda..0ca610c 100644
--- a/target-mips/
PABITS are not hardcoded to 36 bits and we do not model 59 PABITS (which is
the architectural limit) in QEMU.
Signed-off-by: Leon Alrae
---
target-mips/translate_init.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index 0
Hi,
This patchset adds large physical address support in MIPS, specifically:
* eXtended Physical Addressing (XPA)
* Large Physical Addressing (LPA)
XPA and LPA are enabled in MIPS32R5-generic and MIPS64R6-generic cores
respectively.
The series applies on top of the Config5.FRE patches.
Regards,
Enable XPA in MIPS32R5-generic and LPA in MIPS64R6-generic.
Signed-off-by: Leon Alrae
---
target-mips/translate_init.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index 05a02eb..836b7bf 100644
---
Update tlb->PFN to contain PFN concatenated with PFNX. PFNX is 0 if large
physical address is not supported.
Signed-off-by: Leon Alrae
---
target-mips/op_helper.c | 32 ++--
1 file changed, 26 insertions(+), 6 deletions(-)
diff --git a/target-mips/op_helper.c b/targe
CP0.PageGrain.ELPA enables support for large physical addresses. This field
is encoded as follows:
0: Large physical address support is disabled.
1: Large physical address support is enabled.
If this bit is a 1, the following changes occur to coprocessor 0 registers:
- The PFNX field of the EntryL
Ping.
Attached is a rebased version.
On 30/01/15 18:56, Peter Crosthwaite wrote:
On Thu, Jan 29, 2015 at 9:48 PM, Sebastian Huber
wrote:
Set initial MAC address to the one specified by the command line.
Signed-off-by: Sebastian Huber
Reviewed-by: Jason Wang
v2: Remove superfluous whitespa
Implement MTHC0 and MFHC0 instructions. In MIPS32 they are used to access
upper word of extended to 64-bits CP0 registers.
In MIPS64, when CP0 destination register specified is the EntryLo0 or
EntryLo1, bits 1:0 of the GPR appear at bits 31:30 of EntryLo0 or
EntryLo1. This is to compensate for RI
On 3 June 2015 at 10:24, Sandhya Kumar wrote:
> Well, I think we can also achieve this like adding a flag in the structure
> of CPUTLBEntry.
> Am I missing something?
The point of the TLB data structure is to allow very fast access
in the common case of "TLB hit to guest RAM". If we had extra
fla
On 06/01/2015 06:14 PM, Thibaut Collet wrote:
> Hi,
>
> >- vhost-user set received_disabled to true to prevent this from
> >happening. but looks like qemu_flush_or_purge_queue_packets() change it
> >to false unconditionally. And I don't quite understand this, probably we
> >can just remove this a
On 06/03/2015 03:56 PM, Thibaut Collet wrote:
> Hi,
>
> thanks for your point, I did not notice the problem of the lost of ARP
> announce by discarding the message.
> So I must rewrite my patch to define a queue to transmit the ARP
> announce to the guest. Is it the proper solution?
>
Please ha
On Wed, Jun 03, 2015 at 09:56:57AM +0200, Thibaut Collet wrote:
> thanks for your point, I did not notice the problem of the lost of ARP
> announce by discarding the message.
> So I must rewrite my patch to define a queue to transmit the ARP announce
> to the guest. Is it the proper solution?
I'm
On 06/03/2015 04:56 PM, Sebastian Huber wrote:
> Ping.
>
> Attached is a rebased version.
Hi. I believe you need post a formal inline V2 patch for this.
Thanks
>
> On 30/01/15 18:56, Peter Crosthwaite wrote:
>> On Thu, Jan 29, 2015 at 9:48 PM, Sebastian Huber
>> wrote:
>>> Set initial MAC add
"Dr. David Alan Gilbert (git)" wrote:
> From: "Dr. David Alan Gilbert"
>
> and use it in loadvm_state and ram_load.
>
> Where ever it's used, check the return and error if it failed.
>
> Minor: ram_load was using a 257 byte array for its string, the
>maximum length is 255 bytes + 0 termin
"Dr. David Alan Gilbert (git)" wrote:
> From: "Dr. David Alan Gilbert"
>
> Split qemu_savevm_state_begin to:
> qemu_savevm_state_header That writes the initial file header.
> qemu_savevm_state_beginThat sets up devices and does the first
> device pass.
>
> U
"Dr. David Alan Gilbert (git)" wrote:
> From: "Dr. David Alan Gilbert"
>
> check the return value of the function it calls and error if it's non-0
> Fixup qemu_rdma_init_one_block that is the only current caller,
> and rdma_add_block the only function it calls using it.
>
> Pass the name of the
On 02/06/2015 12:14, Peter Crosthwaite wrote:
> The #define-always change does make for a cleaner end result but I
> stayed away from it purely because I was thinking typedefs are better
> for type-definitions. But if we are open to the change of the #define
> based implementation I am all for it
On 29/05/15 12:59, Olga Krishtal wrote:
On 29/05/15 01:56, Eric Blake wrote:
On 05/28/2015 12:41 PM, Kirk Allan wrote:
By default, IP addresses and prefixes will be derived from information
obtained by various calls and structures. IPv4 prefixes can be found
by matching the address to those re
If I send to the backend out buffers using multiple sgs, what should I
expect when the user sends me back the result? What should I expect to
get when I do a virtqueue_get_buf()?
Do I need to make multiple calls to virtqueue_get_buf() in order to
get all my out buffers? Or it returns with the first
"Dr. David Alan Gilbert (git)" wrote:
> From: "Dr. David Alan Gilbert"
>
> There are currently lots of pieces of incoming migration state scattered
> around, and postcopy is adding more, and it seems better to try and keep
> it together.
>
> allocate MIS in process_incoming_migration_co
>
> Signe
On 29/05/15 19:46, Kirk Allan wrote:
>>>
On 28/05/15 23:54, Denis V. Lunev wrote:
On 28/05/15 21:41, Kirk Allan wrote:
By default, IP addresses and prefixes will be derived from information
obtained by various calls and structures. IPv4 prefixes can be found
by matching the address to those
"Dr. David Alan Gilbert (git)" wrote:
> From: "Dr. David Alan Gilbert"
>
> qemu_peek_buffer currently copies the data it reads into a buffer,
> however a future patch wants access to the buffer without the copy,
> hence rework to remove the copy to the layer above.
>
> Signed-off-by: Dr. David Al
On Tue, May 19, 2015 at 03:24:28PM +0300, Alberto Garcia wrote:
> The previous series no longer applies after all the code that was
> moved to block/io.c in 61007b316c, so I rebased it.
>
> Other than that there are no changes.
>
> V8:
> - Rebased against the current master.
>
> V7: https://list
On Fri, May 29, 2015 at 03:29:57PM +0200, Alberto Garcia wrote:
> On Fri 29 May 2015 02:32:45 PM CEST, Stefan Hajnoczi
> wrote:
>
> >> def setUp(self):
> >> -self.vm = iotests.VM().add_drive(self.test_img)
> >> +self.vm = iotests.VM()
> >> +for i in range(0, self.max
On 06/02/2015 09:47 AM, Juan Quintela wrote:
Failure was included on commit
Signed-off-by: Juan Quintela
Tested-by: Stefan Berger
On 03/06/15 13:19, Olga Krishtal wrote:
On 29/05/15 19:46, Kirk Allan wrote:
>>>
On 28/05/15 23:54, Denis V. Lunev wrote:
On 28/05/15 21:41, Kirk Allan wrote:
By default, IP addresses and prefixes will be derived from
information
obtained by various calls and structures. IPv4 prefixes can
This series of patch removes the following audio backends:
esd, fmod, winwave.
It also cleans up the remaining drivers to do not use global variables where
possible. This is a preparation for my GSoC project where I will enable multiple
simultaneous audio backends.
Please also test the coreaudio
Signed-off-by: Kővágó, Zoltán
---
audio/wavaudio.c | 37 +
1 file changed, 21 insertions(+), 16 deletions(-)
diff --git a/audio/wavaudio.c b/audio/wavaudio.c
index 09083da..c586020 100644
--- a/audio/wavaudio.c
+++ b/audio/wavaudio.c
@@ -36,15 +36,10 @@ typede
ESD is no longer developed and replaced by PulseAudio.
Signed-off-by: Kővágó, Zoltán
---
audio/Makefile.objs | 1 -
audio/audio_int.h | 1 -
audio/esdaudio.c| 557
configure | 18 +-
4 files changed, 6 insertions(+), 571 d
Signed-off-by: Kővágó, Zoltán
---
audio/Makefile.objs | 2 -
audio/audio_int.h | 1 -
audio/fmodaudio.c | 685
configure | 27 +--
4 files changed, 2 insertions(+), 713 deletions(-)
delete mode 100644 audio/fmodaudio.c
diff
Signed-off-by: Kővágó, Zoltán
---
audio/paaudio.c | 98 ++---
1 file changed, 52 insertions(+), 46 deletions(-)
diff --git a/audio/paaudio.c b/audio/paaudio.c
index bdf6cd5..35e8887 100644
--- a/audio/paaudio.c
+++ b/audio/paaudio.c
@@ -9,6 +9,
Currently the opaque pointer returned by audio_driver's init is only
exposed to the driver's fini, but not to audio_pcm_ops. This way if
someone wants to share a variable with the driver and the pcm, he must
use global variables. This patch fixes it by adding a third parameter to
audio_pcm_op's ini
Signed-off-by: Kővágó, Zoltán
---
audio/dsound_template.h | 18
audio/dsoundaudio.c | 106
2 files changed, 74 insertions(+), 50 deletions(-)
diff --git a/audio/dsound_template.h b/audio/dsound_template.h
index 98276fb..85ba858 10064
DirectSound should be a superior choice on Windows.
Signed-off-by: Kővágó, Zoltán
---
audio/Makefile.objs | 1 -
audio/audio_int.h| 1 -
audio/winwaveaudio.c | 717 ---
configure| 13 +-
4 files changed, 4 insertions(+), 728 d
Since SDL uses a lot of global data, we can't create independent
instances of sdl audio backend.
Signed-off-by: Kővágó, Zoltán
---
audio/sdlaudio.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/audio/sdlaudio.c b/audio/sdlaudio.c
index b95a7e0..1140f2e 100644
--- a/audio/sdlaudio.c
qpa_audio_init did not clean up resources properly if the initialization
failed. This hopefully fixes it.
Signed-off-by: Kővágó, Zoltán
---
audio/paaudio.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/audio/paaudio.c b/audio/paaudio.c
index 35e8887..fea6071 100644
---
Signed-off-by: Kővágó, Zoltán
---
audio/alsaaudio.c | 160 +-
1 file changed, 87 insertions(+), 73 deletions(-)
diff --git a/audio/alsaaudio.c b/audio/alsaaudio.c
index 87e71c6..d7e181b 100644
--- a/audio/alsaaudio.c
+++ b/audio/alsaaudio.c
@@
Hello!
> the input parameter i.e. CPUARMState doesn't has the #cores-in-soc nor any
> other useful
> information. We can add this field and initialize it in virt.c
Why does it have to be a part of CPUARMState ? Isn't it a global parameter?
> on x86 APIC ID used to be derived for cpu_index as
Signed-off-by: Kővágó, Zoltán
---
audio/coreaudio.c | 43 ---
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/audio/coreaudio.c b/audio/coreaudio.c
index 20346bc..9f731b7 100644
--- a/audio/coreaudio.c
+++ b/audio/coreaudio.c
@@ -32,20 +32,1
Signed-off-by: Kővágó, Zoltán
---
audio/ossaudio.c | 110 ++-
1 file changed, 61 insertions(+), 49 deletions(-)
diff --git a/audio/ossaudio.c b/audio/ossaudio.c
index 069ff60..d247969 100644
--- a/audio/ossaudio.c
+++ b/audio/ossaudio.c
@@ -38,
Michael Tokarev writes:
> In this version I used mkdtemp(3) which is:
>
> _BSD_SOURCE
> || /* Since glibc 2.10: */
> (_POSIX_C_SOURCE >= 200809L || _XOPEN_SOURCE >= 700)
>
> (POSIX.1-2008), so should be available on systems we care about.
>
> While at it, reset the res
P J P writes:
> Hello Markus,
>
>> On Monday, 1 June 2015 1:28 PM, Markus Armbruster wrote:
>> Michael (cc'ed) already posted "[PATCH] slirp: use less predictable
>> directory name in /tmp for smb config (CVE-2015-4037)"[*]. His patch
>> clobbers s->smb_dir[] when mkdtemp() fails (missed that
On 06/01/2015 04:27 AM, Peter Crosthwaite wrote:
On Sun, May 31, 2015 at 6:34 AM, Alexey Kardashevskiy wrote:
On 05/27/2015 01:22 AM, Alex Williamson wrote:
[cc +alexey]
On Mon, 2015-05-25 at 00:48 -0700, Peter Crosthwaite wrote:
Hi Alex and all,
I am working on a patch series to enable m
Bandan Das writes:
> There's too much going on in monitor_parse_command().
> Split up the arguments parsing bits into a separate function
> monitor_parse_arguments(). Let the original function check for
> command validity and sub-commands if any and return data (*cmd)
> that the newly introduced
Device node names should encode the unit address as hex, while the
code was encodind it as integers.
Also, use FDT_NAME_MAX macro for allocating and composing the name.
Signed-off-by: Nikunj A Dadhania
---
hw/ppc/spapr_pci.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
di
The properties reg/assigned-resources need to encode 64-bit memory
address space as part of phys.hi dword.
00 if configuration space
01 if IO region,
10 if 32-bit MEM region
11 if 64-bit MEM region
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Thomas Huth
---
hw/ppc/spapr_pci.c | 10 ++
Each hardware instance has a platform unique location code. The OF
device tree that describes a part of a hardware entity must include
the “ibm,loc-code” property with a value that represents the location
code for that hardware entity.
Populate ibm,loc-code.
1) PCI passthru devices need to ident
The patch series creates PCI device tree(DT) nodes in QEMU. The new
hotplug code needs the device node creation in QEMU. While during
boot, nodes were created in SLOF. It makes more sense to consolidate
the code to one place for better maintainability.
Based on David's spapr-next
https://github.c
Current code missed the Prog IF register. All Class Code, Subclass,
and Prog IF registers are needed to identify the accurate device type.
For example: USB controllers use the PROG IF for denoting: USB
FullSpeed, HighSpeed or SuperSpeed.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Thomas Huth
All the PCI enumeration and device node creation was off-loaded to
SLOF. With PCI hotplug support, code needed to be added to add device
node. This creates multiple copy of the code one in SLOF and other in
hotplug code. To unify this, the patch adds the pci device node
creation in Qemu. For backwa
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