Signed-off-by: Markus Armbruster
---
monitor.c | 65 ---
1 file changed, 33 insertions(+), 32 deletions(-)
diff --git a/monitor.c b/monitor.c
index 3a7e625..01b1a5f 100644
--- a/monitor.c
+++ b/monitor.c
@@ -4736,8 +4736,9 @@ static boo
The previous commits narrowed use of QError to handle_qmp_command()
and its helpers monitor_protocol_emitter(), build_qmp_error_dict().
Narrow it further to just the command handler call: instead of
converting Error to QError throughout handle_qmp_command(), convert
the QError gotten from the comma
While there, rename its type as well, from MonitorControl to
MonitorQMP.
Signed-off-by: Markus Armbruster
---
monitor.c | 35 ---
1 file changed, 16 insertions(+), 19 deletions(-)
diff --git a/monitor.c b/monitor.c
index 977c0fd..4b397e6 100644
--- a/monitor.c
++
Move mon->error handling to its caller handle_qmp_command().
Signed-off-by: Markus Armbruster
---
monitor.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/monitor.c b/monitor.c
index 1d7ad0a..c732203 100644
--- a/monitor.c
+++ b/monitor.c
@@ -407,13 +407,14 @@
Signed-off-by: Markus Armbruster
---
include/monitor/monitor.h | 2 +-
monitor.c | 6 --
stubs/mon-is-qmp.c| 2 +-
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/monitor/monitor.h b/include/monitor/monitor.h
index d409b6a..57f8394 100644
--- a/i
On Fri, May 22, 2015 at 07:29:05PM +0800, Gonglei wrote:
> On 2015/5/21 18:56, Daniel P. Berrange wrote:
> > This small series covers the crypto consolidation patches
> > I previously posted as part of a larger RFC for the TLS work
> >
> > https://lists.nongnu.org/archive/html/qemu-devel/2015-04
Am 22.05.2015 um 10:31 hat Markus Armbruster geschrieben:
> Kevin Wolf writes:
>
> > Am 21.05.2015 um 23:48 hat John Snow geschrieben:
> >>
> >>
> >> On 05/20/2015 04:20 AM, Markus Armbruster wrote:
> >> > John Snow writes:
> >> >
> >> >> On 05/12/2015 04:06 PM, Eric Blake wrote:
> >> >>> On
On 2015/5/22 19:37, Daniel P. Berrange wrote:
> On Fri, May 22, 2015 at 07:29:05PM +0800, Gonglei wrote:
>> On 2015/5/21 18:56, Daniel P. Berrange wrote:
>>> This small series covers the crypto consolidation patches
>>> I previously posted as part of a larger RFC for the TLS work
>>>
>>> https://
Here's my first stab at moving host features from the transports
into the vdev, as discussed. Patch is against master; I've only
brought up the s390 transports, but features seemed to look sane
there. No tests of pci or mmio or any migration testing, mainly
wanted to dump my code.
Cornelia Huck (1
On Fri, May 22, 2015 at 07:50:03PM +0800, Gonglei wrote:
> On 2015/5/22 19:37, Daniel P. Berrange wrote:
> > On Fri, May 22, 2015 at 07:29:05PM +0800, Gonglei wrote:
> >> On 2015/5/21 18:56, Daniel P. Berrange wrote:
> >>> This small series covers the crypto consolidation patches
> >>> I previously
Move host_features from the individual transport proxies into
the virtio device. Transports may continue to add feature bits
during device plugging.
This should it make easier to offer different sets of host features
for virtio-1/transitional support.
Signed-off-by: Cornelia Huck
---
hw/s390x/s
On 21 May 2015 at 23:18, Laurent Vivier wrote:
> When executing a 64bit target chroot on 64bit host,
> the ioctl() command can mismatch.
>
> It seems the previous commit doesn't solve the problem in
> my case:
>
> 9c6bf9c7 linux-user: Fix ioctl cmd type mismatch on 64-bit targets
>
> For e
Hi Shlomo,
On 05/06/2015 04:04 PM, shlomopongr...@gmail.com wrote:
> From: Shlomo Pongratz
>
> Implement GIC-500 from GICv3 family for arm64
>
> This patch is a first step toward 128 cores support for arm64.
>
> At first only 64 cores are supported for two reasons:
> First the largest integer t
22.05.2015 13:01, Gerd Hoffmann wrote:
> On Mi, 2015-05-20 at 14:44 +0300, Michael Tokarev wrote:
>> A (friendly) ping? :)
>>
>>> The solution appears to be trivial (see also some background
>>> at http://blog.nielshorn.net/2011/03/qemu-and-brazilian-keyboards/ ),
>>> but the problem is definitely
Hi,
> > Anyone having such a keyboard and willing to run some tests?
>
> Adding Cc's. This has been reported to debian too,
> http://bugs.debian.org/772422 (also in Cc).
Ok, so just replying should stick this into the debian bug tracker,
right?
Ok, instructions are here:
(a) Go grab https:/
22.05.2015 16:20, Gerd Hoffmann wrote
> Hi,
>
>>> Anyone having such a keyboard and willing to run some tests?
>>
>> Adding Cc's. This has been reported to debian too,
>> http://bugs.debian.org/772422 (also in Cc).
>
> Ok, so just replying should stick this into the debian bug tracker, right?
Hi,
Where we are in terms of virtio 1.0 support in qemu?
There hasn't been much activity in mst's virtio-1.0 branch recently, at
least not in the public version of it. And it doesn't rebase easily to
latest master any more ;(
What are the blocking issues? Anything I can do to speed up things
On 05/22/2015 04:32 AM, Peter Maydell wrote:
> On 22 May 2015 at 11:22, Peter Maydell wrote:
>> On 22 May 2015 at 11:00, Peter Maydell wrote:
>>> On 21 May 2015 at 18:39, Richard Henderson wrote:
for you to fetch changes up to 32ad48abd74a997220b841e4e913edeb267aa362:
target-alp
Hi,
> qboot is available at git://github.com/bonzini/qboot.git.
Firmware repo has packages now.
https://www.kraxel.org/repos/firmware.repo
https://www.kraxel.org/repos/jenkins/qboot/
enjoy,
Gerd
These functions are useful also for vGICv3 implementation. Make them
accessible from
within other modules.
Actually kvm_dist_get() and kvm_dist_put() could also be made reusable, but
they would
require two extra parameters (s->dev_fd and s->num_cpu) as well as lots of
typecasts of
's' to Devic
On 22 May 2015 at 10:01, Stefan Hajnoczi wrote:
> The following changes since commit 9e549d36e989b14423279fb991b71728a2a4ae7c:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/pull-vnc-20150520-1' into
> staging (2015-05-21 09:07:19 +0100)
>
> are available in the git repository at:
>
>
On 05/22/2015 01:22 AM, Bastian Koppelmann wrote:
> Hi,
>
> the new Aurix platform introduces a new ISA version, so this patchset
> adds a new feature bit and changes the generic Aurix cpu to a more specific
> tc27x cpu model. While at this, it introduces a new cpu model tc1797 which
> uses the v1
Hello!
> Please find some more comments inline.
Since there are notes about code style, i would add one more thing. structures
of v3
implementation keep old names (like GICState), and i would suggest to rename
these things
(like GICv3State) in order to avoid confusion.
Kind regards,
Pavel Fe
Am 18.04.2015 um 01:50 hat John Snow geschrieben:
> Signed-off-by: John Snow
> Reviewed-by: Max Reitz
> ---
> tests/qemu-iotests/124 | 174
> +++--
> tests/qemu-iotests/124.out | 4 +-
> 2 files changed, 172 insertions(+), 6 deletions(-)
>
> diff -
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/cpu.c | 8
1 file changed, 8 insertions(+)
diff --git a/target-tricore/cpu.c b/target-tricore/cpu.c
index 2ba0cf4..9fe0b97 100644
--- a/target-tricore/cpu.c
+++ b/target-tricore/cpu.c
@@ -118,6 +118,13
stream.git
tags/pull-tricore-20150522
for you to fetch changes up to 9371557115a734412974f8d4096cbe8a62ca2731:
target-tricore: add RR_DIV and RR_DIV_U instructions of the v1.6 ISA
(2015-05-22 17:02:34 +0200)
TriCore v1.6.1 ISA a
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/translate.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 663b2a0..1c37e48 100644
--- a/target-tricore/translate.c
+
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/translate.c | 26 ++
target-tricore/tricore-opcodes.h | 3 +++
2 files changed, 29 insertions(+)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 4aea0c6.
This instruction was introduced by the new Aurix platform.
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/helper.h | 2 ++
target-tricore/op_helper.c | 11 +++
target-tricore/translate.c | 5 +
target-tricore/tricore-opcode
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/helper.h | 2 ++
target-tricore/op_helper.c | 49
target-tricore/translate.c | 21 +
target-tricore/tricore-opcodes.h | 2 ++
4 file
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/translate.c | 19 +++
target-tricore/tricore-opcodes.h | 2 ++
2 files changed, 21 insertions(+)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 76bab8e..d4e4226
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/translate.c | 10 ++
target-tricore/tricore-opcodes.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 52f474b..4aea0c6 100644
--
Those instruction were introduced in the new Aurix platform.
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/translate.c | 39 +++
target-tricore/tricore-opcodes.h | 5 +
2 files changed, 44 insertions(+)
diff -
The aurix platform contains of several different cpu models and uses
the 1.6.1 ISA. This patch changes the generic aurix model to the more
specific tc27x cpu model and sets specific features.
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/cpu.c | 10 +++-
Those instruction were introduced in the new Aurix platform.
Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
---
target-tricore/translate.c | 35 +++
target-tricore/tricore-opcodes.h | 5 +
2 files changed, 40 insertions(+)
diff --git
On 05/22/2015 12:58 PM, Pavel Fedin wrote:
> Get/put routines are missing. Live migration is not possible.
>
> Signed-off-by: Pavel Fedin
> ---
> hw/intc/Makefile.objs | 1 +
> hw/intc/arm_gicv3_kvm.c | 283
>
> 2 files changed, 284 insertion
The following changes since commit 8b6db32a4ec47d1171ccfa21d557096b99f4eef0:
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into
staging (2015-05-22 13:25:40 +0100)
are available in the git repository at:
git://repo.or.cz/qemu/kevin.git tags/for-upstream
for you t
From: Christoph Hellwig
The SCSI emulation in the Linux NVMe driver really wants to know
if a device has a volatile write cache. Given that qemu has moved
away from a model where we report the backing store WCE bit to
one where the WCE bit is supposed to be part of the migratable
guest-visible s
Before a freed cluster can be reused, pending discards for this cluster
must be processed.
The original assumption was that this was not a problem because discards
are only cached during discard/write zeroes operations, which are
synchronous so that no concurrent write requests can cause cluster
a
From: Alberto Garcia
Since all tables are now stored together, it is possible to obtain
the position of a particular table directly from its address, so the
operation becomes O(1).
Signed-off-by: Alberto Garcia
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Max Reitz
Signed-off-by: Kevin Wolf
---
From: Fam Zheng
This fixes the bug introduced by commit c6ac36e (vmdk: Optimize cluster
allocation).
Sometimes, write_len could be larger than cluster size, because it
contains both data and marker. We must advance next_cluster_sector in
this case, otherwise the image gets corrupted.
Cc: qemu-
From: Alberto Garcia
This function never receives an invalid table pointer, so we can make
it void and remove all the error checking code.
Signed-off-by: Alberto Garcia
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Max Reitz
Signed-off-by: Kevin Wolf
---
block/qcow2-cache.c| 7 +--
blo
From: Alberto Garcia
The qcow2 L2/refcount cache contains one separate table for each cache
entry. Doing one allocation per table adds unnecessary overhead and it
also requires us to store the address of each table separately.
Since the size of the cache is constant during its lifetime, it's
bet
From: Eric Blake
POSIX says getopt() returns -1 on completion. While Linux happens
to define EOF as -1, this definition is not required by POSIX, and
there may be platforms where checking for EOF instead of -1 would
lead to an infinite loop.
Signed-off-by: Eric Blake
Reviewed-by: Alberto Garci
From: Fam Zheng
Bogus image may have a large total_sectors that will overflow the
multiplication. For cleanness, fix the return code so the error message
will be meaningful.
Reported-by: Richard W.M. Jones
Signed-off-by: Fam Zheng
Reviewed-by: Alberto Garcia
Reviewed-by: Markus Armbruster
Si
From: Fam Zheng
Richard Jones caught this bug with afl fuzzer.
In fact, that's the only possible value to overflow (extent->l1_size =
0x2000) l1_size:
l1_size = extent->l1_size * sizeof(long) => 0x8000;
g_try_malloc returns NULL because l1_size is interpreted as negative
during type ca
From: Alberto Garcia
The current algorithm to evict entries from the cache gives always
preference to those in the lowest positions. As the size of the cache
increases, the chances of the later elements of being removed decrease
exponentially.
In a scenario with random I/O and lots of cache miss
From: Alberto Garcia
The current cache algorithm traverses the array starting always from
the beginning, so the average number of comparisons needed to perform
a lookup is proportional to the size of the array.
By using a hash of the offset as the starting point, lookups are
faster and independe
From: "Daniel P. Berrange"
The qemu_read_password() method looks for \r to terminate the
reading of the a password. This is what will be seen when
reading the password from a TTY. When scripting though, it is
useful to be able to send the password via a pipe, in which
case we must look for \n to
From: "Daniel P. Berrange"
The qemu-img.c file has a read_password() method impl that is
used to prompt for passwords on the console, with impls for
POSIX and Windows. This will be needed by qemu-io.c too, so
move it into the QEMU osdep/oslib files where it can be shared
without code duplication
From: Alberto Garcia
A cache miss means that the whole array was traversed and the entry
we were looking for was not found, so there's no need to traverse it
again in order to select an entry to replace.
Signed-off-by: Alberto Garcia
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Max Reitz
Signed-
From: Fam Zheng
Adding "-d" option. The output goes to "tee" so it appears in your
console. Also, raise the verbosity of unnitest runner.
When testing a topic branch, it's possible that a bug introduced by a
code change makes the python test case hang, with debug output, it is
much easier to loc
From: Alberto Garcia
Fix pointer declaration to make it consistent with the rest of the
code.
Signed-off-by: Alberto Garcia
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Max Reitz
Signed-off-by: Kevin Wolf
---
block/qcow2-cache.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
From: Fam Zheng
The image is contributed by Richard W.M. Jones.
Cc: Richard W.M. Jones
Signed-off-by: Fam Zheng
Reviewed-by: Alberto Garcia
Reviewed-by: Markus Armbruster
Signed-off-by: Kevin Wolf
---
tests/qemu-iotests/059 | 5 +
tests/qemu-iotests/059.out
On 05/22/2015 04:22 AM, Kevin Wolf wrote:
> Am 21.05.2015 um 23:48 hat John Snow geschrieben:
>>
>>
>> On 05/20/2015 04:20 AM, Markus Armbruster wrote:
>>> John Snow writes:
>>>
On 05/12/2015 04:06 PM, Eric Blake wrote:
> On 05/12/2015 01:53 PM, John Snow wrote:
>> Bitmaps can be in
From: "Daniel P. Berrange"
The qemu-io tool does not check if the image is encrypted so
historically would silently corrupt the sectors by writing
plain text data into them instead of cipher text. The earlier
commit turns this mistake into a fatal abort, so check for
encryption and prompt for key
On 05/22/2015 11:02 AM, Kevin Wolf wrote:
> Am 18.04.2015 um 01:50 hat John Snow geschrieben:
>> Signed-off-by: John Snow
>> Reviewed-by: Max Reitz
>> ---
>> tests/qemu-iotests/124 | 174
>> +++--
>> tests/qemu-iotests/124.out | 4 +-
>> 2 files c
Hi,
I am wondering how the timer interrupt works in softmmu TCG mode (on X86)?
In general, we would have timer & code execution run in parallel, then once
in a while, the timer would interrupt the code execution to switch it out
to execute the timer interrupt.
I looked at the code, but still co
From: "Daniel P. Berrange"
Add a simple test case for qemu-iotests that covers read/write
with encrypted qcow2 files.
Signed-off-by: Daniel P. Berrange
Reviewed-by: Eric Blake
Signed-off-by: Kevin Wolf
---
tests/qemu-iotests/134 | 69 ++
tests/
Am 22.05.2015 um 17:29 hat John Snow geschrieben:
>
>
> On 05/22/2015 11:02 AM, Kevin Wolf wrote:
> > Am 18.04.2015 um 01:50 hat John Snow geschrieben:
> >> Signed-off-by: John Snow
> >> Reviewed-by: Max Reitz
> >> ---
> >> tests/qemu-iotests/124 | 174
> >> +++
Suggested-by: Markus Armbruster
Reviewed-by: Alberto Garcia
Signed-off-by: Kevin Wolf
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b3552b2..9ff7c36 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -785,6 +785,7 @@ S: Supported
F: block*
F: b
From: "Daniel P. Berrange"
When a qcow[2] file is opened, if the header reports an
encryption method, this is used to set the 'crypt_method_header'
field on the BDRVQcow[2]State struct, and the 'encrypted' flag
in the BDRVState struct.
When doing I/O operations, the 'crypt_method' field on the
B
From: Markus Armbruster
Kevin and Stefan asked me to take care of this part.
Signed-off-by: Markus Armbruster
Signed-off-by: Kevin Wolf
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9ff7c36..0463696 100644
--- a/MAINTAINERS
+++ b/M
RHEL6 doesn't have Python 2.7, so replace this call with
assertNotEqual(x, None) which will work just as well.
Reported-by: Kevin Wolf
Signed-off-by: John Snow
---
tests/qemu-iotests/124 | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qemu-iotests/124 b/tests/qemu-iote
On 22 May 2015 at 16:36, Jun Koi wrote:
> In general, we would have timer & code execution run in parallel,
No code has to actually run when there's an active timer;
the event loop thread mostly sits blocked waiting for
something interesting to happen (io or a timer firing).
When it does then the
ble in the git repository at:
>
> https://github.com/bkoppelmann/qemu-tricore-upstream.git
> tags/pull-tricore-20150522
>
> for you to fetch changes up to 9371557115a734412974f8d4096cbe8a62ca2731:
>
> target-tricore: add RR_DIV and RR_DIV_U instructi
Hi Andrea,
On Thu, May 21, 2015 at 05:52:51PM +0200, Andrea Arcangeli wrote:
> Hi Kirill,
>
> On Thu, May 21, 2015 at 04:11:11PM +0300, Kirill Smelkov wrote:
> > Sorry for maybe speaking up too late, but here is additional real
>
> Not too late, in fact I don't think there's any change required
On Fri, May 22, 2015 at 03:44:53PM +0800, Chen Fan wrote:
> On 05/20/2015 10:53 PM, Igor Mammedov wrote:
> >On Wed, 20 May 2015 10:40:48 +0800
> >Zhu Guihua wrote:
> >
> >>From: Chen Fan
> >>
> >>After CPU hotplug has been converted to BUS-less hot-plug infrastructure,
> >>the only function ICC b
Hi!
> Looks GICv3 common class currently miss this security_extn field +
> parent_fiq so it does not compile without changes. Or did I miss something?
Just throw this if(...) away. It's my fault. Actually i have rebased Shlomo's
patches on
yesterday's master, and during this i added parent_fiq
On 05/22/2015 07:49 AM, Kevin Wolf wrote:
> Am 22.05.2015 um 10:31 hat Markus Armbruster geschrieben:
>> Kevin Wolf writes:
>>
>>> Am 21.05.2015 um 23:48 hat John Snow geschrieben:
On 05/20/2015 04:20 AM, Markus Armbruster wrote:
> John Snow writes:
>
>> On 05/12/2015
On 05/22/2015 04:52 AM, Markus Armbruster wrote:
> Eric Blake writes:
>
>> On 05/12/2015 01:53 PM, John Snow wrote:
>>> Bitmaps can be in a handful of different states with potentially
>>> more to come as we tool around with migration and persistence patches.
>>>
>>> Instead of having a bunch o
Hi Eric,
Tested the latest patchset from your vfio_integ_v15 branch on a platform device
with 2 mmio regions. Works fine.
Tested-by: Vikram Sethi
Thanks,
Vikram
On 05/06/15 01:37, Eric Auger wrote:
> Dear All,
>
> Please ignore the previous void message. For unknown reason the reply
> systemati
On 03/09/2015 06:24 PM, Mark Cave-Ayland wrote:
> This patchset attempts to separate out the IDE/ATAPI logic from the unaligned
> DMA access logic for macio which provides the following benefits:
>
> 1) Reduced code complexity
>
> The existing macio IDE/ATAPI functions were becoming extremely d
On 22/05/15 18:55, John Snow wrote:
> On 03/09/2015 06:24 PM, Mark Cave-Ayland wrote:
>> This patchset attempts to separate out the IDE/ATAPI logic from the unaligned
>> DMA access logic for macio which provides the following benefits:
>>
>> 1) Reduced code complexity
>>
>> The existing macio IDE/
On 05/22/2015 02:16 PM, Mark Cave-Ayland wrote:
> On 22/05/15 18:55, John Snow wrote:
>
>> On 03/09/2015 06:24 PM, Mark Cave-Ayland wrote:
>>> This patchset attempts to separate out the IDE/ATAPI logic from the
>>> unaligned
>>> DMA access logic for macio which provides the following benefits:
On Tue, Apr 14, 2015 at 12:28:24PM -0300, Eduardo Habkost wrote:
> This uses the feature name arrays to register QOM properties for feature
> flags. This simply adds properties that can be configured using -global,
> but doesn't change x86_cpu_parse_featurestr() to use them yet.
>
> Signed-off-by:
On Wed, May 20, 2015 at 10:40:46AM +0800, Zhu Guihua wrote:
> From: Chen Fan
>
> Replace mapping APIC at global system address space with
> mapping it at per-CPU address spaces.
>
> Signed-off-by: Chen Fan
> Signed-off-by: Zhu Guihua
Applied to the x86 tree. Thanks.
--
Eduardo
So far, it is not possible to use the network dump interface
with the "-netdev" option yet, it only works with the legacy
"-net" option. To be able to use it with "-netdev", too, this
patch now enables the "vlan" packet distribution for the
"-netdev" option, too, so that you can now dump network pa
On Wed, May 20, 2015 at 10:40:47AM +0800, Zhu Guihua wrote:
> Use C casts to avoid accessing ICCDevice's qdev field
> directly.
>
> Signed-off-by: Zhu Guihua
Applied to the x86 tree. Thanks.
--
Eduardo
On 05/21/2015 09:40 PM, Fam Zheng wrote:
> Now this function follows the backing chain until seeing BDRV_BLOCK_ALLOCATED.
> Base is not included, and it can be NULL just like bdrv_is_allocated_above().
>
> Existing callers pass in bs->backing_hd to keep the old behavior.
>
> Signed-off-by: Fam Zh
On 05/22/2015 01:22 PM, Thomas Huth wrote:
> So far, it is not possible to use the network dump interface
> with the "-netdev" option yet, it only works with the legacy
> "-net" option. To be able to use it with "-netdev", too, this
> patch now enables the "vlan" packet distribution for the
> "-net
On 22/05/15 19:20, John Snow wrote:
>>> Code fails 32 bit build due to %lx debug prints. I'll edit them
>>> accordingly if that is OK by you.
>>
>> Please go right ahead :) Do you need a proper re-spin without the RFC
>> prefix? If so, I can make the changes there if that helps?
>>
>>
>> ATB,
>>
On 05/21/2015 09:40 PM, Fam Zheng wrote:
> If specified as "true", it allows discarding on target sectors where source is
> not allocated.
>
> Signed-off-by: Fam Zheng
> ---
> block/mirror.c| 7 +--
> blockdev.c| 5 +
> hmp.c | 2 +-
> incl
|| probably does not mean the same thing as |.
Additionally, allow users to submit a prd_size of 0
to indicate that they'd like to continue using the default.
Signed-off-by: John Snow
Reviewed-by: Kevin Wolf
Message-id: 1430417242-11859-3-git-send-email-js...@redhat.com
---
tests/libqos/ahci.c
Lift the flag preventing the migration of the ICH9/AHCI devices.
Signed-off-by: John Snow
Reviewed-by: Kevin Wolf
Message-id: 1430417242-11859-5-git-send-email-js...@redhat.com
---
hw/ide/ahci.c | 1 -
hw/ide/ich.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahc
This provides g_ptr_array_new_with_free_func, as well as a few
other functions that we've been hacking around in glib-compat.h.
Cleaning up the compatibility headers will come later.
Signed-off-by: Paolo Bonzini
Signed-off-by: John Snow
Reviewed-by: Markus Armbruster
Reviewed-by: Alex Bennée
M
The following changes since commit bb2fa17f182ee0b45b53474f76679944fc891f04:
Merge remote-tracking branch 'remotes/bkoppelmann/tags/pull-tricore-20150522'
into staging (2015-05-22 16:22:42 +0100)
are available in the git repository at:
https://github.com/jnsnow/qemu.git tag
qtest currently has a static buffer of size 1024 that if we
overflow, ignores the additional data silently which leads
to hangs or stream failures.
Use glib's string facilities to allow arbitrarily long data,
but split this off into a new function, qtest_sendf.
Static data can still be sent using
Sometimes we want a command to halt the VM instead
of complete successfully, so it'd be nice to let the
libqos/ahci functions cope with such scenarios.
Signed-off-by: John Snow
Reviewed-by: Kevin Wolf
Message-id: 1430417242-11859-2-git-send-email-js...@redhat.com
---
tests/libqos/ahci.c | 27 ++
libqos.c:
-set_context for addressing which commands go where
-migrate performs the actual migration
malloc.c:
- Structure of the allocator is adjusted slightly with
a second-tier malloc to make swapping around the allocators
easy when we "migrate" the lists from the source
Since we're bumping the version to 2.22+,
remove the now-stale compat functions.
Signed-off-by: John Snow
Reviewed-by: Markus Armbruster
Reviewed-by: Alex Bennée
Message-id: 1431469140-22208-2-git-send-email-js...@redhat.com
---
include/glib-compat.h | 35 ---
1
Write to one guest, migrate, and then read from the other.
adjust ahci_io to clear any buffers it creates, so that we
can use ahci_io safely on both guests knowing we are using
empty buffers and not accidentally re-using data.
Signed-off-by: John Snow
Reviewed-by: Kevin Wolf
Message-id: 14304172
Previously, memset was just a frontend to write() and only
stupidly sent the pattern many times across the wire.
Let's not discuss who stupidly wrote it like that in the first place.
(Hint: It was me.)
Signed-off-by: John Snow
Message-id: 1430864578-22072-4-git-send-email-js...@redhat.com
---
q
Notes:
* The migration is performed on QOSState objects.
* The migration is performed in such a way that it does not assume
consistency between the allocators attached to each. That is to say,
you can use each QOSState object completely independently and then at
an arbitrary point deci
Test migrating a halted DMA transaction.
Resume, then test data integrity.
Signed-off-by: John Snow
Reviewed-by: Kevin Wolf
Message-id: 1430417242-11859-10-git-send-email-js...@redhat.com
---
tests/ahci-test.c | 75 ++-
1 file changed, 74 inse
For larger pieces of data that won't need to be debugged and
viewing the hex nibbles is unlikely to be useful, we can encode
data using base64 instead of encoding each byte as %02x, which
leads to some space savings and faster reads/writes.
For now, the default is left as hex nibbles in memwrite()
If we're going to test the migration of halted DMA jobs,
we should probably check to make sure we can resume them
locally as a first step.
Signed-off-by: John Snow
Reviewed-by: Kevin Wolf
Message-id: 1430417242-11859-9-git-send-email-js...@redhat.com
---
tests/ahci-test.c | 60 +
Use blkdebug to inject an error on first flush, then attempt to flush
on the first guest. When the error halts the VM, migrate to the
second VM, and attempt to resume the command.
Signed-off-by: John Snow
Reviewed-by: Kevin Wolf
Message-id: 1430417242-11859-8-git-send-email-js...@redhat.com
---
This continues the IOMMU fix from 2.3, where we should not attempt
to remap the CLB or FIS RX buffers if the AHCI device is currently
running.
The same applies to migration: keep our mitts off these registers
unless the device is supposed to be on.
Does not impact backwards compatibility for the
From: Mark Cave-Ayland
Similarly switch the macio IDE routines over to use the new function and
tidy-up the remaining code as required.
[Maintainer edit: printf format codes adjusted for 32/64bit. --js]
Signed-off-by: Mark Cave-Ayland
Acked-by: John Snow
Message-id: 1425939893-14404-3-git-sen
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