Quoting Stefan Weil (2013-08-08 13:18:07)
> QEMU executables for w32, w64 had included meta information built from
> version.rc. These rules were changed several times some months ago.
>
> The latest version added version.o to the tools, but not to the system
> emulations.
>
> This patch adds the
On 15 August 2013 23:18, Guenter Roeck wrote:
> But doesn't that mean that there is _currently_ no problem ? If so,
> we can introduce the additional code when the problem really shows up.
> Being Preemptive is good, but if it is not really needed today
> I would rather have today's problems resol
Hello Prerna and Alex,
This series cleans up the fdt CPU nodes for -M pseries as attempted by Prerna.
v2 reuses DeviceClass::fw_name for name storage and cleans up sPAPR code to
not rely on machine-global cpu_model or sPAPREnvironment::cpu_model.
Underscores are avoided by using fw_name that does
Set the expected values for POWER7, POWER7+, POWER8 and POWER5+.
Note that POWER5+ and POWER7+ are intentionally lacking the '+', so the
lack of a POWER7P family constitutes no problem.
Signed-off-by: Andreas Färber
---
target-ppc/translate_init.c | 3 +++
1 file changed, 3 insertions(+)
diff -
Instead of relying on cpu_model, obtain the device tree node label
per CPU. Use DeviceClass::fw_name when available. This implicitly
resolves HOST@0 node labels for those CPUs through inheritance.
Whenever DeviceClass::fw_name is not available, derive it from the CPU's
type name and fill it in for
PAPR requires that PowerPC, shall not contain underscores, so skip
any underscores in the type name.
Reported-by: Prerna Saxena
Signed-off-by: Andreas Färber
---
hw/ppc/spapr.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
inde
Whenever DeviceClass::fw_name is not available, derive it from the CPU's
type name, resorting to the parent's type in case of -cpu host, and fill
it in for that class in a PAPR-compliant way with "PowerPC," prefix.
Reported-by: Prerna Saxena
Signed-off-by: Andreas Färber
---
hw/ppc/spapr.c | 4
Am 16.08.2013 00:35, schrieb Andreas Färber:
> Whenever DeviceClass::fw_name is not available, derive it from the CPU's
> type name, resorting to the parent's type in case of -cpu host, and fill
> it in for that class in a PAPR-compliant way with "PowerPC," prefix.
Ugh, obviously forgot to edit th
On 08/15/2013 03:23 PM, Peter Maydell wrote:
On 15 August 2013 23:18, Guenter Roeck wrote:
But doesn't that mean that there is _currently_ no problem ? If so,
we can introduce the additional code when the problem really shows up.
Being Preemptive is good, but if it is not really needed today
I
On Thu, 2013-08-15 at 16:47 +0200, Andreas Färber wrote:
> When we instantiate a -cpu POWER9 then having one POWER9_vX.Y around to
> back it doesn't really hurt. Unlike ARM's MIDR there doesn't seem to be
> an encoding of IBM vendor or POWER family in the PVR. The macros and
> their new implementat
On Thu, Aug 15, 2013 at 7:20 PM, Benjamin Herrenschmidt
wrote:
> On Thu, 2013-08-15 at 16:47 +0200, Andreas Färber wrote:
>> comparing values for closest match. So that if you have a v2.4 and QEMU
>> knows v2.1 and v2.3 we take v2.3 and fill in the v2.4 PVR.
>
> Another thing to keep in mind is th
On Thu, 2013-08-15 at 19:28 -0500, Anthony Liguori wrote:
> On Thu, Aug 15, 2013 at 7:20 PM, Benjamin Herrenschmidt
> wrote:
> > On Thu, 2013-08-15 at 16:47 +0200, Andreas Färber wrote:
> >> comparing values for closest match. So that if you have a v2.4 and QEMU
> >> knows v2.1 and v2.3 we take v2
Signed-off-by: John Arbuckle
Deciding when and how to send the command key has not been easy. A simple
protocol that this patch implements is send the command key to the guest
operating system when the mouse is grabbed. Otherwise send the command key
to QEMU.
---
ui/cocoa.m | 21 -
于 2013-8-7 11:00, Wenchao Xia 写道:
>This series brings internal snapshot support at block devices level, now we
> have two three methods to do block snapshot lively: 1) backing chain,
> 2) internal one and 3) drive-back up approach.
>
> Comparation:
> Advantages:
Since commit 23326164 we align access sizes to match the alignment of
the address, but we don't align the access size itself. This means we
let illegal access sizes (ex. 3) slip through if the address is
sufficiently aligned (ex. 4). This results in an abort which would be
easy for a guest to tri
Am 16.08.2013 00:19, schrieb Michael Roth:
> Quoting Stefan Weil (2013-08-08 13:18:07)
>> > QEMU executables for w32, w64 had included meta information built from
>> > version.rc. These rules were changed several times some months ago.
>> >
>> > The latest version added version.o to the tools, but
I didn't mean to imply that the savevm format is broken and needed
fixing. I was just wondering if the data is there and I simply hadn't
found it. Upgrading QEMU is not an option at the moment since these
are tightly controlled productions machines. Is it possible to loadvm
This is (very likely) related to this /old/ bug:
http://lists.gnu.org/archive/html/qemu-devel/2013-04/msg02521.html
Could you try the patch at http://lists.gnu.org/archive/html/qemu-
devel/2013-05/msg00248.html ?
--
You received this bug notification because you are a member of qemu-
devel-ml,
IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
a CPU version in lower 16 bits. Since there is no significant change
in behavior between versions, there is no point to add every single CPU
version in QEMU's CPU list. Also, new CPU versions of already supported
CPU won't brea
On Tue, 07/30 14:53, Stefan Hajnoczi wrote:
> On Tue, Jul 30, 2013 at 03:17:47PM +0800, Fam Zheng wrote:
> > for (sector_num = 0; sector_num < end; sector_num += n) {
> > -uint64_t delay_ns = 0;
> > -bool copy;
> >
> > -wait:
> > -/* Note that even when no rate limit
On Thu, Aug 15, 2013 at 10:26:36AM +0800, Wenchao Xia wrote:
> 于 2013-8-14 15:53, Stefan Hajnoczi 写道:
> > On Wed, Aug 14, 2013 at 3:54 AM, Wenchao Xia
> > wrote:
> >> 于 2013-8-13 16:21, Stefan Hajnoczi 写道:
> >>
> >>> On Tue, Aug 13, 2013 at 4:53 AM, Wenchao Xia
> >>> wrote:
>
> 于 2013-
于 2013-8-14 23:32, Kevin Wolf 写道:
Am 14.08.2013 um 16:26 hat Kaveh Razavi geschrieben:
On 08/14/2013 03:50 PM, Alex Bligh wrote:
Assuming the cache quota is not exhausted, how do you know how that
a VM has finished 'creating' the cache? At any point it might
read a bit more from the backing ima
On 15.08.2013, at 09:45, Alexey Kardashevskiy wrote:
> IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
> a CPU version in lower 16 bits. Since there is no significant change
> in behavior between versions, there is no point to add every single CPU
> version in QEMU's CPU l
On Thu, Aug 15, 2013 at 08:05:11AM +0800, liu ping fan wrote:
> On Mon, Aug 12, 2013 at 8:49 PM, Stefan Hajnoczi wrote:
> > @@ -376,13 +411,16 @@ bool timerlist_run_timers(QEMUTimerList *timer_list)
> >
> > current_time = qemu_clock_get_ns(timer_list->clock->type);
> > for(;;) {
> > +
于 2013-8-15 15:49, Stefan Hajnoczi 写道:
On Thu, Aug 15, 2013 at 10:26:36AM +0800, Wenchao Xia wrote:
于 2013-8-14 15:53, Stefan Hajnoczi 写道:
On Wed, Aug 14, 2013 at 3:54 AM, Wenchao Xia wrote:
于 2013-8-13 16:21, Stefan Hajnoczi 写道:
On Tue, Aug 13, 2013 at 4:53 AM, Wenchao Xia
wrote:
于 2013
On 08/15/2013 05:55 PM, Alexander Graf wrote:
>
> On 15.08.2013, at 09:45, Alexey Kardashevskiy wrote:
>
>> IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
>> a CPU version in lower 16 bits. Since there is no significant change
>> in behavior between versions, there is no
On Wed, Aug 14, 2013 at 05:32:16PM +0200, Kevin Wolf wrote:
> Am 14.08.2013 um 16:26 hat Kaveh Razavi geschrieben:
> > On 08/14/2013 03:50 PM, Alex Bligh wrote:
> > > Assuming the cache quota is not exhausted, how do you know how that
> > > a VM has finished 'creating' the cache? At any point it mi
This patch eliminates limitation of committing the active device.
bdrv_drop_intermediate is reimplemented to take pointers to
(BlockDriverState *), so it can modify the caller's local pointers to
preserve their semantics, while updating active BDS in-place by
bdrv_swap active and base: we need dat
Previously live commit of active block device is not supported, this series
implements it and updates corresponding qemu-iotests cases.
Please see commit messages for implementation details.
v3: [addressing Stefan's comments]
- Sleep in dirty map setup loop.
- Handle error of bdrv_co_is_a
Factor out commit test common logic into super class, and update test
of committing the active image.
Signed-off-by: Fam Zheng
---
tests/qemu-iotests/040 | 73 +-
1 file changed, 31 insertions(+), 42 deletions(-)
diff --git a/tests/qemu-iotests/04
On Thu, Aug 15, 2013 at 4:01 PM, Stefan Hajnoczi wrote:
> On Thu, Aug 15, 2013 at 08:05:11AM +0800, liu ping fan wrote:
>> On Mon, Aug 12, 2013 at 8:49 PM, Stefan Hajnoczi wrote:
>> > @@ -376,13 +411,16 @@ bool timerlist_run_timers(QEMUTimerList *timer_list)
>> >
>> > current_time = qemu_clo
On Thu, Aug 15, 2013 at 4:22 PM, liu ping fan wrote:
> On Thu, Aug 15, 2013 at 4:01 PM, Stefan Hajnoczi wrote:
>> On Thu, Aug 15, 2013 at 08:05:11AM +0800, liu ping fan wrote:
>>> On Mon, Aug 12, 2013 at 8:49 PM, Stefan Hajnoczi
>>> wrote:
>>> > @@ -376,13 +411,16 @@ bool timerlist_run_timers(Q
On Wed, Aug 14, 2013 at 04:20:27PM +0200, Kaveh Razavi wrote:
> Hi,
>
> On 08/14/2013 11:29 AM, Stefan Hajnoczi wrote:
> > 100 MB is small enough for RAM. Did you try enabling the host kernel
> > page cache for the backing file? That way all guests running on this
> > host share a single RAM-cac
On 15 Aug 2013, at 09:22, liu ping fan wrote:
> How about new_list for vcpu to add timer, an before walking, splice
> the new_list to timer_list?
If I understand you right, you would have to be careful
any timer routine modified itself or (less likely) any
other timer, as that timer would no lon
On 15.08.2013, at 10:06, Alexey Kardashevskiy wrote:
> On 08/15/2013 05:55 PM, Alexander Graf wrote:
>>
>> On 15.08.2013, at 09:45, Alexey Kardashevskiy wrote:
>>
>>> IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
>>> a CPU version in lower 16 bits. Since there is no si
hi,
please, can anyone recommend me a distribution that offers a barebone linux
kernel.
minimum that I need on that image are:
_ the kernel
_ the compiler and development infrastructure to build it
regards,
dacian
Am 15.08.2013 10:45, schrieb Alexander Graf:
>
> On 15.08.2013, at 10:06, Alexey Kardashevskiy wrote:
>
>> On 08/15/2013 05:55 PM, Alexander Graf wrote:
>>>
>>> On 15.08.2013, at 09:45, Alexey Kardashevskiy wrote:
>>>
IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
>>
On 15.08.2013, at 12:52, Andreas Färber wrote:
> Am 15.08.2013 10:45, schrieb Alexander Graf:
>>
>> On 15.08.2013, at 10:06, Alexey Kardashevskiy wrote:
>>
>>> On 08/15/2013 05:55 PM, Alexander Graf wrote:
On 15.08.2013, at 09:45, Alexey Kardashevskiy wrote:
> IBM POWERPC p
Bit extraction for the FP BF and L field of the MTFSFI and MTFSF
instructions is wrong and doesn't match the reference manual (which
explain the bit number in big endian format). It has been broken in
commit 7d08d85645def18eac2a9d672c1868a35e0bcf79.
This patch fixes this, which in turn fixes the p
On 15.08.2013, at 13:32, Aurelien Jarno wrote:
> Bit extraction for the FP BF and L field of the MTFSFI and MTFSF
> instructions is wrong and doesn't match the reference manual (which
> explain the bit number in big endian format). It has been broken in
> commit 7d08d85645def18eac2a9d672c1868a35e
Am 15.08.2013 13:03, schrieb Alexander Graf:
>
> On 15.08.2013, at 12:52, Andreas Färber wrote:
>
>> Am 15.08.2013 10:45, schrieb Alexander Graf:
>>>
>>> Yes, I think it makes sense to keep the full PVR around when we want to be
>>> specific. What I'm referring to is class specific logic that ca
Hi,
Am 15.08.2013 10:57, schrieb Herbei Dacian:
>
> please, can anyone recommend me a distribution that offers a barebone
> linux kernel.
> minimum that I need on that image are:
> _ the kernel
> _ the compiler and development infrastructure to build it
Aboriginal Linux.
Andreas
--
SUSE LINUX
On 15.08.2013, at 13:48, Andreas Färber wrote:
> Am 15.08.2013 13:03, schrieb Alexander Graf:
>>
>> On 15.08.2013, at 12:52, Andreas Färber wrote:
>>
>>> Am 15.08.2013 10:45, schrieb Alexander Graf:
Yes, I think it makes sense to keep the full PVR around when we want to be
spec
On Thu, Aug 15, 2013 at 04:24:57PM +0800, liu ping fan wrote:
> On Thu, Aug 15, 2013 at 4:22 PM, liu ping fan wrote:
> > On Thu, Aug 15, 2013 at 4:01 PM, Stefan Hajnoczi wrote:
> >> On Thu, Aug 15, 2013 at 08:05:11AM +0800, liu ping fan wrote:
> >>> On Mon, Aug 12, 2013 at 8:49 PM, Stefan Hajnocz
On Thu, Aug 15, 2013 at 09:57:09AM +0100, Herbei Dacian wrote:
> please, can anyone recommend me a distribution that offers a barebone linux
> kernel.
> minimum that I need on that image are:
> _ the kernel
> _ the compiler and development infrastructure to build it
If you want something small an
On Sat, Aug 10, 2013 at 12:21:27PM +0100, Alex Bligh wrote:
> Currently we use a separate timer list group (main_loop_tlg)
> for the main loop. This patch replaces this with a dummy AioContext
> used just for timers in the main loop.
Things get interesting when we make main loop qemu_set_fd_handle
On 08/15/2013 10:32 AM, Stefan Hajnoczi wrote:
I don't buy the argument about the page cache being evicted at any time:
At the scale where caching is important, provisioning a measily 100 MB
of RAM per guest should not be a challenge.
cgroups can be used to isolate page cache between VMs if you
On Sun, Aug 11, 2013 at 05:43:13PM +0100, Alex Bligh wrote:
> @@ -314,7 +314,18 @@ void qemu_clock_warp(QEMUClock *clock)
> }
>
> vm_clock_warp_start = qemu_get_clock_ns(rt_clock);
> -deadline = qemu_clock_deadline(vm_clock);
> +/* We want to use the earliest deadline from ALL v
On 15 Aug 2013, at 13:30, Stefan Hajnoczi wrote:
> On Sun, Aug 11, 2013 at 05:43:13PM +0100, Alex Bligh wrote:
>> @@ -314,7 +314,18 @@ void qemu_clock_warp(QEMUClock *clock)
>> }
>>
>> vm_clock_warp_start = qemu_get_clock_ns(rt_clock);
>> -deadline = qemu_clock_deadline(vm_clock);
>>
On 15 Aug 2013, at 13:16, Stefan Hajnoczi wrote:
> Things get interesting when we make main loop qemu_set_fd_handler() and
> timers just use AioContext.
>
> Basically, we are distilling out the main-loop.c stuff which is a
> low-level glib-style event loop from the AioContext fd handlers, timers
On Sun, Aug 11, 2013 at 05:42:54PM +0100, Alex Bligh wrote:
> [ This patch set is available from git at:
>https://github.com/abligh/qemu/tree/aio-timers10
> As autogenerated patch 30 of the series is too large for the mailing list. ]
>
> This patch series adds support for timers attached to an
Hi all,
I'm struggling with the QEMU VNC on qemu-kvm-1.2.0 a bit, the following two
things are not working properly:
1) Shift key pressed and hold for several seconds causes multiple shift key
press + release events => I would expect getting one press, one or more hold and
one release event (mino
On 13.08.2013, at 08:45, Felix Deichmann wrote:
> Hi,
>
> I tried to install NetBSD/prep 6.1 in qemu-ppc (-M prep), but qemu
> crashes during installation with "floating point exception" in a
> reproducible way.
>
> qemu is version 1.5.2-1 from Arch Linux (sorry, didn't have the time
> to build
On 15 Aug 2013, at 13:40, Stefan Hajnoczi wrote:
> This is looking pretty good. Jan, Ping Fan, and I have already worked
> on top of this series. I'd like to merge it soon.
>
> Are you ready to roll v11?
The only things I have queued for v11 are:
* Disentangle typedef struct vs struct in head
Benjamin Herrenschmidt writes:
> On Thu, 2013-08-15 at 08:03 +0200, Alexander Graf wrote:
>
>> >> How does the user select that he wants a v2.3 p7 cpu with this
>> patch?
>> >
>> > Why would he want that? The behaviour would not change because of
>> the
>> > version - all definitions use the sam
Christoph Hellwig writes:
> On Wed, Jul 31, 2013 at 08:19:51AM +0200, Paolo Bonzini wrote:
>> Most of the block layer is under the BSD license, thus it is reasonable
>> to license block/raw.c the same way. CCed people should ACK by replying
>> with a Signed-off-by line.
>
> The coded was intende
In the end I went for debian cause it is widely used.
So I'm using the following command to install linux:
qemu-system-arm -m 1024 -hda arm.img -cdrom debian-7.1.0-armel-CD-1.iso -boot d
And I get this error:
Kernel image must be specified
In the documentation is mentioned that i don't need a b
On 15 August 2013 14:22, Herbei Dacian wrote:
>
> In the end I went for debian cause it is widely used.
>
> So I'm using the following command to install linux:
> qemu-system-arm -m 1024 -hda arm.img -cdrom debian-7.1.0-armel-CD-1.iso
> -boot d
This command line is totally broken. You're running
On 15.08.2013, at 15:12, Anthony Liguori wrote:
> Benjamin Herrenschmidt writes:
>
>> On Thu, 2013-08-15 at 08:03 +0200, Alexander Graf wrote:
>>
> How does the user select that he wants a v2.3 p7 cpu with this
>>> patch?
Why would he want that? The behaviour would not change be
Hi,
>> # qemu-system-ppc -nographic -M prep -m 128M -hda hda.qcow2 -cdrom
>> NetBSD-6.1-prep.iso -serial ... -kernel sysinst_com0.fs
>>
>> There seems to be a connection between the amount of RAM chosen
>> and the point where the crash happens. With 128M, qemu will crash
>> when the installer
OK but which command should I use if that is broken and where I can find some
documentation that is actually up to date?
From: Peter Maydell
To: Herbei Dacian
Cc: QEmu Devel
Sent: Thursday, 15 August 2013, 15:31
Subject: Re: [Qemu-devel] minimal linux dis
On 15 August 2013 14:46, Herbei Dacian wrote:
> OK but which command should I use if that is broken and where I can find
> some documentation that is actually up to date?
You need to start by finding out which of the boards QEMU
models your distribution actually supports, and the expected
install
On 08/15/2013 09:48 PM, Andreas Färber wrote:
> Am 15.08.2013 13:03, schrieb Alexander Graf:
>>
>> On 15.08.2013, at 12:52, Andreas Färber wrote:
>>
>>> Am 15.08.2013 10:45, schrieb Alexander Graf:
Yes, I think it makes sense to keep the full PVR around when we want to be
specific.
yes but which binary do I use to call to run an emulated arm image?
is there an actual binary that can emulate an existing arm board, anyboard?
qemu?
if not which is the emulator that works with arm?
If not where is the project that I can tweak to build such a binary.
I can search for the board
On 15.08.2013, at 15:39, Gerd Hoffmann wrote:
> Hi,
>
>>> # qemu-system-ppc -nographic -M prep -m 128M -hda hda.qcow2 -cdrom
>>> NetBSD-6.1-prep.iso -serial ... -kernel sysinst_com0.fs
>>>
>>> There seems to be a connection between the amount of RAM chosen
>>> and the point where the crash ha
On 15 August 2013 15:01, Herbei Dacian wrote:
> yes but which binary do I use to call to run an emulated arm image?
qemu-system-arm.
> is there an actual binary that can emulate an existing arm board, anyboard?
"qemu-system-arm -M help" lists the boards we support.
http://www.aurel32.net/info/
but you said that "qemu-system-arm" is not maintained and it doesn't work.
The link below contains only links to kernel images that don't work.
Anyway I'll figure it somehow cause this doesn't help me.
From: Peter Maydell
To: Herbei Dacian
Cc: QEmu Devel
Hi
I am seeing a regression with 1.5.0 release where the following program
#include
#include
int main(int argc, char * argv[])
{
double f = 1234.67;
printf("floor(%f) = %f\n", f, floor(f));
return 0;
}
when compiled without any -O options which means it
On Aug 15, 2013, at 4:32 AM, Aurelien Jarno wrote:
> Bit extraction for the FP BF and L field of the MTFSFI and MTFSF
> instructions is wrong and doesn't match the reference manual (which
> explain the bit number in big endian format). It has been broken in
> commit 7d08d85645def18eac2a9d672c186
On 15 August 2013 15:18, Herbei Dacian wrote:
> but you said that "qemu-system-arm" is not maintained and it doesn't work.
No, I said that the arguments you were giving it were requesting a
model of an obsolete board, and you should ask it to emulate a
different board.
-- PMM
On 08/15/2013 06:45 PM, Alexander Graf wrote:
>
> On 15.08.2013, at 10:06, Alexey Kardashevskiy wrote:
>
>> On 08/15/2013 05:55 PM, Alexander Graf wrote:
>>>
>>> On 15.08.2013, at 09:45, Alexey Kardashevskiy wrote:
>>>
IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
>
Am 15.08.2013 15:55, schrieb Alexey Kardashevskiy:
> On 08/15/2013 09:48 PM, Andreas Färber wrote:
>> Am 15.08.2013 13:03, schrieb Alexander Graf:
>>>
>>> On 15.08.2013, at 12:52, Andreas Färber wrote:
>>>
Am 15.08.2013 10:45, schrieb Alexander Graf:
>
> Yes, I think it makes sense to
Hi Jacques,
On 15.08.2013, at 16:42, Jacques Mony wrote:
> Hello,
>
> After going through the archives, I read an interesting thread regarding
> unimplemented instruction set from PowerISA 2.06. The specific instruction
> that seems to be called by AIX is stxvd2x, from VSX Instruction Set (ne
Am 15.08.2013 15:12, schrieb Anthony Liguori:
> Everyone is talking past each other and no one is addressing the real
> problem. There are two distinct issues here:
>
> 1) We have two ABIs that cannot be changed unless there's a very good
>reason to. Alexey's original patch breaks both. The
On 15.08.2013, at 16:43, Alexey Kardashevskiy wrote:
> On 08/15/2013 06:45 PM, Alexander Graf wrote:
>>
>> On 15.08.2013, at 10:06, Alexey Kardashevskiy wrote:
>>
>>> On 08/15/2013 05:55 PM, Alexander Graf wrote:
On 15.08.2013, at 09:45, Alexey Kardashevskiy wrote:
> IBM PO
Quoting Wenchao Xia (2013-08-13 03:44:39)
> 于 2013-8-13 1:01, Michael Roth 写道:
> > Quoting Paolo Bonzini (2013-08-12 02:30:28)
> >>> 1) rename AioContext to AioSource.
> >>>This is my major purpose, which declare it is not a "context" concept,
> >>> and GMainContext is the entity represent the
From: Paolo Bonzini
Reviewed-by: Mike Day
---
tests/Makefile | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/tests/Makefile b/tests/Makefile
index b4a52b4..4d68d28 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -44,9 +44,14 @@ check-unit-y += tests/test-cuti
This series applies on top today's git.qemu.org/master and is online at:
https://github.com/ncultra/qemu/tree/rcu-for-1.7
Paolo Bonzini (2):
fixed tests/Makefile to correctly link rcutorture
enable TLS in build and activate test-tls in make check
configure | 63
From: Paolo Bonzini
Reviewed-by: Mike Day
---
configure | 63 ++
include/qemu/tls.h | 127 +
include/qom/cpu.h | 2 +-
tests/Makefile | 2 +-
tests/test-tls.c | 87 ++
On 15.08.2013, at 17:11, Andreas Färber wrote:
> Am 15.08.2013 15:12, schrieb Anthony Liguori:
>> Everyone is talking past each other and no one is addressing the real
>> problem. There are two distinct issues here:
>>
>> 1) We have two ABIs that cannot be changed unless there's a very good
>>
On 15.08.2013, at 16:47, Andreas Färber wrote:
> Am 15.08.2013 15:55, schrieb Alexey Kardashevskiy:
>> On 08/15/2013 09:48 PM, Andreas Färber wrote:
>>> Am 15.08.2013 13:03, schrieb Alexander Graf:
On 15.08.2013, at 12:52, Andreas Färber wrote:
> Am 15.08.2013 10:45, schrieb
Am 15.08.2013 17:29, schrieb Alexander Graf:
>
> On 15.08.2013, at 16:47, Andreas Färber wrote:
>
>> There is nothing wrong with finding a mask or wildcard solution to that
>> problem, I already indicated so on the original POWER+ patch. The point
>> of the whole discussion is how to get there in
Am 15.08.2013 17:30, schrieb Alexander Graf:
>
> On 15.08.2013, at 17:11, Andreas Färber wrote:
>
>> Am 15.08.2013 15:12, schrieb Anthony Liguori:
>>> Everyone is talking past each other and no one is addressing the real
>>> problem. There are two distinct issues here:
>>>
>>> 1) We have two ABI
On 15.08.2013, at 17:43, Andreas Färber wrote:
> Am 15.08.2013 17:29, schrieb Alexander Graf:
>>
>> On 15.08.2013, at 16:47, Andreas Färber wrote:
>>
>>> There is nothing wrong with finding a mask or wildcard solution to that
>>> problem, I already indicated so on the original POWER+ patch. The
On Mon, Aug 05, 2013 at 08:07:18AM -1000, Richard Henderson wrote:
> No point in splitting the write into 32-bit pieces.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/i386/tcg-target.c | 3 +--
> tcg/tcg.c | 6 ++
> 2 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --
On Mon, Aug 05, 2013 at 08:07:19AM -1000, Richard Henderson wrote:
> Use a 7 byte lea before the ultimate 10 byte movq.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/i386/tcg-target.c | 19 ---
> 1 file changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/tcg/i386/tcg-t
On Mon, Aug 05, 2013 at 08:07:20AM -1000, Richard Henderson wrote:
> Use existing stack space for arguments; don't push/pop.
> Use less ifdefs and more C ifs.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/i386/tcg-target.c | 159
> +-
> 1 file
On Mon, Aug 05, 2013 at 08:07:22AM -1000, Richard Henderson wrote:
> Avoid a loop in the tlb_fill path; the fill will either succeed or
> generate an exception.
>
> Inline the slow_ld/st function; it was a complete copy of the main
> helper except for the actual cross-page unaligned code, and the
On Mon, Aug 05, 2013 at 08:07:21AM -1000, Richard Henderson wrote:
> Allow the code that tcg generates to be less obtuse, passing in
> the return address directly instead of computing it in the helper.
>
> Maintain the old entrance point unchanged as an alternate entry point.
>
> Signed-off-by: R
On Mon, Aug 05, 2013 at 08:07:23AM -1000, Richard Henderson wrote:
> Discontinue the jump-around-jump-to-jump scheme, trading it for a single
> immediate move instruction. The two extra jumps always consume 7 bytes,
> whereas the immediate move is either 5 or 7 bytes depending on where the
> code_
On MIPS ext8s and ext16s ops are implemented with a dedicated
instruction only on MIPS32R2, otherwise the same kind of implementation
than at TCG level (shift left followed by shift right) is used.
Change that by only implementing the ext8s and ext16s ops on MIPS32R2 so
that optimizations can be d
Now that TCG supports enabling and disabling ops at runtime, it's
possible to detect the available host instructions at runtime, and
enable the corresponding ops accordingly.
Unfortunately it's not easy to probe for available instructions on
MIPS, the information is partially available in /proc/cp
Andreas Färber writes:
> Am 15.08.2013 15:12, schrieb Anthony Liguori:
>> Everyone is talking past each other and no one is addressing the real
>> problem. There are two distinct issues here:
>>
>> 1) We have two ABIs that cannot be changed unless there's a very good
>>reason to. Alexey's
On 15.08.2013, at 17:48, Andreas Färber wrote:
> Am 15.08.2013 17:30, schrieb Alexander Graf:
>>
>> On 15.08.2013, at 17:11, Andreas Färber wrote:
>>
>>> Am 15.08.2013 15:12, schrieb Anthony Liguori:
Everyone is talking past each other and no one is addressing the real
problem. There
Am 15.08.2013 17:51, schrieb Alexander Graf:
>
> On 15.08.2013, at 17:43, Andreas Färber wrote:
>
>> Am 15.08.2013 17:29, schrieb Alexander Graf:
>>>
>>> On 15.08.2013, at 16:47, Andreas Färber wrote:
>>>
There is nothing wrong with finding a mask or wildcard solution to that
problem, I
Am 15.08.2013 17:58, schrieb Alexander Graf:
>
> On 15.08.2013, at 17:48, Andreas Färber wrote:
>
>> Am 15.08.2013 17:30, schrieb Alexander Graf:
>>>
>>> On 15.08.2013, at 17:11, Andreas Färber wrote:
>>>
Am 15.08.2013 15:12, schrieb Anthony Liguori:
> Everyone is talking past each other
On 15.08.2013, at 18:08, Andreas Färber wrote:
> Am 15.08.2013 17:51, schrieb Alexander Graf:
>>
>> On 15.08.2013, at 17:43, Andreas Färber wrote:
>>
>>> Am 15.08.2013 17:29, schrieb Alexander Graf:
On 15.08.2013, at 16:47, Andreas Färber wrote:
> There is nothing wrong wit
Quoting Michael Roth (2013-08-15 10:23:20)
> Quoting Wenchao Xia (2013-08-13 03:44:39)
> > 于 2013-8-13 1:01, Michael Roth 写道:
> > > Quoting Paolo Bonzini (2013-08-12 02:30:28)
> > >>> 1) rename AioContext to AioSource.
> > >>>This is my major purpose, which declare it is not a "context"
> > >>
On Thu, 15 Aug 2013, Aurelien Jarno wrote:
> +/* Probe for MIPS32 instructions. As no subsetting is allowed
> + by the specification, it is only necessary to probe for one
> + of the instructions. */
> +#ifndef use_mips32_instructions
> +got_sigill = 0;
> +asm volatile(".se
On 15.08.2013, at 18:22, Andreas Färber wrote:
> Am 15.08.2013 17:58, schrieb Alexander Graf:
>>
>> On 15.08.2013, at 17:48, Andreas Färber wrote:
>>
>>> Am 15.08.2013 17:30, schrieb Alexander Graf:
On 15.08.2013, at 17:11, Andreas Färber wrote:
> Am 15.08.2013 15:12, schri
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