Re: [Qemu-devel] [PATCH v5 0/7] support for ACPI memory hotplug

On Wed, Jun 26, 2013 at 05:14:58PM +0800, Hu Tao wrote: > This series adds memory devices and related methods to support > ACPI memory hotplug. > > This series works with qemu counterpart. See qemu series for > a detailed description. > > Hu Tao (2): > set psize to 0 when romfile_loadfile faile

[Qemu-devel] [PATCH v5] QEMUBH: make AioContext's bh re-entrant

From: Liu Ping Fan BH will be used outside big lock, so introduce lock to protect between the writers, ie, bh's adders and deleter. The lock only affects the writers and bh's callback does not take this extra lock. Note that for the same AioContext, aio_bh_poll() can not run in parallel yet. Sig

Re: [Qemu-devel] [PATCH v5] QEMUBH: make AioContext's bh re-entrant

Am 07.07.2013 12:00, schrieb Liu Ping Fan: > From: Liu Ping Fan > > BH will be used outside big lock, so introduce lock to protect > between the writers, ie, bh's adders and deleter. The lock only > affects the writers and bh's callback does not take this extra lock. > Note that for the same AioC

Re: [Qemu-devel] [SeaBIOS] Next release

On Mon, Jul 01, 2013 at 05:20:46PM -0400, Kevin O'Connor wrote: > As previously discussed, I'll be generating the next seabios release > in the next couple of days. If there are any outstanding defects that > need to be addressed in this release, please let me know. > > -Kevin Could you also inc

[Qemu-devel] [PATCH v3] KVM: nVMX: Fix read/write to MSR_IA32_FEATURE_CONTROL

Fix read/write to IA32_FEATURE_CONTROL MSR in nested environment. This patch simulate this MSR in nested_vmx and the default value is 0x0. BIOS should set it to 0x5 before VMXON. After setting the lock bit, write to it will cause #GP(0). Another QEMU patch is also needed to handle emulation of re

[Qemu-devel] [ [PATCH]] nVMX: Initialize IA32_FEATURE_CONTROL MSR in reset and migration

The recent KVM patch adds IA32_FEATURE_CONTROL support. QEMU needs to clear this MSR when reset vCPU and keep the value of it when migration. This patch add this feature. Signed-off-by: Arthur Chunqi Li --- target-i386/cpu.h |2 ++ target-i386/kvm.c |4 target-i386/machine.c

Re: [Qemu-devel] [SeaBIOS] Next release

On Sun, Jul 07, 2013 at 06:01:08PM +0300, Michael S. Tsirkin wrote: > On Mon, Jul 01, 2013 at 05:20:46PM -0400, Kevin O'Connor wrote: > > As previously discussed, I'll be generating the next seabios release > > in the next couple of days. If there are any outstanding defects that > > need to be ad

Re: [Qemu-devel] [PATCH v2 03/26] ohci: use realize for ohci

Am 01.07.2013 12:18, schrieb Hu Tao: > Signed-off-by: Hu Tao > --- > hw/usb/hcd-ohci.c | 14 ++ > 1 file changed, 6 insertions(+), 8 deletions(-) > > diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c > index 912255d..ee824ee 100644 > --- a/hw/usb/hcd-ohci.c > +++ b/hw/usb/hcd-ohci.c

[Qemu-devel] [PATCH v2 4/5] acpi: load and link tables from /etc/acpi/

Load files in /etc/acpi/, link them using a linker script and use for acpi tables, including the RSDP. Presense of RSDP in this directory completely disables generating and loading legacy acpi tables. Signed-off-by: Michael S. Tsirkin --- src/acpi.c | 39 +++

[Qemu-devel] [PATCH v2 5/5] acpi: add an option to disable builtin tables

Serves to save a bit of memory, and is helpful for debugging (making sure tables come from qemu). Memory stats: Enabled: Total size: 128776 Fixed: 59100 Free: 2296 (used 98.2% of 128KiB rom) Disabled: Total size: 119836 Fixed: 58996 Free: 11236 (used 91.4% of 128KiB rom) Signed-off-by: Michae

[Qemu-devel] [PATCH v2 0/5] seabios: load acpi tables from qemu

This is the seabios code that adds support for loading acpi tables from QEMU: it's working fine here and in fact, I am able to get exactly same tables with builtin tables and with tables coming from qemu. Changes from v1: - simplified linker interfaces along the lines suggested b

[Qemu-devel] [PATCH v2 2/5] pmm: add a way to test whether memory is in FSEG

Will be handy for looking for RSDP. Signed-off-by: Michael S. Tsirkin --- src/pmm.c | 24 ++-- src/util.h | 1 + 2 files changed, 19 insertions(+), 6 deletions(-) diff --git a/src/pmm.c b/src/pmm.c index 8f993fd..8bd8983 100644 --- a/src/pmm.c +++ b/src/pmm.c @@ -120,15 +1

[Qemu-devel] [PATCH v2 1/5] linker: utility to patch in-memory ROM files

Add ability for a ROM file to point to it's image in memory. When file is in memory, add utility that can patch it, storing pointers to one file within another file. This is not a lot of code: together with the follow-up patch to load ACPI tables from ROM, we get: Before: Total size: 127880 Fixed

[Qemu-devel] [PATCH v2 3/5] acpi: pack rsdp

rsdp might not be aligned, so mark it packed. Signed-off-by: Michael S. Tsirkin --- src/acpi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/acpi.h b/src/acpi.h index f872b39..eab982a 100644 --- a/src/acpi.h +++ b/src/acpi.h @@ -47,7 +47,7 @@ struct rsdp_descriptor {

Re: [Qemu-devel] [SeaBIOS] Next release

On Sun, Jul 07, 2013 at 11:14:03AM -0400, Kevin O'Connor wrote: > On Sun, Jul 07, 2013 at 06:01:08PM +0300, Michael S. Tsirkin wrote: > > On Mon, Jul 01, 2013 at 05:20:46PM -0400, Kevin O'Connor wrote: > > > As previously discussed, I'll be generating the next seabios release > > > in the next coup

Re: [Qemu-devel] [PATCH] target-openrisc: Add typename for CPU models.

Hi, Am 02.07.2013 14:30, schrieb Jia Liu: > On Tue, Jul 2, 2013 at 6:18 PM, Andreas Färber > wrote: >> Am 02.07.2013 11:29, schrieb Jia Liu: >> > On Tue, Jul 2, 2013 at 5:11 PM, Dongxue Zhang >> >

Re: [Qemu-devel] [PULL v3 00/18] pci,misc enhancements

"Michael S. Tsirkin" writes: > Changes from v2: > - rebased to origin/master > - fixed up botched posting > > The following changes since commit ab8bf29078e0ab8347e2ff8b4e5542f7a0c751cf: > > Merge remote-tracking branch 'qemu-kvm/uq/master' into staging (2013-07-03 > 08:37:00 -0500) >

Re: [Qemu-devel] [PATCH v2 05/26] i440fx: use type-safe cast instead of directly access of parent dev

Am 01.07.2013 12:18, schrieb Hu Tao: > Signed-off-by: Hu Tao > --- > hw/pci-host/piix.c | 11 +++ > 1 file changed, 7 insertions(+), 4 deletions(-) Thanks, converting the remaining dev uses on top and renaming. https://github.com/afaerber/qemu-cpu/commits/qom-next Andreas @@ -194,7 +19

Re: [Qemu-devel] [PATCH] fsdev: Fix potential memory leak

Stefan Weil writes: > Am 16.06.2013 12:02, schrieb Stefan Weil: >> This leak was reported by cppcheck. >> >> Signed-off-by: Stefan Weil >> --- >> fsdev/qemu-fsdev.c |2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/fsdev/qemu-fsdev.c b/fsdev/qemu-fsdev.c >> index 6eaf36d..ccfec13

Re: [Qemu-devel] [PATCH 1/1] hw/9pfs: Fix memory leak in error path

"M. Mohan Kumar" writes: > From: "M. Mohan Kumar" > > Fix few more memory leaks in virtio-9p-device.c detected using valgrind. > > Signed-off-by: M. Mohan Kumar > --- > hw/9pfs/virtio-9p-device.c | 26 +- > 1 file changed, 17 insertions(+), 9 deletions(-) > > diff --git

Re: [Qemu-devel] [PATCH 1/1] hw/9pfs: Fix memory leak in error path

Am 07.07.2013 19:18, schrieb Aneesh Kumar K.V: > "M. Mohan Kumar" writes: > >> From: "M. Mohan Kumar" >> >> Fix few more memory leaks in virtio-9p-device.c detected using valgrind. >> >> Signed-off-by: M. Mohan Kumar >> --- >> hw/9pfs/virtio-9p-device.c | 26 +- >> 1 fi

Re: [Qemu-devel] Openbios upgrade broke sparc32 linux.

On 07/04/2013 04:52:45 PM, Olivier Danet wrote: On 29/06/2013 22:29, Olivier Danet wrote: On 28/06/2013 23:44, Mark Cave-Ayland wrote: On 28/06/13 03:08, Rob Landley wrote: Commit 467b34689d27 upgraded the openbios image, and ever since my linux system images hang about the time they try to

Re: [Qemu-devel] Openbios upgrade broke sparc32 linux.

On 06/29/2013 03:29:08 PM, Olivier Danet wrote: How embarrassing... - QEMU 1.5.1 can boot Debian Etch (kernel 2.6.18), RedHat 4.2 (kernel 2.0.30), NetBSD 6.1 and OpenBSD 5.3. - Your image (Linux 3.8) can be started with a TurboSparc CPU : qemu -cpu "Fujitsu MB86907". Yay! That fixes it. Th

[Qemu-devel] [PATCH qom-cpu v2 00/42] QOM CPUState, part 11: GDB stub

Hello, This series cleans up gdbstub by changing all its internal CPU state to CPUState and by moving most target-specific code into the target directories. Support for m68k, moxie and unicore32 to set the PC via gdbstub is added. Lightweight subclasses for XtensaCPU are introduced, keeping the

[Qemu-devel] [PATCH qom-cpu v2 03/42] target-m68k: Implement CPUClass::set_pc()

This adds support for GDB's c addr (Continue) and s addr (Single Step). Prepares for dropping cpu_pc_from_tb(). Signed-off-by: Andreas Färber --- target-m68k/cpu.c | 8 1 file changed, 8 insertions(+) diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c index 1b6ef66..43011e7 100644 ---

[Qemu-devel] [PATCH qom-cpu v2 04/42] target-moxie: Implement CPUClass::set_pc()

This adds support for GDB's c addr (Continue) and s addr (Single Step). Prepares for dropping cpu_pc_from_tb(). Signed-off-by: Andreas Färber --- target-moxie/cpu.c | 8 1 file changed, 8 insertions(+) diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c index 92ca594..91f6197 100644

[Qemu-devel] [PATCH qom-cpu v2 01/42] cpu: Introduce vaddr type

vaddr is to target_ulong what uintmax_t is to unsigned int. Its purpose is to allow turning per-target functions with target_ulong arguments into CPUClass hooks. Suggested-by: Peter Maydell Signed-off-by: Andreas Färber --- include/qom/cpu.h | 8 1 file changed, 8 insertions(+) diff

[Qemu-devel] [PATCH qom-cpu v2 05/42] target-unicore32: Implement CPUClass::set_pc()

This adds support for GDB's c addr (Continue) and s addr (Single Step). Prepares for dropping cpu_pc_from_tb(). Signed-off-by: Andreas Färber --- target-unicore32/cpu.c | 8 1 file changed, 8 insertions(+) diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index 6572f01..79f

[Qemu-devel] [PATCH qom-cpu v2 10/42] kvm: Change kvm_{insert, remove}_breakpoint() argument to CPUState

CPUArchState is no longer directly used since converting CPU loops to CPUState. Prepares for changing GDBState::c_cpu to CPUState. Signed-off-by: Andreas Färber --- gdbstub.c| 12 include/sysemu/kvm.h | 4 ++-- kvm-all.c| 10 -- kvm-stub.c

[Qemu-devel] [PATCH qom-cpu v2 08/42] gdbstub: Update gdb_handlesig() and gdb_signalled() Coding Style

In particular reindent to 4 instead of 2 spaces. Prepares for changing cpu_single_step() argument in gdb_handlesig(). Signed-off-by: Andreas Färber --- gdbstub.c | 94 +++ 1 file changed, 47 insertions(+), 47 deletions(-) diff --git a

[Qemu-devel] [PATCH qom-cpu v2 02/42] cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()

This moves setting the Program Counter from gdbstub into target code. Use vaddr type as upper-bound replacement for target_ulong. Signed-off-by: Andreas Färber --- gdbstub.c | 39 ++- include/qom/cpu.h | 2 ++ target-alpha/cpu.c

[Qemu-devel] [PATCH qom-cpu v2 09/42] cpu: Change cpu_single_step() argument to CPUState

Use CPUState::env_ptr for now. Needed for GdbState::c_cpu. Signed-off-by: Andreas Färber --- exec.c | 4 ++-- gdbstub.c | 9 + include/exec/cpu-all.h | 6 -- include/qom/cpu.h | 13 + 4 files changed, 20 insertions(+), 12 deletions(-)

[Qemu-devel] [PATCH qom-cpu v2 14/42] gdbstub: Change gdb_{read, write}_register() argument to CPUState

Use CPUState::env_ptr for now. Prepares for changing GDBState::g_cpu to CPUState. Signed-off-by: Andreas Färber --- gdbstub.c | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/gdbstub.c b/gdbstub.c index a8fafe2..cee9c13 100644 --- a/gdbstub.c +++ b/gdbstub.c

[Qemu-devel] [PATCH qom-cpu v2 38/42] target-xtensa: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 80 +- target-xtensa/gdbstub.c | 100 2 files changed, 101 insertions(+), 79 deletions(-) create mode 100644 target-xtensa/gdbstub.c diff --git a/gdb

[Qemu-devel] [PATCH qom-cpu v2 17/42] cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug()

Make inline target_memory_rw_debug() always available and change its argument to CPUState. Let it check if CPUClass::memory_rw_debug provides a specialized callback and fall back to cpu_memory_rw_debug() otherwise. The only overriding implementation is for 32-bit sparc. This prepares for changing

[Qemu-devel] [PATCH qom-cpu v2 07/42] cpu: Move singlestep_enabled field from CPU_COMMON to CPUState

Prepares for changing cpu_single_step() argument to CPUState. Acked-by: Michael Walle (for lm32) Signed-off-by: Andreas Färber --- cpu-exec.c| 2 +- cpus.c| 2 +- exec.c| 10 ++ include/exec/cpu-defs.h | 1 - i

[Qemu-devel] [PATCH qom-cpu v2 16/42] exec: Change cpu_memory_rw_debug() argument to CPUState

Propagate X86CPU in kvmvapic for simplicity. Signed-off-by: Andreas Färber --- cpus.c | 4 +-- disas.c | 4 +-- exec.c | 6 ++-- gdbstub.c | 2 +- hw/i386/kvmvapic.c | 72 +++-

[Qemu-devel] [PATCH qom-cpu v2 22/42] gdbstub: Fix cpu_gdb_{read, write}_register() Coding Style

Add braces, replace tabs, remove trailing whitespace, drop space before parenthesis and place break etc. below case statements. Signed-off-by: Andreas Färber --- gdbstub.c | 446 -- 1 file changed, 292 insertions(+), 154 deletions(-) d

[Qemu-devel] [PATCH qom-cpu v2 18/42] gdbstub: Change GDBState::g_cpu to CPUState

Use CPUState::env_ptr for Xtensa. This removes the last user of CPUArchState from gdb_set_stop_cpu(). Signed-off-by: Andreas Färber --- gdbstub.c | 35 +++ 1 file changed, 15 insertions(+), 20 deletions(-) diff --git a/gdbstub.c b/gdbstub.c index fa44550..7be234

[Qemu-devel] [PATCH qom-cpu v2 40/42] cpu: Introduce CPUClass::gdb_{read, write}_register()

Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle (for lm32) Signed-off-by: Andreas Färber --- gdbstub.c | 80 - include/exec/gdbstub.h | 8 + include/qom/cpu.h

[Qemu-devel] [PATCH qom-cpu v2 20/42] gdbstub: Change gdb_register_coprocessor() argument to CPUState

Signed-off-by: Andreas Färber --- gdbstub.c | 7 +++ include/exec/gdbstub.h | 2 +- target-arm/helper.c | 7 --- target-m68k/helper.c| 3 ++- target-ppc/translate_init.c | 15 --- 5 files changed, 18 insertions(+), 16 deletions(-) di

[Qemu-devel] [PATCH qom-cpu v2 24/42] cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs

CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle (for lm32) Signed-off-by: Andreas Färber

[Qemu-devel] [PATCH qom-cpu v2 15/42] cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook

Change breakpoint_invalidate() argument to CPUState alongside. Since all targets now assign a softmmu-only field, we can drop helpers cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd(). Prepares for changing cpu_memory_rw_debug() argument to CPUState. Signed-off-by: Andreas

[Qemu-devel] [PATCH qom-cpu v2 29/42] target-m68k: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 47 +--- target-m68k/gdbstub.c | 67 +++ 2 files changed, 68 insertions(+), 46 deletions(-) create mode 100644 target-m68k/gdbstub.c diff --git a/gdbstub.c b

[Qemu-devel] [PATCH qom-cpu v2 35/42] target-alpha: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 66 +- target-alpha/gdbstub.c | 86 ++ 2 files changed, 87 insertions(+), 65 deletions(-) create mode 100644 target-alpha/gdbstub.c diff --git a/gdbstub

[Qemu-devel] [PATCH qom-cpu v2 41/42] target-cris: Factor out CPUClass::gdb_read_register() hook for v10

Signed-off-by: Andreas Färber --- target-cris/cpu-qom.h | 1 + target-cris/cpu.c | 4 target-cris/gdbstub.c | 10 -- 3 files changed, 9 insertions(+), 6 deletions(-) diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h index 3e92ea0..7559366 100644 --- a/target-cris/cpu-

[Qemu-devel] [PATCH qom-cpu v2 26/42] target-ppc: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c| 101 +- target-ppc/gdbstub.c | 122 +++ 2 files changed, 123 insertions(+), 100 deletions(-) create mode 100644 target-ppc/gdbstub.c diff --git a/gdbs

[Qemu-devel] [PATCH qom-cpu v2 42/42] cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML

Replace the GDB_CORE_XML define in gdbstub.c with a CPUClass field. Use first_cpu for qSupported and qXfer:features:read: for now. Add a stub for xml_builtin. Signed-off-by: Andreas Färber --- gdbstub.c | 42 ++ include/qom/cpu.h

[Qemu-devel] [PATCH qom-cpu v2 27/42] target-sparc: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 180 +--- target-sparc/gdbstub.c | 200 + 2 files changed, 201 insertions(+), 179 deletions(-) create mode 100644 target-sparc/gdbstub.c diff --git

[Qemu-devel] [PATCH qom-cpu v2 39/42] gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions

This avoids polluting the global namespace with a non-prefixed macro and makes it obvious in the call sites that we return. Semi-automatic conversion using, e.g., sed -i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target-*/gdbstub.c followed by manual tweaking for sparc's GET_REGA() and Coding

[Qemu-devel] [PATCH qom-cpu v2 33/42] target-microblaze: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 29 +-- target-microblaze/gdbstub.c | 49 + 2 files changed, 50 insertions(+), 28 deletions(-) create mode 100644 target-microblaze/gdbstub.c diff --git a/gdbstub.

Re: [Qemu-devel] [PATCH RFC qom-cpu 39/41] target-xtensa: Introduce XtensaCPU subclasses

Am 06.07.2013 21:54, schrieb Max Filippov: > On Sat, Jul 6, 2013 at 11:12 PM, Andreas Färber wrote: >> Am 06.07.2013 20:39, schrieb Max Filippov: >>> ...and maybe a stupid question, but why moving configuration pointer away >>> from env and then changing every place that used to access it? >> >> X

[Qemu-devel] [PATCH qom-cpu v2 36/42] target-s390x: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 60 + target-s390x/gdbstub.c | 80 ++ 2 files changed, 81 insertions(+), 59 deletions(-) create mode 100644 target-s390x/gdbstub.c diff --git a/gdbstub.

[Qemu-devel] [PATCH qom-cpu v2 32/42] target-sh4: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c| 117 +-- target-sh4/gdbstub.c | 137 +++ 2 files changed, 138 insertions(+), 116 deletions(-) create mode 100644 target-sh4/gdbstub.c diff --git a/gdb

[Qemu-devel] [PATCH qom-cpu v2 12/42] gdbstub: Change gdb_handlesig() argument to CPUState

Prepares for changing GDBState::c_cpu to CPUState. Signed-off-by: Andreas Färber --- bsd-user/main.c| 10 ++ gdbstub.c | 6 +++--- include/exec/gdbstub.h | 2 +- linux-user/main.c | 35 +++ linux-user/signal.c| 3 ++- 5 fil

[Qemu-devel] [PATCH qom-cpu v2 19/42] cpu: Move gdb_regs field from CPU_COMMON to CPUState

Prepares for changing gdb_register_coprocessor() argument to CPUState. Signed-off-by: Andreas Färber --- gdbstub.c | 11 ++- include/exec/cpu-defs.h | 2 -- include/qom/cpu.h | 2 ++ 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/gdbstub.c b/gdbstub.

[Qemu-devel] [PATCH qom-cpu v2 30/42] target-mips: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 124 +-- target-mips/gdbstub.c | 144 ++ 2 files changed, 145 insertions(+), 123 deletions(-) create mode 100644 target-mips/gdbstub.c diff --git a/g

Re: [Qemu-devel] [PATCH] fsdev: Fix potential memory leak

Am 07.07.2013 19:15, schrieb Aneesh Kumar K.V: > Stefan Weil writes: > >> Am 16.06.2013 12:02, schrieb Stefan Weil: >>> This leak was reported by cppcheck. >>> >>> Signed-off-by: Stefan Weil >>> --- >>> fsdev/qemu-fsdev.c |2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/fsdev/

[Qemu-devel] [PATCH qom-cpu v2 13/42] gdbstub: Change GDBState::c_cpu to CPUState

Allows us to drop find_cpu(). Xtensa still needs env for its num_g_regs. Signed-off-by: Andreas Färber --- gdbstub.c | 68 +-- 1 file changed, 31 insertions(+), 37 deletions(-) diff --git a/gdbstub.c b/gdbstub.c index 81a8941..a8fafe2

[Qemu-devel] [PATCH qom-cpu v2 06/42] cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()

Where no extra implementation is needed, fall back to CPUClass::set_pc(). Acked-by: Michael Walle (for lm32) Signed-off-by: Andreas Färber --- cpu-exec.c | 8 +++- include/qom/cpu.h | 5 + target-alpha/cpu.h | 5 - target-arm/cpu.h| 5 - targe

[Qemu-devel] [PATCH qom-cpu v2 11/42] gdbstub: Change syscall callback argument to CPUState

Callback implementations were specific to arm and m68k, so can easily cast to ARMCPU and M68kCPU respectively. Prepares for changing GDBState::c_cpu to CPUState. Signed-off-by: Andreas Färber --- gdbstub.c | 2 +- include/exec/gdbstub.h | 2 +- target-arm/arm-semi.c | 8 ++-

[Qemu-devel] [PATCH qom-cpu v2 31/42] target-openrisc: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 57 +-- target-openrisc/gdbstub.c | 77 +++ 2 files changed, 78 insertions(+), 56 deletions(-) create mode 100644 target-openrisc/gdbstub.c diff --git a/gdbs

Re: [Qemu-devel] [PULL v3 00/18] pci,misc enhancements

On Sun, Jul 07, 2013 at 11:27:26AM -0500, Anthony Liguori wrote: > "Michael S. Tsirkin" writes: > > > Changes from v2: > > - rebased to origin/master > > - fixed up botched posting > > > > The following changes since commit ab8bf29078e0ab8347e2ff8b4e5542f7a0c751cf: > > > > Merge remote-

[Qemu-devel] [PATCH qom-cpu v2 34/42] target-cris: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 105 +- target-cris/gdbstub.c | 125 ++ 2 files changed, 126 insertions(+), 104 deletions(-) create mode 100644 target-cris/gdbstub.c diff --git a/gd

[Qemu-devel] [PATCH qom-cpu v2 25/42] target-i386: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c | 203 + target-i386/gdbstub.c | 222 ++ 2 files changed, 223 insertions(+), 202 deletions(-) create mode 100644 target-i386/gdbstub.c diff --git a

[Qemu-devel] [PATCH qom-cpu v2 23/42] gdbstub: Drop dead code in cpu_gdb_{read, write}_register()

GET_REG*() macros include a return statement, thus no need for break. Acked-by: Michael Walle (for lm32) Signed-off-by: Andreas Färber --- gdbstub.c | 25 - 1 file changed, 25 deletions(-) diff --git a/gdbstub.c b/gdbstub.c index 4f5c876..d7cf7ab 100644 --- a/gdbstub.c

[Qemu-devel] [PATCH qom-cpu v2 28/42] target-arm: Move cpu_gdb_{read, write}_register()

Signed-off-by: Andreas Färber --- gdbstub.c| 74 + target-arm/gdbstub.c | 94 2 files changed, 95 insertions(+), 73 deletions(-) create mode 100644 target-arm/gdbstub.c diff --git a/gdbstub.

[Qemu-devel] [PATCH qom-cpu v2 21/42] target-xtensa: Introduce XtensaCPU subclasses

Register a CPU type per core registered. Save the XtensaConfig in XtensaCPUClass and copy it from there to CPUXtensaState, to avoid touching every env->config access for now. Prepares for storing per-class GDB register count. Signed-off-by: Andreas Färber --- target-xtensa/cpu-qom.h | 3 +++ t

[Qemu-devel] [PATCH qom-cpu v2 37/42] target-lm32: Move cpu_gdb_{read, write}_register()

Acked-by: Michael Walle Signed-off-by: Andreas Färber --- gdbstub.c | 66 +-- target-lm32/gdbstub.c | 85 +++ 2 files changed, 86 insertions(+), 65 deletions(-) create mode 100644 target-lm32/gdbstub

[Qemu-devel] [PULL v4 04/18] pc_piix: cleanup init compat handling

Make sure 1.4 calls 1.5, 1.3 calls 1.4 etc. This way it's enough to add enough new compat hook in a single place in piix. Signed-off-by: Michael S. Tsirkin --- hw/i386/pc_piix.c | 18 -- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc

[Qemu-devel] [PULL v4 00/18] pci,misc enhancements

From: Michael S. Tsirkin Changes from v3: - fix up xen build Changes from v2: - rebased to origin/master - fixed up botched posting The following changes since commit ab8bf29078e0ab8347e2ff8b4e5542f7a0c751cf: Merge remote-tracking branch 'qemu-kvm/uq/master' into staging (2013-07

[Qemu-devel] [PULL v4 08/18] pvpanic: fix fwcfg for big endian hosts

Convert port number to little endian when exposing it in fw cfg. Signed-off-by: Michael S. Tsirkin --- hw/misc/pvpanic.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index 83ed226..792d8e4 100644 --- a/hw/misc/pvpanic.c +++ b/hw

[Qemu-devel] [PULL v4 06/18] MAINTAINERS: s/Marcelo/Paolo/

Marcelo doesn't maintain kvm anymore, Paolo is taking over the job. Update MAINTAINERS to stop flooding Marcelo with mail. Signed-off-by: Michael S. Tsirkin --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index ad9c860..11dffee 100644

[Qemu-devel] [PULL v4 13/18] pci: Replace pci_find_domain() with more general pci_root_bus_path()

From: David Gibson pci_find_domain() is used in a number of places where we want an id for a whole PCI domain (i.e. the subtree under a PCI root bus). The trouble is that many platforms may support multiple independent host bridges with no hardware supplied notion of domain number. This patch,

[Qemu-devel] [PULL v4 16/18] pci: Simpler implementation of primary PCI bus

From: David Gibson Currently pci_find_primary_bus() searches the list of root buses for one with domain 0. But since host buses are always registered with domain 0, this just amounts to finding the only PCI host bus. The only remaining users of pci_find_primary_bus() are in pci-hotplug-old.c, w

[Qemu-devel] [PULL v4 09/18] pci: Cleanup configuration for pci-hotplug.c

From: David Gibson pci-hotplug.c and the CONFIG_PCI_HOTPLUG variable which controls its compilation are misnamed. They're not about PCI hotplug in general, but rather about the pci_add/pci_del interface which are now deprecated in favour of the more general device_add/device_del interface. This

[Qemu-devel] [PULL v4 05/18] e1000: cleanup process_tx_desc

From: Andrew Jones Coverity complains about two overruns in process_tx_desc(). The complaints are false positives, but we might as well eliminate them. The problem is that "hdr" is defined as an unsigned int, but then used to offset an array of size 65536, and another of size 256 bytes. hdr will

[Qemu-devel] [PULL v4 12/18] pci: Use helper to find device's root bus in pci_find_domain()

From: David Gibson Currently pci_find_domain() performs two functions - it locates the PCI root bus above the given bus, then looks up that root bus's domain number. This patch adds a helper function to perform the first task, finding the root bus for a given PCI device. This is then used in pci

[Qemu-devel] [PULL v4 17/18] pci: Remove domain from PCIHostBus

From: David Gibson There are now no users of the domain field of PCIHostBus, so remove it from the structure, and as a parameter from the pci_host_bus_register() function which sets it. Signed-off-by: David Gibson Signed-off-by: Michael S. Tsirkin --- hw/pci/pci.c | 7 +++ 1 file changed,

[Qemu-devel] [PULL v4 02/18] pci: store PCI hole ranges in guestinfo structure

Will be used to pass hole ranges to guests. Signed-off-by: Michael S. Tsirkin --- hw/i386/pc.c | 46 +- hw/i386/pc_piix.c | 14 +- hw/i386/pc_q35.c | 6 +- hw/pci-host/q35.c | 8 include/

[Qemu-devel] [PULL v4 15/18] pci: Add root bus parameter to pci_nic_init()

From: David Gibson At present, pci_nic_init() and pci_nic_init_nofail() assume that they will only create a NIC under the primary PCI root. As we add support for multiple PCI roots, that may no longer be the case. This patch adds a root bus parameter to pci_nic_init() (and updates callers accor

[Qemu-devel] [PATCH] Spelling fixes

* it's -> its * of cause -> of course * grammar fix in ui/vnc-enc-zywrle.h Signed-off-by: Stefan Weil --- qapi-schema.json|2 +- slirp/if.c |2 +- ui/vnc-enc-zywrle.h |6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/qapi-schema.json b/qapi-schema

[Qemu-devel] [PULL v4 01/18] range: add Range structure

Sometimes we need to pass ranges around, add a handy structure for this purpose. Note: memory.c defines its own concept of AddrRange structure for working with 128 addresses. It's necessary there for doing range math. This is not needed for most users: struct Range is much simpler, and is only us

[Qemu-devel] [PULL v4 14/18] pci: Add root bus argument to pci_get_bus_devfn()

From: David Gibson pci_get_bus_devfn() interprets a full PCI address string to give a PCIBus * and device/function number within that bus. Currently it assumes it is working on an address under the primary PCI root bus. This patch extends it to allow the caller to specify a root bus. This migh

[Qemu-devel] [PULL v4 18/18] pci: Fold host_buses list into PCIHostState functionality

From: David Gibson The host_buses list is an odd structure - a list of pointers to PCI root buses existing in parallel to the normal qdev tree structure. This patch removes it, instead putting the link pointers into the PCIHostState structure, which have a 1:1 relationship to PCIHostBus structur

[Qemu-devel] [PULL v4 11/18] pci: Abolish pci_find_root_bus()

From: David Gibson pci_find_root_bus() takes a domain parameter. Currently PCI root buses with domain other than 0 can't be created, so this is more or less a long winded way of retrieving the main PCI root bus. Numbered domains don't actually properly cover the (non x86) possibilities for mult

[Qemu-devel] [PULL v4 10/18] pci: Move pci_read_devaddr to pci-hotplug-old.c

From: David Gibson pci_read_devaddr() is only used by the legacy functions for the old PCI hotplug interface in pci-hotplug-old.c. So we move the function there, and make it static. Signed-off-by: David Gibson Signed-off-by: Michael S. Tsirkin --- hw/pci/pci-hotplug-old.c | 14 ++

[Qemu-devel] [PULL v4 07/18] pvpanic: initialization cleanup

Avoid use of static variables: PC systems initialize pvpanic device through pvpanic_init, so we can simply create the fw_cfg file at that point. This also makes it possible to skip device creation completely if fw_cfg is not there, e.g. for xen - so the ports it reserves are not discoverable by gue

[Qemu-devel] [PULL v4 03/18] pc: pass PCI hole ranges to Guests

Guest currently has to jump through lots of hoops to guess the PCI hole ranges. It's fragile, and makes us change BIOS each time we add a new chipset. Let's report the window in a ROM file, to make BIOS do exactly what QEMU intends. Signed-off-by: Michael S. Tsirkin --- hw/i386/pc.c |

[Qemu-devel] [PATCH] [PATCH] Extend support of SMBUS(module pm_smbus.c) HST_STS register.

Previous realization doesn't consider flags in the status register. Add DS and INTR bits of HST_STS register set after transaction execution. Update bits resetting in HST_STS register. Update error processing: if DEV_ERR bit set transaction isn't execution. Signed-off-by: MRatnikov --- hw/i2c/p

Re: [Qemu-devel] [PATCH v2 04/26] i440fx-pcihost: use realize for i440fx-pcihost

Am 01.07.2013 12:18, schrieb Hu Tao: > Signed-off-by: Hu Tao > --- > hw/pci-host/piix.c | 25 +++-- > 1 file changed, 15 insertions(+), 10 deletions(-) Thanks, rebased and applied to qom-next: https://github.com/afaerber/qemu-cpu/commits/qom-next Andreas -- SUSE LINUX Prod

Re: [Qemu-devel] [PATCH] Spelling fixes

--On 7 July 2013 22:25:02 +0200 Stefan Weil wrote: --- a/ui/vnc-enc-zywrle.h +++ b/ui/vnc-enc-zywrle.h @@ -305,9 +305,9 @@ static inline void harr(int8_t *px0, int8_t *px1) |L1H0H1H0|L1H0H1H0|L1H0H1H0|L1H0H1H0| : level 1 In this method, H/L and X0/X1 is always same position. - This lea

Re: [Qemu-devel] [PATCH] Spelling fixes

On 7 July 2013 23:05, Alex Bligh wrote: > > > --On 7 July 2013 22:25:02 +0200 Stefan Weil wrote: > >> --- a/ui/vnc-enc-zywrle.h >> +++ b/ui/vnc-enc-zywrle.h >> @@ -305,9 +305,9 @@ static inline void harr(int8_t *px0, int8_t *px1) >> |L1H0H1H0|L1H0H1H0|L1H0H1H0|L1H0H1H0| : level 1 >> >> In t

Re: [Qemu-devel] [PATCH V3 0/9] add internal snapshot support at block device level

于 2013-7-4 20:44, Stefan Hajnoczi 写道: On Wed, Jul 03, 2013 at 09:52:10AM +0800, Wenchao Xia wrote: Any comments for this version? I'm happy with the code and left comments on error messages and documentation. Thanks for your review :), fix is on the way. -- Best Regards Wenchao Xia

Re: [Qemu-devel] [PATCH V5 0/7] monitor: support sub command group in auto completion and help

Any comments for it? > Global variable *mon_cmds and *info_cmds are not directly used any more, > *cur_mon is not used in completion related functions. It is possible to create > a monitor with different command table now, but that requirement do not exist > yet, so not changed it to save troubl

Re: [Qemu-devel] [PATCH v2 06/26] q35: use type-safe cast instead of directly access of parent dev

Am 01.07.2013 12:18, schrieb Hu Tao: > And remove variables if possible. > > Signed-off-by: Hu Tao > --- > hw/pci-host/q35.c | 35 ++- > 1 file changed, 18 insertions(+), 17 deletions(-) Thanks, converted the remaining ones as attached and queued on qom-next: htt

[Qemu-devel] KVM call agenda for 2013-07-09

Hi Please, send any topic that you are interested in covering. Thanks, Juan. PD. If you want to attend and you don't have the call details, contact me.

Re: [Qemu-devel] KVM call agenda for 2013-07-09

Am 08.07.2013 01:10, schrieb Juan Quintela: > Please, send any topic that you are interested in covering. Static qdev vs. dynamic QOM properties and -global (Igor's topic from two weeks ago that we couldn't cover any more) => needed for X86CPU subclasses (hot-add, topology, NUMA, ...) Thanks, And

Re: [Qemu-devel] [SeaBIOS] Next release

On Sun, Jul 07, 2013 at 06:50:44PM +0300, Michael S. Tsirkin wrote: > On Sun, Jul 07, 2013 at 11:14:03AM -0400, Kevin O'Connor wrote: > > On Sun, Jul 07, 2013 at 06:01:08PM +0300, Michael S. Tsirkin wrote: > > > On Mon, Jul 01, 2013 at 05:20:46PM -0400, Kevin O'Connor wrote: > > > > As previously d

Re: [Qemu-devel] [PATCH 13/19] pseries: savevm support for PCI host bridge

On Sat, Jul 06, 2013 at 11:54:10PM +1000, Alexey Kardashevskiy wrote: > From: David Gibson > > This adds the necessary support for saving the state of the PAPR virtual > PCI host bridge (or host bridges). Note that the migration streams created by this patch will be changed by the multiple host

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