On Fri, 2012-05-18 at 08:53 +0200, Paolo Bonzini wrote:
> It depends on what semantics you attach to dma_mb. In my opinion,
> having a separate barrier for DMA is wrong, because you want the same
> semantics on all architectures.
>
> The x86 requirements are roughly as follows:
>
> 1) it never
Il 18/05/2012 10:18, Benjamin Herrenschmidt ha scritto:
> On Fri, 2012-05-18 at 08:53 +0200, Paolo Bonzini wrote:
>
>> It depends on what semantics you attach to dma_mb. In my opinion,
>> having a separate barrier for DMA is wrong, because you want the same
>> semantics on all architectures.
>>
>
On Tue, May 15, 2012 at 11:21:13AM +0800, dunrong huang wrote:
> Thanks for your reply.
>
> As you say, for an input visitor we dont need to initialize the pointer.
> "visit_type_str" in set_mac function and set_pci_devfn function is a input
> visitor, it points to
> "qmp_input_type_str", if qmp_i
Am 15.05.2012 13:08, schrieb Peter Maydell:
> On 14 May 2012 18:31, Andreas Färber wrote:
>> The board initializes only one CPU, so replace first_cpu with that CPU's
>> state to facilitate review of arm_load_kernel() signature change and to
>> avoid double casts then.
>
> There was a patch propos
This breakage was introduced by the commit "memory: make
phys_page_find() return an unadjusted".
Signed-off-by: TeLeMan
---
exec.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/exec.c b/exec.c
index 0607c9b..ad99476 100644
--- a/exec.c
+++ b/exec.c
@@ -1475,7 +1475,8 @
On Thu, May 17, 2012 at 03:37:49PM +1000, Peter A. G. Crosthwaite wrote:
> Implemented the swapb and swaph byte/halfword reversal instructions added
> to microblaze v8.30
>
> Signed-off-by: Peter A. G. Crosthwaite
Applied, thanks Peter
> ---
> target-microblaze/translate.c | 12 +++
Hi Jia.
>>> + case 0x0009:
>>> + switch (op1) {
>>> + case 0x03: /*l.div*/
>>> + LOG_DIS("l.div r%d, r%d, r%d\n", rd, ra, rb);
>>> + if (rb != 0) {
>>> + tcg_gen_div_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]);
>>
>> You also need to take care of int
On Thu, May 17, 2012 at 03:37:50PM +1000, Peter A. G. Crosthwaite wrote:
> Signed-off-by: Peter A. G. Crosthwaite
> ---
> target-microblaze/cpu.h |1 +
> target-microblaze/helper.c|2 +
> target-microblaze/translate.c | 51 ++--
> 3 files ch
On Thu, May 17, 2012 at 08:14:15AM -0600, Eric Blake wrote:
> On 05/17/2012 07:42 AM, Stefan Hajnoczi wrote:
>
> >>>
> >>> The -open-hook-fd approach allows QEMU to support file descriptor passing
> >>> without changing -drive. It also supports snapshot_blkdev and other
> >>> commands
> >> By th
On Thu, May 17, 2012 at 10:02:01PM +0800, Zhi Yong Wu wrote:
> On Thu, May 17, 2012 at 9:42 PM, Stefan Hajnoczi
> wrote:
> > On Fri, May 04, 2012 at 11:28:47AM +0800, Zhi Yong Wu wrote:
> >> On Tue, May 1, 2012 at 11:31 PM, Stefan Hajnoczi
> >> wrote:
> >> > Libvirt can take advantage of SELinux
Split IN_T into BSIZE and ITYPE, to avoid expansion if the OS has
defined macros for the intX_t and uintX_t types. The IN_T constant is
then defined in mixeng_template.h so it can be used by the
functions/macros on this header file.
This change has been tested successfully under Debian Linux and N
The str allocated in visit_type_str was not freed.
The visit_type_str function is an input visitor(-to-native)
here, it will allocate memory for caller, so the caller is responsible for
freeing the memory.
Signed-off-by: dunrong huang
---
hw/qdev-properties.c |6 +-
1 files changed, 5 i
On Fri, 18 May 2012, Roger Pau Monne wrote:
> Split IN_T into BSIZE and ITYPE, to avoid expansion if the OS has
> defined macros for the intX_t and uintX_t types. The IN_T constant is
> then defined in mixeng_template.h so it can be used by the
> functions/macros on this header file.
>
> This cha
Hi Aurelien,
I found that when qemu-system-mips64el executed 'movz' with -M mips, it
would raise a reserved instruction exception.
The mips spec describes movz as below:
Mnemonic Instructio Defined in MIPS ISA
MOVZMove Conditional on Zero MIPS3
Am 15.05.2012 13:14, schrieb Peter Maydell:
> On 14 May 2012 18:31, Andreas Färber wrote:
>> Following up on your remark about ugly naming as a consequence of my CPU
>> reset
>> patches and my OMAP field rename, here's a few more patches.
>>
>> Patch 1 is spelling fixes in a comment and could be
On 18 May 2012 13:13, Andreas Färber wrote:
> Patch 1 is irrelevant to my refactorings so I'd ask you, Peter, to queue
> it in case some other ARM patch for 1.1 comes along.
I would not at this point put patch 1 in for 1.1 even if there was
some other target-arm patch that caused me to have to do
On 2 May 2012 18:12, Peter Maydell wrote:
> This patch series refactors the ARMv7M NVIC so it no longer
> textually includes arm_gic.c Instead we have a single common
> base class which has the state struct, and a subclass for
> the GIC and another for the NVIC.
>
> As well as being generally rath
Am 02.05.2012 19:12, schrieb Peter Maydell:
> Remove some NVIC ifdefs from the gic_state struct and its
> state save/load functions. This means there are some fields
> in it which are present for the NVIC but not used, but means
> it always has the same layout and can be pulled out into a
> common
Drop "All rights reserved" from all exynos-related file's licenses, I've sent
the same
patch a while ago. I think it'll be nice to fix license issues before next QEMU
release.
Igor Mitsyanko (1):
exynos4210: drop "All rights reserved" line from files license
hw/exynos4210.c |2 +
It has been noted that "All rights reserved" statement conflicts with GPL,
remove it.
Signed-off-by: Igor Mitsyanko
---
hw/exynos4210.c |2 +-
hw/exynos4210.h |2 +-
hw/exynos4210_combiner.c |3 +--
hw/exynos4210_fimd.c |3 +--
hw/exynos4210_gic.c |
Am 02.05.2012 19:12, schrieb Peter Maydell:
> Drop the special casing of NCPU=1 for the NVIC. This slightly
> increases the amount of memory used by its state structure,
> but removes some ifdeffery and means we can safely move the
> GIC state into a common subclass structure.
>
> Signed-off-by: P
On Mon, May 7, 2012 at 3:30 PM, Anthony Liguori wrote:
> On 05/06/2012 09:39 AM, Avi Kivity wrote:
>>
>> On 05/06/2012 05:35 PM, Anthony Liguori wrote:
> So what's really the use case here? Would an IPMI -> libvirt bridge get you
> what you need? I really think that's the best path forward.
I'm
On Thu, 17 May 2012 16:20:42 -0500
Anthony Liguori wrote:
> >> Hmm, that's a good point, but my concern was that if we only emit
> >> the event when the target is reached, what happens if the guest
> >> gets very close to the target but never actually reaches it for
> >> some reason.
> >
> > Havi
malc wrote:
On Fri, 18 May 2012, Roger Pau Monne wrote:
Split IN_T into BSIZE and ITYPE, to avoid expansion if the OS has
defined macros for the intX_t and uintX_t types. The IN_T constant is
then defined in mixeng_template.h so it can be used by the
functions/macros on this header file.
This
On 18 May 2012 14:01, Andreas Färber wrote:
> Am 02.05.2012 19:12, schrieb Peter Maydell:
>> Drop the special casing of NCPU=1 for the NVIC. This slightly
>> increases the amount of memory used by its state structure,
>> but removes some ifdeffery and means we can safely move the
>> GIC state into
Am 18.05.2012 14:58, schrieb Igor Mitsyanko:
> It has been noted that "All rights reserved" statement conflicts with GPL,
> remove it.
>
> Signed-off-by: Igor Mitsyanko
> ---
[...]
> diff --git a/hw/exynos4210_combiner.c b/hw/exynos4210_combiner.c
> index 80af22c..a4a159a 100644
> --- a/hw/exynos
On 05/18/2012 05:26 PM, Andreas Färber wrote:
Am 18.05.2012 14:58, schrieb Igor Mitsyanko:
It has been noted that "All rights reserved" statement conflicts with GPL,
remove it.
Signed-off-by: Igor Mitsyanko
---
[...]
diff --git a/hw/exynos4210_combiner.c b/hw/exynos4210_combiner.c
index 80af2
Suggest to change it to 2011-2012, according to real development frame.
Thanks,
Dmitry Solodkiy,
Emulator/Kernel PL, Mobile Group,
Moscow R&D center, Samsung Electronics
// please use tnef utility to extract Outlook attachments on Linux
-Original Message-
From: Andreas
On 05/17/12 16:33, Luiz Capitulino wrote:
> Note that set_option_parameter() callers still expect automatic error
> reporting with QError, so set_option_parameter() calls
> qerror_report_err() to keep the same semantics.
>
> Signed-off-by: Luiz Capitulino
> ---
> qemu-option.c | 22 +++
On 05/17/12 16:33, Luiz Capitulino wrote:
> @@ -291,8 +290,10 @@ int set_option_parameter(QEMUOptionParameter *list,
> const char *name,
> break;
>
> case OPT_SIZE:
> -if (parse_option_size(name, value, &list->value.n) == -1)
> -return -1;
> +parse_opti
On 05/17/12 16:33, Luiz Capitulino wrote:
> @@ -1060,21 +1060,18 @@ int qemu_opts_validate(QemuOpts *opts, const
> QemuOptDesc *desc)
> }
> }
> if (desc[i].name == NULL) {
> -qerror_report(QERR_INVALID_PARAMETER, opt->name);
> -return -1;
> +
This is an alternative implementation of writethrough caching. By always
opening protocols in writethrough mode and doing flushes manually after
every write, it achieves two results: 1) it makes flipping the cache mode
extremely easy; 2) it lets formats control flushes during metadata updates
even
We want to make the formats handle their own flushes
autonomously, while keeping for guests the ability to use a writethrough
cache. Since formats will write metadata via bs->file, bdrv_co_do_writev
is the only place where we need to add a flush.
Signed-off-by: Paolo Bonzini
---
block.c | 11
Enabling or disabling the write cache is done with the SET FEATURES
command. The command can be issued with sg_sat_set_features from
sg3-utils.
Signed-off-by: Paolo Bonzini
---
hw/ide/core.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/hw/ide/core.c
Let qcow2 caches operate always in writeback mode. The block layer
adds flushes after every guest-initiated data write, and these will
also flush the qcow2 caches to disk.
Signed-off-by: Paolo Bonzini
---
block/qcow2-cache.c| 25 ++---
block/qcow2-refcount.c | 12 ---
comments in-line
On 05/17/12 16:33, Luiz Capitulino wrote:
> do_device_add() and do_netdev_add() call qerror_report_err() to maintain
> their QError semantics.
>
> Signed-off-by: Luiz Capitulino
> ---
> hw/qdev-monitor.c |7 +--
> net.c |5 -
> qemu-option.c |
Signed-off-by: Paolo Bonzini
---
block.c |5 +
block.h |1 +
2 files changed, 6 insertions(+)
diff --git a/block.c b/block.c
index e89b35a..47b4a43 100644
--- a/block.c
+++ b/block.c
@@ -2369,6 +2369,11 @@ int bdrv_enable_write_cache(BlockDriverState *bs)
return bs->enable_write
Am 14.05.2012 21:03, schrieb Peter Maydell:
> Initial infrastructure for data-driven registration of
> coprocessor register implementations.
>
> We still fall back to the old-style switch statements pending
> complete conversion of all existing registers.
>
> Signed-off-by: Peter Maydell
For th
On Fri, 18 May 2012 16:03:30 +0200
Laszlo Ersek wrote:
> On 05/17/12 16:33, Luiz Capitulino wrote:
>
> > @@ -291,8 +290,10 @@ int set_option_parameter(QEMUOptionParameter *list,
> > const char *name,
> > break;
> >
> > case OPT_SIZE:
> > -if (parse_option_size(name, valu
On Fri, 18 May 2012 16:43:16 +0200
Laszlo Ersek wrote:
> comments in-line
>
> On 05/17/12 16:33, Luiz Capitulino wrote:
> > do_device_add() and do_netdev_add() call qerror_report_err() to maintain
> > their QError semantics.
> >
> > Signed-off-by: Luiz Capitulino
> > ---
> > hw/qdev-monitor.c
Am 18.05.2012 14:13, schrieb Andreas Färber:
> Am 15.05.2012 13:14, schrieb Peter Maydell:
>> On 14 May 2012 18:31, Andreas Färber wrote:
>>> Following up on your remark about ugly naming as a consequence of my CPU
>>> reset
>>> patches and my OMAP field rename, here's a few more patches.
>>>
>>>
On 05/18/2012 08:08 AM, Stefan Hajnoczi wrote:
On Mon, May 7, 2012 at 3:30 PM, Anthony Liguori wrote:
On 05/06/2012 09:39 AM, Avi Kivity wrote:
On 05/06/2012 05:35 PM, Anthony Liguori wrote:
So what's really the use case here? Would an IPMI -> libvirt bridge get you
what you need? I really
Writing vm state uses bdrv_pwrite, so it will automatically get flushes
in writethrough mode. But doing a flush at the end in writeback mode
is probably a good idea anyway.
Signed-off-by: Paolo Bonzini
---
Kind of unrelated, found by inspection.
savevm.c |2 +-
1 file changed, 1 in
Because the guest will be able to flip enable_write_cache, the actual
state may not match what is used to open the new snapshot.
Signed-off-by: Paolo Bonzini
---
block.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/block.c b/block.c
index b3d0054..e89b35a 100644
--- a/block.c
+++ b/b
On 05/18/2012 08:08 AM, Stefan Hajnoczi wrote:
On Mon, May 7, 2012 at 3:30 PM, Anthony Liguori wrote:
On 05/06/2012 09:39 AM, Avi Kivity wrote:
On 05/06/2012 05:35 PM, Anthony Liguori wrote:
So what's really the use case here? Would an IPMI -> libvirt bridge get you
what you need? I really
Formats are entirely in charge of flushes for metadata writes. For
guest-initiated writes, a writethrough cache is faked in the block layer.
Signed-off-by: Paolo Bonzini
---
block.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block.c b/block.c
index 3db7150..b3d0054 1
On 05/17/12 16:33, Luiz Capitulino wrote:
> @@ -1244,8 +1247,10 @@ int do_netdev_add(Monitor *mon, const QDict *qdict,
> QObject **ret_data)
> return -1;
> }
>
> -res = net_client_init(opts, 1);
> +res = net_client_init(opts, 1, &local_err);
> if (res < 0) {
> +
Am 18.05.2012 15:36, schrieb Igor Mitsyanko:
> On 05/18/2012 05:26 PM, Andreas Färber wrote:
>> Am 18.05.2012 14:58, schrieb Igor Mitsyanko:
>>> It has been noted that "All rights reserved" statement conflicts with
>>> GPL,
>>> remove it.
>>>
>>> Signed-off-by: Igor Mitsyanko
>>> ---
>> [...]
>>> d
Comments in-line.
On 05/17/12 16:33, Luiz Capitulino wrote:
> This is not a full QAPI conversion, but an intermediate step.
>
> In essence, do_netdev_add() is split into three functions:
>
> 1. netdev_add(): performs the actual work. This function is fully
> converted to Error (thus, it's "
Needed for arm_load_kernel().
Signed-off-by: Andreas Färber
---
hw/xilinx_zynq.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 7290c64..68349e2 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -50,7 +50,7 @@ stati
Hello Peter,
This series completes the post-reset cleanups. Please ack.
Regards,
Andreas
Cc: Peter Maydell
Cc: Igor Mitsyanko
v1 -> v2:
* Drop typo patch - PMM does not want it in 1.1 and queued it in arm-devs.next.
* Many patches were cherry-picked to qom-next already.
* Don't touch first_cp
Pass it through to arm_pic_cpu_handler().
Signed-off-by: Andreas Färber
Acked-by: Peter Maydell
Acked-by: Igor Mitsyanko (for exynos)
---
hw/arm-misc.h |2 +-
hw/arm_pic.c |8 +---
hw/armv7m.c |2 +-
hw/exynos4210.c |3 ++-
hw/highbank.c |5 ++---
h
In particular this simplifies the &s->mpu->cpu->env expression again.
first_cpu and ->next_cpu are expected to be QOM'ified later.
Signed-off-by: Andreas Färber
Acked-by: Igor Mitsyanko (for exynos)
---
hw/arm-misc.h |2 +-
hw/arm_boot.c |4 ++--
hw/collie.c |2
On 05/17/12 16:33, Luiz Capitulino wrote:
> diff --git a/hmp.c b/hmp.c
> index 7a4e25f..2ce8cb9 100644
> --- a/hmp.c
> +++ b/hmp.c
> @@ -990,3 +990,12 @@ void hmp_netdev_add(Monitor *mon, const QDict *qdict)
> out:
> hmp_handle_error(mon, &err);
> }
> +
> +void hmp_netdev_del(Monitor *mon,
Hi all,
the current block job API is designed for streaming; one property of
streaming is that in case of an error it can be restarted from the point
where it was left.
In QEMU 1.2 I would like to add an implementation of mirroring (live
block copy) based on the block job API and on dirty-block t
On Fri, 18 May 2012 17:51:01 +0200
Laszlo Ersek wrote:
> > +void hmp_netdev_add(Monitor *mon, const QDict *qdict)
> > +{
> > +Error *err = NULL;
> > +QemuOpts *opts;
> > +
> > +opts = qemu_opts_from_qdict(qemu_find_opts("netdev"), qdict, &err);
>
> I note we trust qemu_find_opts("net
Il 18/05/2012 19:41, Luiz Capitulino ha scritto:
> Other than that I think we should have a better separation between front-ends
> and back-ends in that code (we seem to call everything a "type").
That makes sense if you consider the way -net originally worked with
VLANs...
Paolo
On Fri, 18 May 2012 18:15:34 +0200
Laszlo Ersek wrote:
> On 05/17/12 16:33, Luiz Capitulino wrote:
>
> > diff --git a/hmp.c b/hmp.c
> > index 7a4e25f..2ce8cb9 100644
> > --- a/hmp.c
> > +++ b/hmp.c
> > @@ -990,3 +990,12 @@ void hmp_netdev_add(Monitor *mon, const QDict *qdict)
> > out:
> >
Hi Anthony, Michael,
While at it, could you pick up the attached patch too?
It has already been acked by Igor Kovalenko.
Thanks,
Fernando
Subject: [PATCH] rtl8139: honor RxOverflow flag in can_receive method
From: Fernando Luis Vazquez Cao
Some drivers (Linux' 8139too among them) rely on the
Hello,
There seems to be a bug in qemu in the e1000 emulation, which triggers
an issue with the Linux driver.
What happens in Linux is the following:
- e1000_open
- e1000_configure
- e1000_setup_rctl
- enables E1000_RCTL_EN
- e1000_configure_rx
- sets RDT/RDH to 0
- al
On Thu, 2012-05-17 at 17:20 +0800, Liu Ping Fan wrote:
> Currently, the guest can not know the NUMA info of the vcpu, which
> will
> result in performance drawback.
>
> This is the discovered and experiment by
> Shirley Ma
> Krishna Kumar
> Tom Lendacky
> Refer to -
> ht
On Thu, May 17, 2012 at 11:04:55AM +0200, heli...@katamail.com wrote:
> Hello,
>
> I am testing Xen 4.2 (unstable) with Qemu 1.1rc2 and spice.
> I have severe video performance problems on Windows 7 guest and X fails to
> run on
> Debian wheezy and Ubuntu Precise guest.
What version of drivers (
Hi,
Zhi-zhou Zhang a écrit :
I found that when qemu-system-mips64el executed 'movz' with -M mips,
it would raise a reserved instruction exception.
The mips spec describes movz as below:
Mnemonic Instructio Defined in MIPS ISA
MOVZMove Conditional
Am 18.05.2012 13:14, schrieb dunrong huang:
The str allocated in visit_type_str was not freed.
The visit_type_str function is an input visitor(-to-native)
here, it will allocate memory for caller, so the caller is responsible for
freeing the memory.
Signed-off-by: dunrong huang
---
hw/qdev-pr
On Fri, 2012-05-18 at 10:57 +0200, Paolo Bonzini wrote:
> > I'm still tempted to add barriers in map and unmap as well in the case
> > where they don't bounce to provide consistent semantics here, ie, all
> > accesses done between the map and unmap are ordered vs all previous and
> > subsequent ac
The initial TLB entry is supposed to help us run the guest -kernel payload.
This means the guest needs to be able to access its own memory, the initrd
memory and the device tree.
So far we only statically reserved a TLB entry from [0;256M[. This patch
fixes it to span from [0;dt_end[, allowing the
On 05/18/2012 06:02 PM, Alex Williamson wrote:
On Wed, 2012-05-16 at 09:29 -0400, Don Dutile wrote:
On 05/15/2012 05:09 PM, Alex Williamson wrote:
On Tue, 2012-05-15 at 13:56 -0600, Bjorn Helgaas wrote:
On Mon, May 14, 2012 at 4:49 PM, Alex Williamson
wrote:
On Mon, 2012-05-14 at 16:02 -06
Hi Zhi-zhou Zhang,
You are correct. This should not be a reserved instruction exception on MIPS64
(nor should MOVN).
-Eric
From: qemu-devel-bounces+ericj=mips@nongnu.org
[mailto:qemu-devel-bounces+ericj=mips@nongnu.org] On Behalf Of Zhi-zhou
Zhang
Sent: Friday, May 18, 2012 4:39 AM
T
Hi Eric&Zhang,
Nope, you two are wrong. Aurelien is right.
Let me show you the code.
1, qemu/hw/mips_r4k.c --forqemu-system-mips4el -M mipsboard.
void mips_r4k_init (...)
{
...
/* init CPUs */
if (cpu_model == NULL) {
#ifdef TARGET_MIPS64
cpu_model = "R4000";
#else
On Fri, 2012-05-18 at 19:00 -0400, Don Dutile wrote:
> On 05/18/2012 06:02 PM, Alex Williamson wrote:
> > On Wed, 2012-05-16 at 09:29 -0400, Don Dutile wrote:
> >> On 05/15/2012 05:09 PM, Alex Williamson wrote:
> >>> On Tue, 2012-05-15 at 13:56 -0600, Bjorn Helgaas wrote:
> On Mon, May 14, 201
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